JPH02114534A - Silicon wafer and manufacture thereof - Google Patents
Silicon wafer and manufacture thereofInfo
- Publication number
- JPH02114534A JPH02114534A JP26904788A JP26904788A JPH02114534A JP H02114534 A JPH02114534 A JP H02114534A JP 26904788 A JP26904788 A JP 26904788A JP 26904788 A JP26904788 A JP 26904788A JP H02114534 A JPH02114534 A JP H02114534A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- silicon
- silicon wafer
- nitrogen
- dislocations
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 45
- 239000010703 silicon Substances 0.000 title claims abstract description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000000034 method Methods 0.000 claims abstract description 31
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 30
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 15
- 230000002093 peripheral effect Effects 0.000 claims abstract description 11
- 238000000227 grinding Methods 0.000 claims description 4
- 230000008646 thermal stress Effects 0.000 abstract description 9
- 239000004065 semiconductor Substances 0.000 abstract description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 3
- XJKVPKYVPCWHFO-UHFFFAOYSA-N silicon;hydrate Chemical compound O.[Si] XJKVPKYVPCWHFO-UHFFFAOYSA-N 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 66
- 239000013078 crystal Substances 0.000 description 15
- 238000010438 heat treatment Methods 0.000 description 9
- 239000001301 oxygen Substances 0.000 description 8
- 229910052760 oxygen Inorganic materials 0.000 description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000035882 stress Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 150000003376 silicon Chemical class 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000005406 washing Methods 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 230000035755 proliferation Effects 0.000 description 1
- 238000004506 ultrasonic cleaning Methods 0.000 description 1
- 235000021419 vinegar Nutrition 0.000 description 1
- 239000000052 vinegar Substances 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
シリコンウェハーの構成に関し、
ウェハー周辺部の機械的強度を高めて、転位の発生を少
なくすることを目的とし、
少なくとも面取り部分を含むシリコンウェハーの周辺部
に窒素が添加されている構成を有し、その製造方法とし
て、シリコンインゴットを円筒状に研削した後、熱処理
してシリコンインゴット表面に窒素を拡散し、次いで、
スライシングしてシリコンウェハーに形成することを特
徴とする。[Detailed Description of the Invention] [Summary] Regarding the structure of a silicon wafer, the purpose of this invention is to increase the mechanical strength of the wafer periphery and reduce the occurrence of dislocations. It has a structure in which nitrogen is added, and its manufacturing method involves grinding a silicon ingot into a cylindrical shape, then heat-treating it to diffuse nitrogen onto the surface of the silicon ingot, and then
It is characterized by being formed into silicon wafers by slicing.
本発明はシリコンウェハーの構成に関する。 The present invention relates to the construction of silicon wafers.
LSIなどの半導体装置はシリコンウェハー(Sili
con Wafer )の表面に微細な素子を多数形成
して作られるが、そのようなウェハーは大口径化してお
り、その機械的強度の低下による結晶転位の発生が問題
になって、その対策が要望されている。Semiconductor devices such as LSI are made of silicon wafers (Silicon wafers).
Con wafers are made by forming a large number of fine elements on the surface of the wafer, but as such wafers have become larger in diameter, the occurrence of crystal dislocations due to a decrease in their mechanical strength has become a problem, and countermeasures are needed. has been done.
〔従来の技術と発明が解決しようとする課題〕シリコン
ウェハーに半導体装置を形成する場合、その基本的な製
造技術の一つにウェハーの熱処理があり、代表的なLS
Iデバイスを構成するMO3FET素子は5i02膜の
品質が素子特性を左右すると云われ、例えば、厚さ50
0人のS+02膜を形成するには約1000℃、2時間
の熱処理が必要である。また、素子特性を決定する重要
な因子にウェハーへの不純物拡散があり、それも約10
00℃の高温度での処理がおこなわれる。[Prior art and problems to be solved by the invention] When forming semiconductor devices on silicon wafers, one of the basic manufacturing techniques is wafer heat treatment.
It is said that the quality of the 5i02 film affects the device characteristics of the MO3FET element that constitutes the I device.
Heat treatment at about 1000° C. for 2 hours is required to form an S+02 film of 0 people. Furthermore, impurity diffusion into the wafer is an important factor that determines device characteristics, and it also
Processing is carried out at a high temperature of 00°C.
ところが、上記のような高温熱処理をおこなうと、ウェ
ハーには結晶転位(例えば、スリップラインとして現わ
れる)が導入され、第4図はその従来のウェハーの転位
を示す図である。同図は従来のウェハーを1150℃、
910分熱処理して急冷し、その転位の発生状況をX線
トポグラフで撮像した図であるが、このような転位はM
OS F ETなどの耐圧劣化をもたらすことが知られ
ており、第4図に図示されるように転位は主にウェハー
周辺に発生して、周辺部分の素子は不良になり易い傾向
がある。However, when the above-described high-temperature heat treatment is performed, crystal dislocations (for example, appearing as slip lines) are introduced into the wafer, and FIG. 4 is a diagram showing the dislocations of the conventional wafer. The figure shows a conventional wafer heated to 1150°C.
This is an X-ray topographic image of the occurrence of dislocations after heat treatment for 910 minutes and rapid cooling.
It is known that dislocations cause deterioration of the withstand voltage of OS FETs, etc., and as shown in FIG. 4, dislocations mainly occur around the wafer, and devices in the peripheral area tend to be defective.
従来より、このような転位の発生を防ぐ方法が考えられ
ており、その一つはウェハー熱処理の昇温・降温時に生
じるウェハー面内の熱応力を小さくすること、他の一つ
はウェハーの機械的強度を大きくすることで、この機械
的強度を大きくすることは転位の発生・増殖を抑制する
効果のあるものである。現在は専ら、前者のウェハー面
内の熱応力を小さくする方法で対処しているが、熱応力
を小さくするためには、ウェハー内の温度の均一化を図
れば良く、それには高温炉内にゆっくり出し入れして昇
温・降温速度を遅くする方法が採られている。しかし、
直径125mmφ以上の大口径ウェハーになると、それ
だけで対処することが困難になってきた(“MO3LS
I製造技術”日経マグロウヒル社、 pp55〜56参
照)。Conventionally, methods have been considered to prevent the occurrence of such dislocations, one of which is to reduce the thermal stress within the wafer surface that occurs when the temperature is raised and lowered during wafer heat treatment, and the other is to reduce the thermal stress within the wafer surface. Increasing this mechanical strength by increasing the mechanical strength has the effect of suppressing the generation and proliferation of dislocations. Currently, the former method is exclusively used to reduce thermal stress within the wafer surface, but in order to reduce thermal stress, it is sufficient to equalize the temperature within the wafer. A method is used to slow down the rate of temperature rise and fall by slowly loading and unloading. but,
When it comes to large-diameter wafers with a diameter of 125 mm or more, it has become difficult to handle them alone (“MO3LS
I Manufacturing Technology” Nikkei McGraw-Hill, pp. 55-56).
そこで、低温(800〜900℃)にした炉内にウェハ
ーを挿入し、次いで、炉の温度を上昇させるランピング
法が採られているが、このランピング法は低温での熱処
理時間が増加するために酸素原子が析出し易い欠点があ
り、この酸素の析出は結晶欠陥を誘発する主因になる。Therefore, a ramping method has been adopted in which the wafer is inserted into a furnace at a low temperature (800 to 900°C) and then the temperature of the furnace is raised. It has the disadvantage that oxygen atoms tend to precipitate, and this oxygen precipitate is the main cause of crystal defects.
そこで、発明者は後者のウェハーの機械的強度を大きく
することで転位を防ぐ方法を検討した。Therefore, the inventor investigated the latter method of preventing dislocations by increasing the mechanical strength of the wafer.
まず、このシリコン結晶ウェハーの機械的強度を上げる
方法として次の3つの方法が知られている。First, the following three methods are known as methods for increasing the mechanical strength of this silicon crystal wafer.
fa)結晶格子間に存在する酸素は転位を固着させる作
用があるので、高濃度(例えば30ppma以上)の格
子間酸素を含む結晶を成長する方法fblシリコン結晶
中にGe (ゲルマニウム)をドープするじ応用物理学
会予稿集”1983 (春) pp662参照)方法
(C)シリコン結晶中にN2 (窒素)をドープする(
応用物理51 (11) 、 1982. pp125
2参照)方法であるが、このうち、(a)の方法は高濃
度に酸素を含有させると酸素が析出し易い欠点があるた
め、現状では経験的に適当な酸素濃度を選択してその適
量を含有させており、従って、余り強力な効果が期待で
きず、従って、依然としてウェハー周辺の転位は除去で
きない。(bJの方法はドープしたGeが結晶成長時に
偏析してシリコン結晶中でGe濃度が不均一に分布し、
所要のGe?M度が均一に得られず(Jour、 El
ectrochem、 Soc、、134.3(198
7)参照)、転位が依然として発生し易いと云う欠点が
ある。(C1の方法は結晶成長時にN2をドープしつつ
結晶を育成する方法で、N2による転位の固着力は同一
濃度の酸素による転位の固着力と比較して約100倍の
強さがあり、また、このドープ法によれば均一にドープ
される。しかし、CZ法(引き上げ法)でシリコン結晶
を育成中にN2をドープする方法は多結晶化し易くて、
その点で実用化が難しい。fa) Oxygen present between crystal lattices has the effect of fixing dislocations, so a method of growing a crystal containing a high concentration of interstitial oxygen (e.g. 30 ppma or more) fbl Doping Ge (germanium) into a silicon crystal. Proceedings of the Japan Society of Applied Physics” 1983 (Spring) pp. 662) Method (C) Doping N2 (nitrogen) into silicon crystal (
Applied Physics 51 (11), 1982. pp125
2) method, but among these methods, method (a) has the disadvantage that oxygen tends to precipitate when oxygen is contained in a high concentration, so currently, an appropriate oxygen concentration is selected empirically and the appropriate amount Therefore, a very strong effect cannot be expected, and therefore dislocations around the wafer cannot be removed. (In the bJ method, doped Ge segregates during crystal growth and the Ge concentration is unevenly distributed in the silicon crystal.
Required Ge? M degree cannot be obtained uniformly (Jour, El
electrochem, Soc, 134.3 (198
(see 7)), there is a drawback that dislocations are still likely to occur. (Method C1 is a method of growing a crystal while doping N2 during crystal growth. The dislocation fixing force due to N2 is about 100 times stronger than the dislocation fixing force due to oxygen at the same concentration. , this doping method results in uniform doping. However, the method of doping N2 while growing silicon crystals using the CZ method (pulling method) tends to cause polycrystallization.
In this respect, it is difficult to put it into practical use.
一方、第4図よりウェハーに発生する転位はウェハー周
辺に集中していることが明らかで、それは熱処理時にウ
ェハーに作用する熱応力分布とウェハー周辺に残ってい
る加工歪のためと考えられる。そのうち、計算によって
得た熱応力分布の分布図を第5図に示している。図中の
負号は圧縮応力、正号は引張応力を示しており、右側の
付図に示すように、Rは半径、σは回転方向の応力、σ
は半径方向の応力である。第5図よりウェハー周辺(r
/ R= 1に近いところ)に作用する応力が最も大
きく、これはウェハー形状の急激な変化に起因している
ものである。On the other hand, it is clear from FIG. 4 that the dislocations generated in the wafer are concentrated around the wafer, and this is thought to be due to the thermal stress distribution acting on the wafer during heat treatment and the processing strain remaining around the wafer. Among them, a distribution diagram of the thermal stress distribution obtained by calculation is shown in FIG. The negative sign in the figure indicates compressive stress, and the positive sign indicates tensile stress. As shown in the attached figure on the right, R is the radius, σ is the stress in the rotational direction, and σ
is the radial stress. From Figure 5, the area around the wafer (r
/ R = 1) is the largest, and this is due to the rapid change in the wafer shape.
ところで、シリコンインゴットからウェハーへの加工に
よるシリコン形状図を第6図fa)〜(elに示してお
り、同図(a)はCZ法によって結晶成長したインゴッ
ト、同図(b)はそれを円筒状に研削したインゴット、
同図(C)はスライシング(Slicing ) し
た粗ウェハー、同図+d)は周辺を面取りした粗ウェハ
ー、同図(e)は鏡面研磨したウェハーである。このよ
うに、ウェハー表面を傷付けないようにウェハー周辺を
面取りした後に、ウェハー表面を鏡面研磨しているが、
この周辺の面取り部分には加工歪が残存し、この加工歪
をすべて除去することは至難である。従って、ウェハー
周辺の応力集中をなくすることは難しく、ウェハー周辺
部の転位の除去は不可能に近い。By the way, silicon shape diagrams obtained by processing a silicon ingot into a wafer are shown in Figures 6 fa to el, where (a) shows an ingot crystal-grown by the CZ method, and (b) shows a cylindrical shape of the ingot. An ingot ground into a shape,
Figure (C) shows a rough wafer that has been sliced, Figure +d) shows a rough wafer whose periphery has been chamfered, and Figure (e) shows a mirror-polished wafer. In this way, the wafer surface is mirror polished after chamfering the wafer periphery to prevent damage to the wafer surface.
Processing distortion remains in the chamfered portion around this area, and it is extremely difficult to remove all of this processing distortion. Therefore, it is difficult to eliminate stress concentration around the wafer, and it is almost impossible to eliminate dislocations around the wafer.
本発明はこのような考察の下に、ウェハー周辺部の機械
的強度を高めて、転位の発生を少なくすることを目的と
したシリコンウェハーの構成を提案するものである。Based on such consideration, the present invention proposes a structure of a silicon wafer for the purpose of increasing the mechanical strength of the periphery of the wafer and reducing the occurrence of dislocations.
その課題は、少なくとも面取り部分を含むシリコンウェ
ハーの周辺部に窒素が添加されているシリコンウェハー
によって解決され、
且つ、その製造方法としては、シリコンインゴットを円
筒状に研削した後、熱処理してシリコンインゴット表面
に窒素を拡散し、次いで、スライシングしてシリコンウ
ェハーに形成することを特徴とするものである。This problem can be solved by using a silicon wafer in which nitrogen is added to the periphery of the silicon wafer, including at least the chamfered portion, and the method for manufacturing it involves grinding a silicon ingot into a cylindrical shape and then heat-treating it to form a silicon ingot. It is characterized by diffusing nitrogen onto the surface and then slicing it into silicon wafers.
即ち、本発明は、加工歪が残存して、熱応力の大きいウ
ェハー周辺部、即ち、少なくとも面取り部分を含むシリ
コンウェハーの周辺部にのみ、転位の固着力の大きい窒
素を拡散して含有させ、この部分の機械的強度を上げる
ものである。That is, the present invention diffuses and contains nitrogen, which has a strong dislocation fixing force, only in the peripheral area of the wafer where processing strain remains and the thermal stress is large, that is, in the peripheral area of the silicon wafer including at least the chamfered part, This increases the mechanical strength of this part.
以下、図面を参照して実施例により説明する。 Examples will be described below with reference to the drawings.
第1図は本発明にかがるシリコンウェハーの断面図を示
しており、シリコンウェハー10の面取り部分を含む幅
11の周辺部11に窒素を含有させており、ウェハー側
端のN2濃度は約10 a/cffl。FIG. 1 shows a cross-sectional view of a silicon wafer according to the present invention. Nitrogen is contained in the peripheral portion 11 of the silicon wafer 10 having a width 11 including the chamfered portion, and the N2 concentration at the side edge of the wafer is approximately 10 a/cffl.
側端より幅IB内部のN2濃度は約10a/−程度であ
る。この程度のN2濃度によって転位の固着が十分に得
られる。なお、通常、端部の面取り部分の幅は約500
μmであるから、幅、l ***の窒素添加で十分であ
る。The N2 concentration inside the width IB from the side edge is about 10a/-. Sufficient fixation of dislocations can be obtained with this level of N2 concentration. Note that the width of the chamfered end is usually approximately 500 mm.
Since the width is μm, nitrogen addition with a width of l*** is sufficient.
第2図はこのような本発明にかかるウェハーを酸素中で
1150℃、10分間熱処理して急冷し、その転位の発
生状況をX線トポグラフで撮像した図で、第4図と比較
すれば結晶転位の著しい減少が明白である。Figure 2 is an X-ray topographic image of the occurrence of dislocations after the wafer according to the present invention was heat-treated in oxygen at 1150°C for 10 minutes and then rapidly cooled. A significant reduction in dislocations is evident.
ところで、高温におけるシリコン結晶へのN2の拡散定
数は極めて大きく、例えば加熱温度1200℃では約1
O−6crl/秒になる(“応用物理学会予稿集”19
87 (秋)−1,pp241参照)。そのため、12
00℃で1時間の熱処理をおこなうと、窒素は2侶=2
f「5I淘=1酊
但し、D;N2の拡散定数
t;拡散時間
の深さまで拡散させることができる。By the way, the diffusion constant of N2 into silicon crystal at high temperatures is extremely large, for example, at a heating temperature of 1200°C, it is approximately 1.
O-6 crl/sec (“Proceedings of the Japan Society of Applied Physics” 19
87 (Autumn)-1, pp. 241). Therefore, 12
When heat treated at 00℃ for 1 hour, nitrogen becomes 2 atoms = 2
f'5I = 1 However, D: Diffusion constant of N2: t: It is possible to diffuse to a depth of diffusion time.
次に、第3図(al〜(dlは本発明にかかる製造方法
の工程順断面図を示している。まず、同図(alはCZ
法で成長したシリコンインゴットを研削して円筒状にし
たインゴットの断面図である。Next, FIG. 3 (al to (dl) shows step-by-step sectional views of the manufacturing method according to the present invention. First, FIG. 3 (al is CZ
FIG. 2 is a cross-sectional view of a cylindrical ingot obtained by grinding a silicon ingot grown by the method.
次いで、トリクレン、アセトン、アルコールによって順
次に超音波洗浄をおこない、次に、水洗した後、(弗素
+硝酸)水溶液でエツチングし、最後に再び水洗する。Next, ultrasonic cleaning is performed sequentially using trichlene, acetone, and alcohol, followed by water washing, etching with an aqueous solution (fluorine + nitric acid), and finally washing with water again.
これは表面の不純物を除くクリーニング処理で、結晶品
質の維持に重要な処理である。This is a cleaning process that removes surface impurities and is an important process for maintaining crystal quality.
次いで、第3図(blに示すように、1200℃、1時
間の熱処理によって表面から窒素を拡散させて窒素添加
層12を形成し、その後、素早く室温まで冷却する。こ
の素早い冷却はN2の逸散を防ぐためであり、例えば、
加熱炉から引き出すと直ちにN2ガスを吹きつけながら
冷却する。この冷却も製造上から重要な処理である。Next, as shown in Figure 3 (bl), nitrogen is diffused from the surface by heat treatment for 1 hour at 1200°C to form a nitrogen-added layer 12, and then quickly cooled to room temperature. This is to prevent the spread of
Immediately after taking it out of the heating furnace, it is cooled while blowing N2 gas. This cooling is also an important process from the viewpoint of manufacturing.
次いで、第3図(C)に示すように、スライシングして
、端部の角ばった粗ウェハーに形成する。同図の左側は
平面図、右側は断面図である。The wafer is then sliced to form rough wafers with angular edges, as shown in FIG. 3(C). The left side of the figure is a plan view, and the right side is a sectional view.
しかる後、第3図Fdlに示すように、端部を面取りし
て丸めた後、表面を鏡面研磨して本発明にかかるシリコ
ンウェハーに仕上げる。Thereafter, as shown in FIG. 3Fdl, the end portions are chamfered and rounded, and the surface is mirror polished to finish the silicon wafer according to the present invention.
このような製造方法によって本発明にかかるシリコンウ
ェハーを形成することができ、かくして、本発明にかか
るシリコンウェハーは転位の発生が少なく極めて機械的
強度の改善されたウェハーとなる。The silicon wafer according to the present invention can be formed by such a manufacturing method, and thus the silicon wafer according to the present invention is a wafer with few occurrences of dislocations and extremely improved mechanical strength.
なお、本発明はCZ法で結晶成長したインゴットから作
成したシリコンウェハーのみならず、FZ法(帯域成長
法)で育成したインゴットから作成したシリコンウェハ
ーにも適用できることは当然である。Note that the present invention is naturally applicable not only to silicon wafers made from ingots grown by the CZ method, but also to silicon wafers made from ingots grown by the FZ method (zone growth method).
第1図は本発明ににかかるシリボンウェハー第2図は本
発明にかかるウェハーの転位を示す図、第3図は本発明
にかかる製造方法の工程順断面図、第4図は従来のウェ
ハーの転位を示す図、第5図は熱応力の分布図、
第6図はインゴットからウェハーへの加工によるシリコ
ン形状図である。
図において、
10はシリコンウェハー
11は周辺部、
12は窒素添加層
を示している。
〔発明の効果〕
以上の説明から明らかなように、本発明にかかるシリコ
ンウェハーは機械的強度が大きくなるために転位の発生
が少なく、LSI、VLSIなと半導体装置の信頼性1
品質の向上に顕著な効果があるものである。
第1図
8E4.壕2jウニハブ転41を、木TGり第2図
ィ疋朱めウェハー/Irzブ在白末T(f8第4図
権1.啄3製造方sE汀拾If酢面■
第3図
!′!ん〃−今布回
第5図FIG. 1 is a silicon ribbon wafer according to the present invention. FIG. 2 is a diagram showing dislocations of the wafer according to the present invention. FIG. 3 is a cross-sectional view of the manufacturing method according to the present invention in the order of steps. Fig. 5 is a diagram showing the distribution of thermal stress, and Fig. 6 is a diagram showing the shape of silicon as it is processed from an ingot to a wafer. In the figure, 10 indicates the peripheral portion of the silicon wafer 11, and 12 indicates the nitrogen-added layer. [Effects of the Invention] As is clear from the above explanation, the silicon wafer according to the present invention has increased mechanical strength, so that fewer dislocations occur, and the reliability of semiconductor devices such as LSI and VLSI is improved.
This has a remarkable effect on improving quality. Figure 1 8E4. Moat 2j Unihab Rotation 41, Wood TG 2nd figure - Vermilion wafer / Irz Buzaiba T (f8 4th figure right 1. 3 How to make sE tile if vinegar side ■ Figure 3!'! N〃-Imafu episode 5th figure
Claims (2)
周辺部に窒素が添加されていることを特徴とするシリコ
ンウェハー。(1) A silicon wafer characterized in that nitrogen is added to the peripheral portion of the silicon wafer including at least the chamfered portion.
理してシリコンインゴット表面に窒素を拡散し、次いで
、スライシングしてシリコンウェハーに形成することを
特徴とするシリコンウェハーの製造方法。(2) A method for manufacturing a silicon wafer, which comprises: grinding a silicon ingot into a cylindrical shape, heat-treating it to diffuse nitrogen onto the surface of the silicon ingot, and then slicing it to form a silicon wafer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26904788A JPH02114534A (en) | 1988-10-24 | 1988-10-24 | Silicon wafer and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26904788A JPH02114534A (en) | 1988-10-24 | 1988-10-24 | Silicon wafer and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02114534A true JPH02114534A (en) | 1990-04-26 |
Family
ID=17466937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26904788A Pending JPH02114534A (en) | 1988-10-24 | 1988-10-24 | Silicon wafer and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02114534A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6267817B1 (en) | 1997-08-22 | 2001-07-31 | Micron Technology, Inc. | Methods of forming semiconductor wafers, methods of treating semiconductor wafers to alleviate slip generation, ingots of semiconductive material, and wafers of semiconductive material |
JP2016124756A (en) * | 2015-01-05 | 2016-07-11 | グローバルウェーハズ・ジャパン株式会社 | Silicon wafer and method for manufacturing the same |
-
1988
- 1988-10-24 JP JP26904788A patent/JPH02114534A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6267817B1 (en) | 1997-08-22 | 2001-07-31 | Micron Technology, Inc. | Methods of forming semiconductor wafers, methods of treating semiconductor wafers to alleviate slip generation, ingots of semiconductive material, and wafers of semiconductive material |
JP2016124756A (en) * | 2015-01-05 | 2016-07-11 | グローバルウェーハズ・ジャパン株式会社 | Silicon wafer and method for manufacturing the same |
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