JPH02111920U - - Google Patents
Info
- Publication number
- JPH02111920U JPH02111920U JP1900789U JP1900789U JPH02111920U JP H02111920 U JPH02111920 U JP H02111920U JP 1900789 U JP1900789 U JP 1900789U JP 1900789 U JP1900789 U JP 1900789U JP H02111920 U JPH02111920 U JP H02111920U
- Authority
- JP
- Japan
- Prior art keywords
- level
- attenuator
- digital signal
- program
- difference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は本考案の一実施例のブロツク図、第２
図は本実施例の動作を説明する説明図である。
１…プログラム減衰器、２…ＡＧＣ増幅器、３
…振幅検波器、４…ＡＧＣループフイルタ、５…
直流増幅器、６…コンパレータ、７…Ａ／Ｄコン
バータ。
Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is an explanatory diagram for explaining the operation of this embodiment. 1...Program attenuator, 2...AGC amplifier, 3
...Amplitude detector, 4...AGC loop filter, 5...
DC amplifier, 6... comparator, 7... A/D converter.
Claims (1)
に対応して外部から入力される受信信号を減衰さ
せるプログラム減衰器と、前記プログラム減衰器
を経由した受信入力を一定の出力レベルに制御す
るＡＧＣ回路と、前記ＡＧＣ回路の出力レベルを
検波して前記受信入力に対応する直流レベルを出
力する直流増幅器と、前記直流レベルとあらかじ
め定められた基準レベルとを比較して前記直流レ
ベルが前記基準レベルより大きいレベル差を検出
すると、このレベル差に応じたデイジタル信号を
前記制御端子に出力し、前記直流レベルが前記基
準レベルより定められたヒステレシスをもつて低
いレベル差を検出すると前記デイジタル信号を停
止するプログラム減衰器制御手段とを備えたこと
を特徴とする減衰器制御回路。 a program attenuator that attenuates a received signal input from the outside in response to control of a digital signal input from a control terminal; an AGC circuit that controls the received input via the program attenuator to a constant output level; a DC amplifier that detects the output level of the AGC circuit and outputs a DC level corresponding to the receiving input; and a DC level that is higher than the reference level by comparing the DC level with a predetermined reference level. Program attenuation that outputs a digital signal corresponding to this level difference to the control terminal when a difference is detected, and stops the digital signal when the DC level detects a level difference that is lower than the reference level with a predetermined hysteresis. An attenuator control circuit comprising: attenuator control means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1900789U JPH02111920U (en) | 1989-02-20 | 1989-02-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1900789U JPH02111920U (en) | 1989-02-20 | 1989-02-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02111920U true JPH02111920U (en) | 1990-09-07 |
Family
ID=31234148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1900789U Pending JPH02111920U (en) | 1989-02-20 | 1989-02-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02111920U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998010514A1 (en) * | 1996-09-05 | 1998-03-12 | Mitsubishi Denki Kabushiki Kaisha | Gain controlling method and receiver |
-
1989
- 1989-02-20 JP JP1900789U patent/JPH02111920U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998010514A1 (en) * | 1996-09-05 | 1998-03-12 | Mitsubishi Denki Kabushiki Kaisha | Gain controlling method and receiver |
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