JPH02109208U - - Google Patents
Info
- Publication number
- JPH02109208U JPH02109208U JP1743189U JP1743189U JPH02109208U JP H02109208 U JPH02109208 U JP H02109208U JP 1743189 U JP1743189 U JP 1743189U JP 1743189 U JP1743189 U JP 1743189U JP H02109208 U JPH02109208 U JP H02109208U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- image signal
- correction
- pulse width
- width correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Inking, Control Or Cleaning Of Printing Machines (AREA)
- Length Measuring Devices By Optical Means (AREA)
Description
第１図は本考案の一実施例のブロツク構成図、
第２図は第１図中の画信号修正回路のブロツク構
成図、第３図は第２図の動作を示すタイムチヤー
トである。
１……画信号修正回路、２……論理積回路、３
，４……カウンタ回路、５……除算回路、６……
乗算回路、７……補正係数ＲＯＭ、８……バツフ
ア回路、９，１０，１１，１２……モノマルチ回
路、１３，１４，１５，１６……論理和回路、１
７……セレクタ回路。
FIG. 1 is a block diagram of an embodiment of the present invention.
FIG. 2 is a block diagram of the image signal correction circuit shown in FIG. 1, and FIG. 3 is a time chart showing the operation of FIG. 1... Image signal correction circuit, 2... AND circuit, 3
, 4... Counter circuit, 5... Division circuit, 6...
Multiplication circuit, 7... Correction coefficient ROM, 8... Buffer circuit, 9, 10, 11, 12... Mono multi circuit, 13, 14, 15, 16... OR circuit, 1
7...Selector circuit.
Claims (1)
ルス幅補正量の中から指定された補正量のパルス
幅補正を行う画信号修正回路と、指定された主走
査方向と副走査方向の領域内の画素数をカウント
する第１のカウンタ回路と、前記指定領域内に含
まれる黒データの画素数をカウントする第２のカ
ウンタ回路と、前記第２のカウンタ回路の計数出
力を前記第１のカウンタ回路の計数出力で除算す
る除算回路と、前記画信号パルス幅補正量の指定
信号に従つて前記除算回路出力に予め設定された
補正係数を乗算する乗算回路とを具備することを
特徴とする画素比率測定装置。 An image signal correction circuit that performs pulse width correction of a correction amount specified from among a plurality of image signal pulse width correction amounts for black and white binary image signal data, and an image signal correction circuit that performs pulse width correction of a correction amount specified from among a plurality of image signal pulse width correction amounts, and within a specified area in the main scanning direction and sub-scanning direction. a first counter circuit that counts the number of pixels of black data included in the specified area; a second counter circuit that counts the number of pixels of black data included in the specified area; A pixel comprising: a division circuit that divides by a counting output of the circuit; and a multiplication circuit that multiplies the output of the division circuit by a preset correction coefficient in accordance with a signal specifying the image signal pulse width correction amount. Ratio measuring device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1743189U JPH02109208U (en) | 1989-02-16 | 1989-02-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1743189U JPH02109208U (en) | 1989-02-16 | 1989-02-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02109208U true JPH02109208U (en) | 1990-08-31 |
Family
ID=31231204
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1743189U Pending JPH02109208U (en) | 1989-02-16 | 1989-02-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02109208U (en) |
-
1989
- 1989-02-16 JP JP1743189U patent/JPH02109208U/ja active Pending
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