JPS62155675A - Signal correction circuit - Google Patents

Abstract

PURPOSE:To form an inexpensive and highly accurate signal correction circuit by storing an A/D converted while reference signal directly on a memory such as a RAM as it is and providing all arithmetic results between the white reference signal and a picture signal on a table of a memory such as a ROM. CONSTITUTION:An input signal 6 is converted into 128 gradation data of 7 bits for one picture element by the A/D converter 1. A controller 5 forms a RAM address of 11 bits by a synchronizing signal 8, makes access to the RAM 3 together with an enable signal 9 and stores the white reference signal of 2,048 picture elements in the RAM 3 of 16K bit. A correction data table is formed previously on the ROM according to a computation expression of correction data VR=127X picture signal data VFdivided by white data VW (in this case, VR, VF, VW are 7 bit data of 0-127) and if the ROM is made access, shading corrected data 10 can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a signal correction circuit useful as a preprocessing circuit for improving image reading quality used in image input devices such as facsimiles and image scanners.

Conventional technology (III) A one-dimensional image sensor such as a CCD is used as a reading sensor for image scanners, etc. The image signal obtained by such electronic scanning is -
It has different characteristics from a mechanical scanning type that uses individual sensors, and it especially includes low-frequency distortion called shading. This is because it is difficult to apply uniform light to the entire line, the amount of peripheral light decreases due to the use of lenses to collect light, and it is difficult to manufacture each light receiving element of the line sensor with the same sensitivity. Occurs due to A preprocessing circuit is required to correct such distortion and always read stable images.

Conventionally, as shown in FIG. 2, a white reference signal a obtained by reading a white document is first input, A'/D conversion is performed by an A/D converter 11, and the reciprocal value is taken out from a reciprocal converter 12. Store it in RAM13. Next, when an image signal is input, the reciprocal value of the stored white background signal is read out from the RAM 13, and at the same time, the D/A converter 14 performs D, /A conversion, and outputs the reciprocal value.

This reciprocal image signal is multiplied by an analog multiplier 15 to obtain an analog image signal C without shading.
The D converter 16 performs A/D conversion to obtain a digital output. As another example, as shown in FIG.
2 is stored in the RAM 23.

Next, when the image signal is input, the same A, , /D converter 2
RAM 23 in synchronization with digitization by 1.
is read out and added to the multiplier 25 through the selector 24,
A corrected 6-bit digital signal is obtained by multiplying by the A/D converted image signal by the digital multiplier 24.

Problems that the invention aims to solveIn systems that handle image data, large amounts of data can be processed at high speed.
Since it is important to process the data without degrading its quality, it is desirable that the signal processing circuit be as simple as possible. In the conventional example shown in Fig. 2, the calculation is performed five times, and in the conventional example shown in Fig. 3, the calculation is performed four times.
(including A, /D, and D/A conversions).

Means for Solving the Problems In the present invention, the A/D converted white reference signal is stored as it is in a memory such as RAM, and all calculation results between the white reference and the image signal are stored in a memory such as ROM. The circuit is simplified by holding it on the table.

Effect: With the above configuration, the total number of calculations can be reduced to three, and errors can be reduced.

Embodiment FIG. 1 is a block diagram of a signal correction circuit in an embodiment of the present invention. The input signal 6 is converted by the A/D converter 1 into 128 gradation data of 7 bits per pixel. As a first means of correction, a white reference signal is first input, and a switching signal 7 switches the data selector 2 to the RAM 3 side and puts the RAM 3 into a write enable state. The controller 5 creates an 11-bit RAM address using the synchronization signal 8, accesses the RAM 3 together with the enable signal 9, and sends the white reference signal for 2048 pixels to the 16 K-bit RAM.
Store in M3. Next time an image signal is input, the switching signal 7 switches the data selector 2 to the 128 K-bit ROM 4 side and also puts the RAM 3 into the lj-enable state. The controller 5 accesses the RAM and at the same time makes the ROM 4 read-enabled by the enable signal 9. ROM4 stores the image signal at the upper address, RA~
It is accessed with a 14-bit address using the read signal from I3 as the lower address. Correction data VR=127X image signal data 9 V F is stored in the ROM in advance.
l White data VW (however, VIA, VF, VW is O~12
A correction data table is created using the calculation formula (7 hit data), and if you access the ROM, you can check the shading? iff corrected data 10 can be obtained. That is, a correction signal calculated separately from the image signal and the white reference signal for each pixel can be retrieved by reading out the ROM 4.

In the above embodiments, the signal correction circuit for image signals has been described, but the present invention can be similarly applied to other signal corrections.

Effect of the invention As described above, according to the present invention, there is provided an A/'D converter.

It can be configured with RAM, ROM, etc., and can be configured very easily.
Compared to the conventional example, it is possible to realize a signal correction circuit that is less expensive and has higher accuracy.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a signal correction circuit of the present invention, and FIGS. 2 and 3 are block diagrams showing embodiments of a conventional signal correction circuit.

Claims (1)

[Claims] A/D for converting analog input signals to digital values
a transducer; a first memory for storing a reference signal;
It is characterized by comprising a reference signal read from the first memory and a second memory storing correction data accessed using the actual input signal as an address, and extracting the corrected signal from the second memory. signal correction circuit.