JPH0210821A - Reduction projection aligner - Google Patents

Abstract

PURPOSE:To form pattern size at a constant value, and to supply a large number of low-cost integrated circuits having high performance by obtaining the thickness of resist films at every exposure section in a wafer and changing the optimal quantities of exposure at every exposure section on the basis of the values CONSTITUTION:When the upper section of a wafer 301 coated with a resist is exposed in order of exposure sections 1, 2, 3..., the resist film thickness of the exposure sections 1, 2, 3... is measured prior to exposure in a film- thickness measuring function section, and the quantities of exposure of each exposure section 1, 2, 3... are adjusted so that pattern size is kept constant in response to the measured data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reduction projection exposure method for performing reduction projection exposure of a pattern of a semiconductor integrated circuit or the like onto a semiconductor substrate.

[Conventional technology]

In recent years, in the manufacturing of semiconductor integrated circuits, high integration and miniaturization have been promoted in order to mass produce semiconductor integrated circuits at low cost and achieve high performance. Memory circuit devices have been developed. Super LSI
In order to form a circuit pattern on a semiconductor substrate, it is necessary to form a fine pattern accurately, and for this reason, a reduction projection exposure apparatus, a so-called stepper, is used.

FIG. 6 is a basic configuration diagram of a conventional stepper.

In the figure, a stage 107 that is movable in two orthogonal axes x and {circle around (2)} directions is installed on a preservative table 108. A wafer stand 106 is installed on the stage 107 on which a wafer 105 that requires exposure is placed.

Light 100 generated from a light source 101 passes through a condenser lens 1
The reticle 103 has a parallel light beam at 02, and has a semiconductor integrated circuit pattern enlarged to n times its actual size.
pass through. The reticle image is reduced to 1/n, that is, to the actual size, by the reduction projection lens 104, and is imaged and exposed onto the wafer 105. By the way, the area that can be exposed at one time using the reduction projection lens 104 is usually about 5 to 15 III, whereas the wafer used is about 100 to 2.
With a diameter of about 0.00 nmφ, it is impossible to expose the entire wafer at once. Therefore, after exposing a certain area, the stage 107 is moved to expose another area, and the stage is moved and exposed again to expose the entire wafer, and the amount of exposure is kept constant in each case. .

FIG. 7 is a cross-sectional view of the wafer being exposed.

On the wafer 301 is a resist 3 for pattern transfer.
02 is applied. By the way, this resist 302
Conventionally, when a resist is applied onto a wafer, the resist is first dropped onto the center of the wafer and then the wafer is rotated to make the resist thickness uniform on the wafer. However, it is difficult to make the resist thickness completely uniform, and in the case of a 61φ wafer, there is a difference in film thickness of about 0.14.

FIG. 8 is a diagram showing the relationship between resist film thickness and pattern dimensions after exposure and development. When exposure is performed with a certain exposure amount Q0, the pattern size is Q when the resist film thickness is t1, and the pattern size is 02 when the resist film thickness is t2. Exposure wavelength λ. and film thickness is λ. There is a relationship: /4n=t2-t, (n is the refractive index of the resist).

Conventionally, steppers use mercury g-line or i-line, and in the case of g-line, λ. = 0.436p, λ,
/4n″: 0.074 (n is a typical resist 0FPR
800 (Tokyo Ohka) is about 1.64. ).

However, within the wafer, 0.1. There is a slight difference in film thickness, and the dimensional variation may be n, -Q, etc. Q2-Q
, which differs depending on the stepper, resist material, and development method, uses a 115 reduction, NA = 0.35, and a g-line stepper.

1 on the 0FPR800 resist coated on the Si wafer.
- When a pattern of dimensions is exposed and paddle development is performed,
Q, -111,>0.14 in some cases. In a typical IM bit DRAM, the gate length of the transistor is 0.1. It needs to be controlled with a dimensional accuracy of less than or equal to 100%, and if it exceeds this, the performance of the transistor will deteriorate.

[Problem to be solved by the invention]

In the conventional reduction projection exposure method described above, the exposure amount is kept constant during repeated exposure on the wafer, so when the resist thickness on the wafer is not uniform.

The disadvantage is that the pattern dimensions are not accurately controlled, the performance of the integrated circuit device deteriorates, and the yield rate decreases, making it impossible to stably supply high-quality integrated circuit devices in large quantities at low prices. be.

An object of the present invention is to provide a reduction projection exposure method that solves the above problems.

[Differences between the invention and the prior art]

In contrast to the conventional reduction projection exposure method described above, the present invention differs in that the resist thickness of each part of the wafer to be subjected to reduction projection exposure is measured, and the exposure amount is adjusted based on the measured values so that the pattern dimensions are constant. Has a point.

(Means for Solving 211g) In order to achieve the above object, the present invention irradiates with ultraviolet light and sequentially transfers a pattern formed on a glass substrate onto a semiconductor substrate coated with a photosensitive organic film. In a reduction projection exposure method that performs reduction projection exposure, the film thickness distribution of the photosensitive organic film on the semiconductor substrate is measured in advance, and exposure is performed for each exposure within the semiconductor substrate according to the film thickness distribution. It changes the amount.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

(Example 1) FIG. 1 is a schematic diagram showing a stepper for implementing the present invention.

The present invention has a film thickness measurement function for measuring the resist film thickness, and the film thickness measurement function includes a light source 201, a half mirror 202, a lens system 203. It is composed of a detector 204. The stage 107 is movable in two orthogonal axes X and Y directions below the reduction projection lens 104 and the lens system 203. Other configurations are the same as before.

FIG. 2 is a front view of the wafer. When exposing the wafer 301 coated with resist in the order of exposed areas ■, ■, ■, etc., in the film thickness measurement function section in FIG. The thickness is measured prior to exposure, and the thickness of each exposed area is measured depending on the measured data.
, . . . are adjusted as much as possible so that the pattern dimensions are constant.

FIG. 3 is a diagram showing the relationship between the exposure amount and the pattern size after development. When the resist film thickness is t3, pattern dimensions etc. can be obtained with the exposure amount Q1. When the resist film thickness is t4, the exposure amount Q results in a pattern dimension Q4, which is different from Q. In this case, if the exposure amount is 04, pattern dimension Q3 is obtained. FIG. 4 shows the relationship between the resist film thickness and the exposure amount when obtaining the pattern dimension Q. Although the operator may calculate the exposure amount based on this graph from the film thickness measurement results of each exposed area, it is possible to calculate the exposure amount by inputting the data shown in Fig. 4 into the stepper according to the present invention in advance, and The most effective method is to automatically calculate the required exposure amount using the CPU in the stepper and perform exposure accordingly.

Here, the film thickness may be measured not only for the entire exposed area, but also for selectively measuring several locations, and approximating the other exposed areas based on the measurement results.

(Embodiment 2) FIG. 5 is a flowchart for explaining Embodiment 2 of the present invention. In Example 1, in order to control the pattern dimensions with high precision, the resist film thickness 81 is determined for all wafers, which requires time to measure. Therefore, in Embodiment 2 of the present invention, some wafers are extracted from a lot in advance, and for example, 5 wafers are extracted from a lot consisting of 25 wafers.
The resist film thickness of each exposed portion of the five sheets was measured in the same manner as in Example 1. Next, the average film thickness for each exposed area is determined from the data for these 5 sheets, and the exposure amount for each exposed area is determined from this average film thickness, and all 25 sheets are exposed accordingly. .

〔Effect of the invention〕

As explained above, the present invention calculates the resist film thickness for each exposed area on the wafer and changes the optimum exposure amount for each exposed area based on the thickness, so that the resist is not coated with a uniform thickness on the wafer. Even if the pattern size is constant, it can be formed with high performance.

This has the effect that low-cost integrated circuits can be supplied in large quantities at low cost.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of Example 1 of the present invention, Figure 2 is Example 1
3 is a diagram showing the relationship between exposure amount and pattern dimension, FIG. 4 is a diagram showing the relationship between resist film thickness and exposure amount, and FIG. 5 is a flowchart for explaining Example 2.
FIG. 6 is a schematic diagram of a conventional stepper, FIG. 7 is a sectional view for explaining the conventional example, and FIG. 8 is a diagram showing the relationship between resist film thickness and pattern dimensions. 100... Ultraviolet light 102... Condenser lens 104... Reduction projection lens 106... Wafer stand 108... Counterintelligence stand 202... Half mirror 204... Detector Lot, 201... Light source 103...Reticle 105.301...Wafer 107...Stage 200...Light 203...Lens system 302...Resist Fig. 1

Claims (1)

[Claims] (1) In a reduction projection exposure method in which a pattern formed on a glass substrate is sequentially reduced and projected exposed onto a semiconductor substrate coated with a photosensitive organic film by irradiation with ultraviolet light, A reduction projection exposure method characterized in that the film thickness distribution of the photosensitive organic film is measured, and the exposure amount is changed for each exposure within the semiconductor substrate according to the film thickness distribution.