JPH02106340A - Board for electric circuit - Google Patents

Abstract

PURPOSE:To form a circuit of fine pattern inexpensively by electrolessly plating an adhesive layer formed on the surface of a board, and laminating a metal layer having 0.5 - 3.0mum of a thickness thereon to form the board for an electric circuit. CONSTITUTION:An adhesive layer is formed on the surface of a board, the surface of the layer is electrolessly plated to form a metal layer having 0.5 - 3.0mum of thickness, and the board for an electric circuit is manufactured. Another method includes electrolessly plating the surface of an adhesive layer, further electrolytically plating it, to form a metal layer having 10mum or less of a total of thickness, thereby the board for the electric circuit. The adhesive layer desirably contains modified polysiloxane in which polysiloxane is added as side chain to the main chain of bis-phenol A-type epoxy resin, adhesive containing NBR, and a roughed surface physically roughed on its surface.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an electric circuit board for processing into an electric circuit board. [Conventional technology]

As shown in the vJG diagram, an electric circuit board used for manufacturing an electric circuit board has a thickness of 1 mm on both sides of the board 1.
The most common is a double-sided copper-clad laminate B formed by laminating copper foils 6, 6 of 8μ, 35μ, and 70μ. This copper-clad laminate B has the advantage that a high bonding force (beer strength) between the substrate 1 and the copper foil 6 can be obtained because the copper M6 is bonded by thermocompression at the same time when the substrate 1, which is an insulating layer, is laminated and molded. has α. However, when manufacturing an electric circuit board by applying through-hole plating to this copper-clad laminate B and etching the copper foil 6 of the copper-clad laminate B to form a circuit, the through-hole plated holes are etched. There is a problem in that it is necessary to add processes such as tenting, hole filling, and solder resist to protect the circuit from damage, and furthermore, the amount of copper removed by etching during circuit formation increases, resulting in large copper losses. There's a problem. In addition, when using this as an inner layer circuit board of a multilayer circuit board, the surface of the copper foil 6 is a smooth surface and has poor interlayer adhesion during lamination molding, so the copper surface is blackened or otherwise roughened. Furthermore, since the thickness of the copper foil 6 is thick as described above, the overall thickness of the multilayer circuit board increases accordingly, making it necessary to create a thin multilayer circuit board. There is also the problem that it becomes difficult. Furthermore, as mentioned above, the copper foil 6 is only available in several graded thicknesses on the market. There is also the problem of not being able to respond broadly. On the other hand, in order to form narrow line width wiring, that is, fine pattern circuit formation, copper foil 7 having a thickness of 5 μm or 9 μm, which is thinner than the copper M6 described above, is also provided. However, the thinner the copper foil 7 becomes, the more difficult it is to manufacture, the lower the yield, and the higher the cost.Moreover, when the copper foil 7 becomes thinner, it cannot be handled alone, and as shown in FIG. It is used in a state where it is covered with a carrier film 8, and the provision of this carrier film 8 also increases the cost. Also, the copper foil 7 generally available on the market is limited to specific thicknesses such as 5μ and 9μ, and similarly to the above, it can meet a wide range of user needs such as forming circuits to a desired thickness. There is also the problem of not being able to do so. In addition, as another electric circuit substrate, an electric circuit substrate 1 having an adhesive layer 9 on the surface as shown in FIG.
It is known that an electric circuit board is formed by forming a circuit using the 7-day tape method such as the C-4 method or the AP-II method. However, although this board 1 has features that can solve the above problems, the adhesive layer on the surface of the board 1 is 8 changes over time due to surface oxidation, dust adhesion, etc., and the activity of the surface of the adhesive 718 decreases, making it difficult to chemically add a metal layer by electroless plating, that is, circuit formation becomes unstable, and the substrate and metal layer become unstable. There is a problem that sufficient adhesion with the (circuit) cannot be obtained. Furthermore, it was published in Japanese Patent Publication No. 58-5 that it was possible to manufacture electric circuit boards without using electric circuit boards as shown in FIGS. 6 to 8 above.
No. 1436. Special Public Service 1987-
Publication No. 51436 relates to a method for manufacturing a printed circuit board by an additive method (particularly a semi-additive method), in which an adhesive layer is provided on the surface of a substrate, and electroless plating is applied to the surface of the adhesive layer and the inner wall surface of the through hole. Then, after masking a thin metal layer of electroless plating except for the desired circuit forming area, electrolytic plating is applied to build up a metal layer by electrolytic plating on the desired circuit forming area, and after removing the mask. It is based on a method of manufacturing printed circuit boards by etching away a thin metal layer by electroless plating. However, with this product, electroless plating is applied not only to the surface of the adhesive layer but also to the inner wall surface of the through hole, so it can be used as an electrical circuit board suitable for any purpose such as through hole or fine pattern circuit formation. The problem is that it cannot be used.

[Problem to be solved by the invention]

As mentioned above, there are problems such as the large loss of copper removed by etching during circuit formation, the inability to form circuits in fine patterns at low cost, and the use as an inner layer circuit board of a multilayer circuit board. There are problems such as the need for a process to roughen the copper surface in some cases, and the inability to meet a wide range of user needs for forming circuits of arbitrary thickness.
The present invention has been made with the aim of solving these problems all at once.

[Means for Solving the Problems] In order to achieve the above object, the present invention includes a substrate 1, an adhesive layer 2 formed on the surface of the substrate 1, and an adhesive layer 2 formed by electroless plating on the surface of the adhesive layer 2. The first invention provides an electric circuit board characterized in that it is composed of a metal/13 having a film thickness of 0.5 to 3.0 μm, and the board 1 and
It is composed of an adhesive layer 2 formed on the surface of the substrate 1, and a metal layer 4 having a total thickness of 10μ or less, which is formed by electroless plating and then electrolytic plating on the surface of the adhesive layer 2. A second invention provides an electric circuit board having the above characteristics. Furthermore, the adhesive layer 2 includes an adhesive containing NBR and a silicone-modified epoxy resin in which polysiloxane is added as a side chain to the main chain of a bisphenol A epoxy resin, and the surface of the adhesive is physically roughened. A third aspect of the present invention is an electric circuit board characterized by comprising a treated rough surface. The present invention will be explained in detail below. The substrate 1 is not particularly limited as long as it can ensure insulation; for example, it may be a paper base material or
A laminate is used, which is created by impregnating and drying a base material such as a lath base material with a thermosetting resin such as a phenol resin or epoxy resin to form a prepreg, and then stacking multiple sheets of this prepreg and thermo-pressing them. be able to. And this board 1
An adhesive layer 2 is formed on the surface of the adhesive layer 2.
The most preferable embodiment for forming the structure can be achieved by using the method disclosed in Japanese Patent Application Laid-Open No. 59-80992, which was researched and developed by the applicant. That is, the adhesive used for the adhesive layer 2 is bisphenol A.
It is formed by containing NBR and a silicone-modified epoxy resin in which polysiloxane is added as a side chain to the main chain of a type epoxy resin. The silicon-modified epoxy resin is represented by the following structural formula, and preferably has an epoxy equivalent of 500 to 2,500 and contains a silicon component of 5 to 20% by weight. (In the formula, n=2 to 20 (more preferably 4 to 7), -=
1 to 8 (more preferably 2 to 4), R is an aromatic or aliphatic hydrocarbon, and R is preferably an aliphatic one, particularly preferably an ethyl group.) This silicon-modified epoxy An adhesive can be prepared by blending NBR with a resin, and further blending a curing agent, a curing accelerator, an inorganic filler, and a solvent as necessary. As the curing agent, those commonly used for epoxy resins can be used, such as resin initial condensates such as phenol novolak resin, phenol resole resin, and melamine resin, heptatalic anhydride, maleic anhydride, pyromellitic anhydride, Acid anhydrides such as methyltetrahydrophthalic anhydride, amines such as aliphatic polyamines, aromatic polyamines, secondary amines and tertiary amines, and boron trisulfide amine complexes such as boron trisulfide piperidine can be used. Of course, one of these may be used alone or two or more may be used in combination. As the curing accelerator, boron trisulfide aniline,
tri7 boron fluoride paratoluicune, tri7 boron fluoride benzyl7mine, tri7 boron fluoride triethanolamine, tri7
Boron trisulfide amine complexes such as boron fluoride piperinone can be used. *Inorganic fillers include CaCO3, Ai', 03, Zr(Si0.)z
, 5iO-, oxides such as kaolin, silicates, carbonates,
Various substances such as nitrides and carbides can be used, and the particle size is preferably 0.1 to 10μ.Solvents include toluene, isopropyl alcohol, acetone, and ME.
K, cyclohexanone, etc. can be used alone or in combination of two or more. The blending ratio of each component above is
NBR per 100 parts by weight of silicone-modified Evokin resin
It is preferable to set 30 to 200 parts by weight of the inorganic filler, 0 to 500 parts by weight of the inorganic filler, and 400 to 700 parts by weight of the solvent, and mix appropriate amounts of the curing agent and curing accelerator depending on the usage conditions of the adhesive. 1° Apply the adhesive prepared as described above to the surface of the substrate 1.
Coat with a curtain 70-coat method to a thickness of 5 to 100 μm (preferably 25 to 50 μm), and apply this to a thickness of 120 to 1 μm.
The adhesive is preheated at 60° C. for about 10 to 90 minutes to harden it to a B-stage state, and then the surface of the B-stage adhesive is roughened to form a rough surface. In the present invention, the surface roughening treatment for forming a rough surface does not require the use of a chemical method using an etching solution such as chromic acid, but is performed by a physical method to improve the adhesion with the metal layers 3 and 4 described later by electroless plating. You can get enough. Physical roughening methods include physical polishing such as hand-rolling abrasive paper, using an abrasive belt-type grinder, or sandblasting, or roughening the surface of a transfer plate with a rough surface. You can adopt methods such as transferring
In short, any method other than chemical surface roughening using an etching solution such as chromic acid can be used. Therefore, there are no problems such as deterioration of the working environment or waste liquid disposal due to etching solutions such as strong oxidizing agents.
The rough surface formed on the surface has a surface roughness of 0.2 to 1.5μ (
Preferably, it is generally about 0.5 to 0.75μ). After forming a rough surface on the adhesive layer 2 provided on the substrate 1 as described above, electroless plating is performed on the surface of the adhesive layer 2 to form a metal layer 3. Electroless plating can be performed by any conventionally well-known method, and the film thickness is 0.5
After performing electroless plating to form the metal layer 3 so as to have a thickness in the range of ~3.0μ, the adhesive layer 2 is completely cured by drying and further heating. A circuit board A can be obtained. Adhesive layer 2
The heating conditions for completely curing are 100 to 180°C.
, generally for about 40 to 120 minutes. The electrical circuit board A thus created is finished into an electrical circuit board with through holes, etc. by forming a circuit at a circuit processing manufacturer using a method such as a semi-additive method. That is, on the surface of the metal N3 formed by electroless plating, the parts other than the circuit forming part are masked with etching resist or the like, and the metal/i! 3, electrolytic plating is applied to the metal N3 in the unmasked areas to form a built-up circuit, and after removing the masking, light etching is performed to coat the gold J! in the areas other than the circuit.
By removing the L layer 3, circuit formation can be performed by a semi-additive method. Here, adhesion/12
is made of silicone-modified epoxy resin in which polysiloxane is added as a side chain to the main chain of bisphenol A epoxy resin, and an adhesive containing NBR.
Due to the strong adhesive action of the silicon-modified epoxy resin, the adhesive layer 2 and the metal layer 3 are adhered with high adhesion even when the surface is physically roughened. Furthermore, even if some time elapses between the time when the electric circuit board A is created at a board manufacturer and the time when the circuit is formed at a circuit processing manufacturer, the adhesive layer 2 is covered with the metal layer 3 and retained W1. Therefore, there is no fear that the adhesive layer 2 will be deteriorated by oxidation or the like, and the adhesion of the adhesive layer 2 will not deteriorate. As described above, the thickness of the metal layer 3 formed by electroless plating is set in the range of 0.5 to 3.0 microns. If the film thickness is less than 0.5 μm, many pinholes will occur when forming the metal layer 3 by electroless plating, and the adhesive layer 2 may be deteriorated through the pinholes. By the way, there are some differences depending on the type of electroless plating solution, composition, conditions, etc., but electroless plating! There is a correlation between the thickness of the layer and the number of pinholes as shown in FIG. 3, and as the film thickness increases, the pinholes are filled up and the number of pinholes decreases. Furthermore, the thickness of the metal layer 3 is approximately proportional to the length of time for electroless plating, as shown in FIG.
Forming the metal layer 3 with a thickness exceeding 0 μ is not realistic in terms of productivity. For this reason, the thickness of the metal layer 3 formed by electroless plating is set in the range of 0.5 to 3.0 microns as described above. In the embodiment shown in FIG. 1, the metal layer 3 was formed only by S electrolytic plating, but as shown in FIG. The upper plating layer 14b may be formed by performing electrolytic plating, and the metal layer 4 may be formed with a two-layer structure of a lower plating layer 4a formed by electroless plating and an upper plating layer 4b formed by electrolytic plating. In this case, the thickness of the lower plating layer 4a formed by electroless plating is 0.3~
It can be set within a range of 0.6μ. Film thickness is 0.3
Although pinholes are likely to occur in the lower plating layer 4a due to the small μ, there is no problem because the upper plating layer 4b is immediately further provided on the surface of the lower plating layer 4a by electrolytic plating. If it is thinner than 3μ, the current density applied to the lower plating layer 4a during electrolytic plating cannot be increased, so the lower limit of the thickness of the lower plating layer 4a is 0.3μ. *The thickness of the metal layer 4 can be ensured by electrolytic plating, which can form a plating layer at a high speed, so the lower plating layer 4a formed by electroless plating
A thickness of less than 0.6μ is sufficient. On the other hand, the thickness of the upper plating layer 4b formed by electrolytic plating is 0.5 to 3
．． A range of 0μ is preferred. Even in the case of the electric circuit board A formed by providing the metal N4 with a two-layer structure of the lower plating layer 4a formed by electroless plating and the upper plating layer 4b formed by electrolytic plating, it is similar to that shown in FIG. By adding an electrolytic plating circuit to the metal layer 4, it is possible to form a circuit using a semi-additive method or the like to finish an electric circuit board, but it is also possible to form an electric circuit board by etching the metal layer 4 to form a circuit. It can also be made into an electrical circuit board. When forming a circuit using the subtractive method in this way, when finishing an electric circuit board with a fine pattern, the thickness of the metal layer 4, that is, the total thickness of the lower plating layer 4a and the upper plating layer 4b, is 10μ or less ( preferably in the range of 0.8 to 10μ). When etching resist 10 is applied to the surface of the metal layer 4 in areas other than the circuit formation area, and the etching process is performed to form the circuit, the metal layer 4 is formed as shown in FIGS. When the film thickness of 4 becomes thicker, the depth at which the side surface of the circuit 11 is gouged out due to side etching becomes deeper, and the narrowness of the circuit 11 increases, making it difficult to form a circuit with a fine pattern that narrows the width of the circuit 11. become. The gouge depth d of the side surface of the circuit 11 due to this side etching varies slightly depending on the type and composition of the etching solution, the type of etching resist, film thickness, conditions, etc., but generally, as shown in FIG. There is a positive correlation with the thickness of the layer 4, and the maximum thickness of the metal layer 4 is 10μ. Here, when using the electric circuit board obtained by performing circuit forming processing on each of the above-mentioned electric circuit boards A as an inner layer circuit board of a multilayer laminate,
Since the circuit is formed by plating and has a rough surface, it is possible to ensure interlayer adhesion without the need for roughening treatment, and the circuit formed by plating has a rough surface. Since it can be formed thin, the overall thickness of the multilayer circuit board does not increase. Note that the metal layer 3 formed by electroless plating or electrolytic plating
, 4 is made of nickel, gold, etc. in addition to copper.

【Example】

The present invention will be explained in detail below using examples. K (97 Epoxy equivalent is 1100-1300 and silicon content is 1
NBR (Nipo
112 parts by weight of phenol novolac (Nyloc; manufactured by Mitsui Toatsu Co., Ltd.) as a curing agent, 1 part by weight of boron trifluoride piperidone as a curing accelerator, and 112 parts by weight of phenol novolac (Nyloc; manufactured by Mitsui Toatsu Co., Ltd.) as a curing accelerator. CaCO:l(#
An adhesive was prepared by dissolving 101 parts by weight of 2000) and 4 parts by weight of Aerocle R972 as a stabilizer in a mixed solvent of 538 parts by weight of toluene, 250 parts by weight of cyclohexa, 8 parts by weight of MEK, and 10 parts by weight of isopropyl alcohol. did. After applying this adhesive to a thickness of 50μ on the surface of the substrate 1 formed of a paper epoxy unclad laminate,
The adhesive layer 2 was formed on the surface of the substrate 1 by heating the adhesive at a temperature of 60 minutes to primary cure the adhesive to a B-stage state. Next, the surface of the adhesive layer 2 was polished 30 times in each direction with #600 abrasive paper, and further polished 50 times in each direction with Scotch Bligh (Sumitomo 3M) UF to obtain a surface roughness of 0.5μ. The surface of the adhesive layer 2 was roughened to form a rough surface. The substrate 1 with adhesive N2 obtained as described above was mixed with a 270 g/l water solution of Catalip 404 manufactured by Shipley. I
1 (liquid temperature 30±10°C) for 5 to 6 minutes, and then 270 g/f of Catalip 404 manufactured by Shipley.
Aqueous solution and Shipley Catabogit 44 30c
5 to a mixed solution with c/l aqueous solution (liquid temperature 30±10℃)
The catalyst was nucleated by soaking for ~6 minutes, and then washed with water.
7-cubelator treatment was performed by immersing the sample at 0° C. for 5 to 6 minutes. After pretreatment in this way, copper sulfate 2 to 3 g/l (as copper content) and formalin 5
Electroless copper plating prepared with an aqueous solution containing -9 g/l, EDTA 2 Na20 g/l, and a small amount of stabilizer.The substrate 1 with adhesive N2 is immersed for 15 minutes to coat the surface of the adhesive layer 2. A metal layer 3 with a thickness of 0.5μ was formed, then washed with water, and then heated at 100'CX for 60 minutes and 16 minutes.
The adhesive was secondarily cured by heating at 0° C. for 60 minutes to obtain an electric circuit board A having the configuration shown in FIG. 1. Next, an example of a method of forming a circuit by a semi-additive method using the electrical circuit board A produced in this manner will be described. First, leave the part where the circuit will be formed on the surface of the metal layer 3, and use an etching lens UR-450 manufactured by Tamura Kaken Co., Ltd.
Masked by applying and curing B, 70g of sulfuric acid steel
The electric circuit board A was immersed in an electrolytic steel plating solution prepared with an aqueous solution containing a small amount of sulfuric acid and a brightening agent of 160 g/l, and the metal layer 3 was energized at a current density of 3 A/d+
By performing electrolytic plating at room temperature for several minutes,
A circuit is built up on the surface of the metal layer 3. Thereafter, the etching resist is removed with a 5% NaOH aqueous solution, and the metal layer 3 other than the circuit is removed by light etching with a ferric chloride solution, thereby obtaining an electric circuit board on which a circuit is formed. . Next to the electric circuit board obtained in this way, beer strength and solder heat resistance (measured at 260°C) between the board and the plating circuit.
(This was done by floating an electrical circuit board in a solder bath at ℃ and measuring the time it took for the circuit to peel off from the board.) The result is that the beer strength is 3.80-4.45kg/a under normal conditions.
m, 0.56-0.62kg/c when heated to 150℃
m, and the soldering heat resistance was 114 seconds, confirming that the adhesion between the board and the plated circuit was at a sufficient level as an electric circuit board. E19 When electroless copper plating was applied to the substrate 1 with the adhesive layer 2 obtained in Example 1 in the same manner as in Example 1, the thickness was increased by setting the immersion time in the electroless steel plating solution to 10 minutes. 0
．． A lower plating layer 4a having a thickness of 3 μm was formed. Furthermore, by immersing this in the same electrolytic copper plating bath as in Example 1 and setting the immersion time to 3 minutes, an upper plating layer 4b with a thickness of 2 μm was formed on the surface of the lower plating layer 4a, and the lower plating layer By providing a metal layer 4 with a total film thickness of 2.3μ of the upper plating layer 4a and the upper plating layer 4b, and further curing the adhesive layer 2 under the same conditions as in Example 1, an electric circuit having the structure shown in FIG. Substrate A was obtained. Example 1 Using the electrical circuit board A obtained in this way,
Similarly, an electric circuit board can be obtained by forming a circuit using a semi-additive method. (1) When performing electroless copper plating on the substrate 1 with the adhesive layer 2 obtained in Example 1 in the same manner as in Example 1, the thickness was increased by setting the immersion time in the electroless copper plating solution to 10 minutes. 0
．． A 3 μm lower plate il/i 4 a was formed. Furthermore, by immersing this in the same electrolytic copper plating bath as in Example 1 and setting the immersion time to 6 minutes, an upper plating layer 4b with a thickness of 4 μm was formed on the surface of the lower plating layer 4a, and the lower plating layer 4a Metal layer 4 with a total film thickness of 4.3μ and upper plating N4b
By further curing the adhesive layer 2 under the same conditions as in Example 1, an electric circuit board A having the structure shown in FIG. 2 was obtained. Using the electrical circuit board A thus produced, a seven-fin pattern circuit can be formed by a subtractive method. An example of the subtractive method will be explained. First, the surface of the metal layer 4 is masked by applying and curing Eratin Breath (UR-450B manufactured by Tamura Kaken Co., Ltd.), leaving a portion where a circuit is to be formed. By etching this with a ferric chloride solution, the portions of the metal layer 4 covered by the mask remain as circuit patterns, and the portions not covered by the mask are dissolved and removed. By removing with a NaOH aqueous solution, an electric circuit board with a circuit formed thereon can be obtained.

【Effect of the invention】

As described above, the present invention provides a metal layer having a thickness of 0.3 to 3.0μ by electroless plating on the surface of a substrate, or a metal layer having a total thickness of 10μ or less by electroless plating and electrolytic plating. Since the electrical circuit board is formed by providing layers, it is possible to reduce copper loss, which is required when forming a circuit by etching thick copper foil such as in a copper-clad laminate, and It is possible to form a 7-fin pattern circuit at a low cost by forming a thin metal layer on the board without the need for a carrier film (as is the case when using thin copper foil with a carrier film). It is something that becomes. Furthermore, the metal layer can be formed to any desired thickness without steps by electrolytic plating or electroless plating, making it possible to form circuits with various thicknesses according to needs, meeting a wide range of user needs. It is something that can be done.

[Brief explanation of the drawing]

FIG. 1 is a partially cutaway sectional view showing one embodiment of the present invention, vI
Figure J2 is a partially cutaway sectional view showing another embodiment of the present invention, Figure 3 is a graph showing the relationship between the thickness of the metal layer formed by electroless plating, the number of pinholes, and the processing time, and Figure 4 ( a)
(b) is a partial cross-sectional view showing the effect of side etching, 15
The figure is a graph showing the thickness of the metal layer and the depth of the gouge in the circuit.
6 to 8 are partially cutaway sectional views of conventional examples. 1 is a substrate, 2 is an adhesive layer, 3 and 4 are metal layers, 4a is a lower plating layer, and 4b is an upper plating layer. Figure 4 Agent Patent Attorney Ishi 1) Ai 7 Figure 5, Bon, Ki 7! pus tail

Claims (3)

[Claims] (1) A substrate, an adhesive layer formed on the surface of the substrate, and a 0.5 to 3.
1. An electric circuit board comprising a metal layer having a film thickness of 0μ. (2) Consisting of a substrate, an adhesive layer formed on the surface of the substrate, and a metal layer having a total thickness of 10μ or less and formed by electroless plating and then electrolytic plating on the surface of the adhesive layer. An electric circuit board characterized by: (3) The adhesive layer includes an adhesive containing NBR and a silicone-modified epoxy resin in which polysiloxane is added as a side chain to the main chain of a bisphenol A type epoxy resin, and the surface of the adhesive is physically roughened. 3. The electric circuit board according to claim 1, further comprising a roughened surface formed by a chemical treatment.