JPH0195538A - Structure of through hole - Google Patents

Abstract

PURPOSE:To enhance reliability by a method wherein the structure of a through hole in constituted to be able to meet a specific required condition so that an influence due to concentration of an electric current on the through hole can be reduced and that a defect in a wiring part can be reduced. CONSTITUTION:In a through hole 33a, a face containing a segment 29a parallel to the base of an equilateral triangle 25a where an intersecting point P1 of a central line of a first-layer wiring part 13 and a central line of a second-layer wiring part 15 is set as a vertex and both central lines are set as two short sides is provided as a wall face 31a; the through hole is formed on the opposite side of the first-layer wiring part 13 into which an electric current flows and the second-layer wiring part 15 from which the electric current flows out with reference to the wall face 31a. Accordingly, the sum of a distance from one wiring part to the wall face of the through hole and a distance from the other wiring part to the wall face is always nearly definite. By this setup, parts where an electric current is concentrated at one end part of the through hole are scattered; a defect in the wiring part is reduced; reliability is enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a through-hole structure of a semiconductor device using multilayer wiring technology.

(Prior Art) In recent years, semiconductor devices constituting various electronic devices have become highly dense or highly integrated in order to achieve finer snowmaking and high-speed processing. In particular, semiconductor devices
With the advancement of phosphorography technology, the wiring that makes up the
Demand for high-density wiring is increasing.

In order to meet this requirement, a technique of multilayering wiring has been widely used, and semiconductor devices are now constructed with a multilayer wiring structure of two to four layers.

The main components of the multilayer wiring structure described above include the wiring patterns, interlayer insulating films, and through holes that make up each wiring layer. Challenges remain.

Among the technical issues of these components, from the viewpoint of the function of the through hole, the main ones include the role as a signal system circuit component of a semiconductor device and the role as a power supply system circuit component of the equipment.

First, in through holes as signal circuit components, high frequency signals are often handled as relatively small currents. Therefore, for example, it is necessary to reduce stray capacitance between the wiring pattern and the board, and the width of the wiring pattern must be reduced. Similarly, it is important to achieve fine dimensions and to obtain the aforementioned low resistance and good ohmic properties.

On the other hand, through holes as power supply circuit components handle relatively large currents, so they have low resistance and good ohmic properties, and avoid local concentration of current, making them highly reliable semiconductors. The device is configured.

Hereinafter, with reference to the drawings, the structure of a conventional through hole that functions as a power supply circuit section will be described by way of example.

FIG. 4(A) is a plan view partially transparently showing the main parts of a semiconductor device to explain a conventional through hole, and FIG. 4(B)
) is a sectional view of a portion indicated by nn in FIG. 4(A). FIG. 4(C) is an enlarged plan view of the main part of the through-hole portion shown in FIG. 4(A). In these figures, 11
1 is a substrate on which various semiconductor elements (not shown) are formed;
3 and 15, respectively, a first layer arrangement or a second layer wiring for functionally coupling semiconductor elements to operate a circuit;
17 is a glabellar insulating film for electrically insulating the first and second layer wiring, 19 is a through hole formed in the glabellar insulating film 17 for electrically connecting the inter-glabellar wiring, and 21 is the above-mentioned through hole. This is an intersection where the first layer arrangement and the second layer wiring intersect.

First, with reference to FIGS. 4(A) and 4(B), a manufacturing process of multilayer wiring using through holes will be described. still,
In order to facilitate understanding of the following explanation, the constituent components of a semiconductor device in the process of being manufactured are comprehensively expressed as a wafer.

In addition, the wiring on the substrate side (corresponding to lower layer wiring) is arranged as the first layer through an insulating film between the eyebrows, and the wiring on the opposite side of the substrate (corresponding to upper layer wiring) through the film is placed as second layer wiring. A case in which the current direction in a through hole flows from the first layer arrangement and flows out from the second layer wiring will be briefly described.

First, a substrate 11 on which a semiconductor element (not shown) is formed
A first layer arrangement 13 according to the design is formed on the surface of the substrate using a known lamination lithography technique.

Next 1, the upper entire surface of the wafer described above f, interlayer insulation s17
Deposit. Thereafter, a through hole 19 having a rectangular shape (described later) is formed in a predetermined portion of the insulating film 17 according to the design of the semiconductor device using a lithography technique.

Subsequently, a wiring material is deposited on the above-mentioned wafer, and the second layer wiring 15 is formed in the same manner as the first layer arrangement 13, and the through hole 19 (thus, a two-layer multilayer wiring structure is obtained. That is, the above-mentioned The predetermined portion where the through hole 19 is drilled is as follows:
This is a portion within an intersection 21 where the first layer arrangement 13 and the second layer wiring 15 intersect in a plane parallel to the surface of the substrate 11.

In such a multilayer wiring structure, aluminum or various aluminum alloys are usually used as the wiring material for the first layer arrangement 13 and the second layer wiring + 51fr, but in addition to aluminum, there are also materials with high melting points. Metals, polycrystalline silicon doped with impurities, metal silicides, or composite materials combining these may also be used.

Also, interlayer insulation film +7! The insulating material used is silicon oxide, enriched material, or the like.

Next, the through holes shown in FIGS. 4(A) and 4(B) will be roughly explained in detail.

Conventionally, as an example of a power supply circuit configured using through holes, E CL (Em
Itter-Coupled Lo9ic (emitter coupled logic) circuits are known. When this 201 circuit is configured with wiring made of aluminum, a power supply current of several tens (mA) to several hundred (mA) is generated through the above-mentioned through hole between the first layer arrangement 1A13 and the second layer wiring 15. will flow. Therefore, the first layer arrangement 13, through holes 19, and second layer wiring 15 are constructed with relatively large dimensions, with a width and hole diameter of several tens of μm to several hundred μm, in order to cope with the above-mentioned large current. It is necessary to reduce the current density. In other words, the normal allowable current density is approximately 1 x
In order to set it to 10'(A/am') or less, it is necessary to increase the width of the above-mentioned wiring pattern and the area where the through holes are provided. In this way, since the hole is formed in a relatively large area at the intersection 21, the conventional through hole 19 is formed along the center line I-I or the center of the first layer wiring 13 and the second layer wiring 15. One rectangular shape is arranged with contours parallel and perpendicular to each of the lines II-II (Fig. 4 (A)
reference).

(Problems to be Solved by the Invention) However, the conventional through-hole structure has a problem in that local current concentration occurs and so-called electromigration, such as voids and gaps, occurs.

Hereinafter, the above-mentioned current concentration will be explained in detail with reference to the drawings.

FIG. 4(C) is an enlarged plan view of the main part of the through hole described in FIGS. 4(A) and 4(B).

First, as can be understood from FIG. 4(C), a line segment that defines the intersection 21 of the first layer wiring 13 and the second layer wiring 15 and crosses each wiring is defined as x-x 'Or Y-Y'
Here, A1 corresponding to the end of the through hole 19 is located on the first layer wiring 13 and on xx' shown in the figure.
and 43%, and set the midpoint between these At and A3 as A2
shall be. Considering the current path that passes through each of these points A, ~A3, via the through hole 19, and reaches Y-Y' on the second layer wiring 15, the point illustrated on Y-'/' B
, each route has the minimum distance. Also, when comparing the lengths of these three paths, the distance M from xx' and Y-Y' to the through hole is a, and furthermore, xx'
If the length of the through hole 19 along the path is d, then the length of each path is A3 B = a + b. The relationship 71 holds for "1>π2B>. Therefore, among the above-mentioned paths, A3B has the shortest distance and the lowest resistance value, and the end of the through hole 19 related to this path is the current concentration point. It is thought that it will be 23.

In fact, in a semiconductor device configured with such a conventional through-hole structure, the aforementioned voids and hillocks are frequently generated in the portion of the current concentration point 23, and the device (circuit) is designed in consideration of the allowable current density. Even when designed, there is a problem in that electromigration occurs after a certain period of time, resulting in wiring defects.

Furthermore, even if it does not lead to wiring defects, it is necessary to take into consideration the uneven distribution of current density due to the aforementioned current concentration points and to provide some margin in the design of the wiring structure.

In view of the above-mentioned conventional problems, an object of the present invention is to provide a through-hole structure that can reduce the effects of current concentration in the through-hole, and thereby provide a highly reliable semiconductor device M with few wiring defects. There is something to do.

(Means for Solving the Problems) In order to achieve this object, the through-hole structure of the present invention provides that the first layer wiring and the second layer wiring are connected to each other through an insulating film between the eyebrows. In a through-hole structure where holes are made in the glabellar insulating film at the intersection, the requirements that the through-hole meets when viewed from above are: ■The center line of the first layer wiring and the center line of the second layer wiring as described above. A wall surface is defined as a surface including a line segment parallel to the base of an isosceles triangle whose apex is the intersection with the center line of the cylinder and the two short sides of the two center lines of the second layer wiring.

■When the through hole including the above-mentioned wall surface is separated by the wall surface, it is formed so as to extend on the opposite side from the above-mentioned first layer wiring into which current flows and second layer wiring through which current flows out. It is characterized by

(Function) According to the through-hole structure of the present invention, with the above configuration, the sum of the distance from one wiring side to the wall surface of the through hole and the distance from the other wiring side to the wall surface is It always remains almost constant. Therefore, in the conventional through-hole structure, the minimum value of the above-mentioned sum is given, and a current concentration point is formed, whereas in the structure of the present invention, the current concentration point is dispersed at the end of the wall surface. It consists of a structure.

(Embodiments) Hereinafter, embodiments of the through-hole structure of the present invention will be described with reference to the drawings. It should be noted that the drawings provided in the following explanation are merely schematic illustrations to facilitate understanding of the explanation, and the present invention is not limited only to these illustrated examples. In the description, only the planar shape of the through-hole structure of the present invention will be illustrated, and the cross-sectional shape will be omitted.

11 Figure 1 (A) is used to explain the first embodiment, Figure 4 (
In Figure 0, which is an explanatory diagram showing the same main part plane as C),
Components having the same functions as those already described are designated by the same reference numerals, and detailed description thereof will be omitted. Furthermore, in the plan views provided in the following explanation, through-hole portions are shown with hatching in order to facilitate understanding of the explanation.

In this first embodiment, the first layer wiring 13 has the same width.
The explanation will be based on the case of an "L-shape" in which the and second layer wiring 15 intersect at right angles at the intersection 21, and each wiring extends only in the direction of current inflow or outflow with the intersection 21 as the center. do.

First, the center line I-I of the first layer wiring 13 and the second layer wiring S! !
Consider a right-angled isosceles triangle 25a whose apex is the intersection point P+'a with the center line ■-■ of +5, and whose two short sides are the center lines. Furthermore, as already explained in the related art, the permissible current can be increased by making the area of the through hole as large as possible. Therefore, the base 27a of the triangle 25a described above is translated in parallel to the snow to coincide with the intersection point P of the center lines so that it becomes the largest line segment within the intersection 21, and is defined as a line segment 29a.

A wall surface 31at is set as a surface that includes this line segment 29a and is perpendicular to the extending direction of the glabellar insulating film 19 (not shown).

Hereinafter, regarding the above-mentioned wall surface 31a, the current concentration point will be considered in the same manner as described with reference to FIG. 4(C).

As shown in Figure 1 (A), the first layer layout! ! 13 and the second layer wiring 15, and a line segment that crosses each wiring is defined as x-x" or Y-Y', respectively. Here, the end of the wall surface 31a mentioned above is .

and D2, and D, P, = 02ρ1. From these D+, P+ and D2, the above x-x
'or Y-Y', move the legs of the perpendicular lines from 1 to A.
3 or B, ~B3. Furthermore, A, A3 and Bias, that is, the width that the wall surface 31a occupies in the wirings 13 and 15 are d and AI D.

Alternatively, each distance M of 83D2 is assumed to be a.

When considering the current path passing through each point determined in this way, the following is obtained. Here, as can be understood from FIG. 1(A), other than these three current paths, the above-mentioned wall surface 31a
The distance is the same for any route passing through the points above.

In addition, to briefly describe the relationship between the current paths as described above, it is not limited to the illustrated example;
1 and parallel to the wall surface 31a described above, it is clear that the same relationship as described above can be satisfied.

As is clear from the above explanation, the above wall surface 31a
@ If the through hole 33a is opened so that the demarcating line segment 29a is the shortest distance from each wiring 13 and 15, a local current concentration point 23 as explained in FIG. 4(C) can be created. It is possible to substantially eliminate the problem.

Therefore, the through hole including the above-mentioned wall surface is
aj! If the line segment 29a (or the wall surface 31a ) Any of the points above acts as a current concentration point, and local current concentration can be avoided.

Such a wall surface 31a! As an example of a through hole defined by a surface including a through hole 338, the planar shape is a right isosceles triangle as shown by hatching in FIG. 1(A)! When formed, current concentration points were substantially eliminated and the frequency of wiring failures could be reduced. In other words, by applying the through-hole structure of the present invention, wiring defects can be avoided even if the design current density is set to a value close to the allowable current density of the wiring material.
Restrictions on the design of semiconductor snowmaking can be reduced.

11 Next, a second embodiment will be described with reference to the plan view of the main part shown in FIG. 1(B).

In this second embodiment, the first layer wires 13 have the same width.
A case will be described in which the wiring structure is applied to a "T-shaped" wiring structure in which the and second layer wiring 15 intersect at right angles at the intersection 21, and the second layer wiring 15 extends on both sides with the intersection 21 as the center. do.

First, as in the first embodiment, the center line I of the first layer wire 13
Consider a right-angled isosceles triangle whose apex is the intersection point P2 between -I and the center line ■-■ of the second layer wiring 15, and whose two short sides are the two center lines. Considering the current path in this T-shaped arrangement, two inflow paths and one outflow path, or one inflow path and two outflow paths can be considered. Therefore, a triangle similar to the right isosceles diagonal 25a explained in the first example is a right isosceles triangle 25 whose apex is the intersection point P2 of the center lines, as shown in FIG. 1(B).
There are two possibilities: b and 25c. This triangle 25t)
and 25c, the wall surface 3
1b and 31c are set. Based on these two wall surfaces 31b and 31c, the through hole 33 is arranged so that the line segments 29b and 29c that define the surfaces 31b and 31c are the shortest distance from the wiring 13 and the wiring SH5 on each side.
bf? Open a hole.

As can be understood from the above explanation and FIG. 1(B), when the through-hole structure of the present invention is applied to a single-shaped wiring structure, The structure is applied to two locations to set the through holes 33b.

11. Next, a third embodiment will be described with reference to the plan view of the main part shown in FIG. 1(C).

In this third embodiment, the first layer wires 13 have the same width.
and the second layer wiring 15 intersect at right angles at the intersection 21, and the first layer wiring 13 and the second layer wiring 1
A case will be described in which the present invention is applied to a wiring structure forming a "cruciform shape" in which 5 and 5 extend on both sides.

First, as in the first and second embodiments, the first layer M! 13
Consider a right-angled isosceles triangle whose apex is the intersection point P3 between the center line I-I and the center line ■-■ of the second layer wiring 15, and whose two short sides are the center lines.

The current path in this cross-shaped wiring structure is such that the first layer wiring 13 has two inflow paths and the second layer wiring 15 has two outflow paths, or the first layer wiring 13 has two outflow paths. It is conceivable that there are two outflow paths, and the second layer wiring 15 serves as two inflow paths. Therefore, a triangle similar to the right isosceles triangle 25a described in the first embodiment is
As shown in Figure (C), a total of four right-angled isosceles triangles 25d to 259 are considered, each having an apex at the intersection P3 of the center lines. Each base 2 corresponding to these triangles 25d to 259
Line segment 29d obtained by translating 76 to 279 in the same way as above
~299, wall surfaces 316 to 319 are set. Based on these four wall surfaces 31d to 319, line segments 29d to 319
The through hole 33c is opened so that the hole 299 is the shortest distance from the wirings 13 and 15 on each side.

As can be understood from the above explanation and Figure 1 (C), when the through-hole structure of the present invention is applied to a cross-shaped wiring structure, the structure is similar to that of the L-shaped wiring structure explained in the first embodiment. By applying this to 4 locations, the through hole is 33G! This will be set.

Above, the first to third implementations are explained regarding the wiring structure in which the first layer wiring 13 and the second layer wiring 15, which are divided into L, T, and cross shapes and have the same width, intersect at right angles at the intersection 21. Explained as an example. However, the through-hole structure of the present invention is not limited to the above-mentioned wiring structure.

Other embodiments will be briefly described below with reference to the drawings.

First, at the intersection 21 of the first layer wiring 13 and the second layer wiring 5I 115, which have the same width, in the case where these two wirings intersect at a predetermined angle θ, The L, T, and X shapes are shown in the order of FIGS. 2A to 2C in the same manner as FIGS. 1A to 1C.

As can be understood from these figures, when wires intersect with each other at a predetermined angle θ, the apex angle is θ (0°<θ<
A through hole is formed by a combination of isosceles triangles (180°). Here, the above angle θ is the center line I
Of the angle formed by the intersection of -I and ■-■, this will be explained as the angle on the same side as the wiring as the current inflow path and current outflow path.

For example, as shown in FIG. 2(A), when the first layer wiring 13 and the second layer wiring 15 intersect in an L-shape at an intersection point P4, the point P is defined as the tr apex. isosceles triangle 25
h and the base 27h are determined, and based on these, a line segment 29h and a wall surface 31ha are set, and a through hole 33d is opened.

Also, as mentioned above, in the case of a single-shaped wiring structure,
Isosceles triangle 25 with intersection point P8 as the vertex and apex angle θ
i, an isosceles triangle 25j whose apex angle is (180°-θ) in the illustrated example, and the corresponding bases 27i and 27j. After that, the sides 27i and 27
A line segment 29i and a line segment 29j, and a wall surface 31i and a wall surface 31j are determined from j, and a through hole 33e as shown in FIG. 2(B) is formed.

Roughly speaking, even when the first layer wiring 13 and the second layer wiring 15 intersect at an angle θ in an X-shape, the second layer
A through hole 33f as shown in Figure (C) is set.

Although the embodiments of the present invention have been described in detail above, it is clear that the through-hole structure of the present invention is not limited to the embodiments described above. In each of the embodiments, wirings having the same width intersect with each other at a right angle or at a predetermined angle θ (explained roughly).

However, for example, FIG. 1(A) and FIG. 2(A)
As can be understood from FIG. 3A, which corresponds to FIG. 3A, the same effect as described above can be obtained even when the through holes 339 have different widths of intersecting wires.

In general, the through-hole structure of the present invention is not only effective by combining isosceles triangles, but also includes at least a wall surface that satisfies the above-mentioned conditions (for example, as shown in FIG. 3(B)). It can be designed as a semicircular through hole 33h, or as various polygons such as a diagonal or a quadrilateral other than an isosceles triangle.In such a case, the installation area of the through hole is relatively large. It is possible to take.

It is clear that any suitable design changes and modifications may be made to these shapes, arrangement lfm relationships, dimensions, and other conditions without departing from the scope of the invention.

(Effects of the Invention) As is clear from the above explanation, according to the through-hole structure of the present invention, by having the above-mentioned configuration,
The sum of the distance from one wiring side to the wall surface of the through hole and the distance from the other wiring side to the wall surface is constant. Therefore, the structure is such that the current concentration points at the ends of the through holes are dispersed.

Therefore, for example, it is possible to provide a through-hole structure that can reduce the effects caused by current concentration in through-holes used in power supply circuits, thereby providing a highly reliable semiconductor device with fewer wiring defects. .

[Brief explanation of the drawing]

FIGS. 1(A) to (C) are explanatory diagrams showing the main part of the through hole in plan view in order to explain an embodiment of the through hole structure of the present invention. FIGS. 2(A) to (C) and 3 What are diagrams (A) and (B)?
In order to explain other embodiments, FIGS. 4(A) to 4(C) are explanatory diagrams showing planes of principal parts of through holes, and are explanatory diagrams of the prior art. 11... Board, 13... First layer wiring 15...
・Second layer wiring, 17... interlayer insulating film 19, 33a~
33h...Through hole, 21...Intersection 23
...Current concentration points 25a to 259...Right-angled isosceles triangles 25h to 25
j...Isosceles triangle 2? a~27j...base, 29a~29n...
Line segments 31a to 31n... Wall surface I-I, ll-11... Wiring center line P1 to P6.
...Intersection of center lines. (A) 13 First layer wiring
■-15-M double layer wiring 21 intersection
d25a-25c Right-angled isosceles triangles 27a-27c Bases 29a-29c, line segments 31a-31c, wall surfaces 33a, 33b Through holes I-I, II-II: Center line
(B) X-X, Y-Y: Line A that defines the intersection, ~Am: Point B on X-X, ~B3, point on Y-Y
- Intersection of PI, P2 and center line 7. D2: End of the wall a Distance d from the through hole to X-X and Y-Y, width of the through hole Figure 1 - Date 11N 26th 2. Name of the invention Through-hole structure 3. Relationship with the person making the amendment Patent applicant address (〒-105) 1-7-12 Toranomon, Minato-ku, Tokyo Name (029) Oki Electric Industry Co., Ltd. Representative Komura Polarization 4 agent 170 ffi (988)5563
Address: 1-20-56 Higashiikebukuro, Toshima-ku, Tokyo Target of correction (1) Figure 1 (A) of the drawing! Correct as shown in the attached correction diagram. 13: First layer wiring 15: Second layer wiring 21: Intersections 25a to 25c: Right angled isosceles triangles 31a to 31c: Wall surfaces 33a, 33b Varnished through holes II, II-II: Center line X-X' , Y-Y': Line A1~ that defines the intersection
Point 81 on A:+: Distance to Y' d Width of varnish through hole Figure 1

Claims (1)

[Claims] (1) In the structure of a through hole formed in an interlayer insulating film at an intersection between a first layer wiring and a second layer wiring that are provided through an interlayer insulating film, the through hole is formed in the first layer wiring. The wall surface includes a line segment parallel to the base of an isosceles triangle whose vertex is the intersection of the center line of the center line and the center line of the second layer wiring, and whose two short sides are the center lines, The through-hole structure is formed on the opposite side of the first layer wiring through which current flows and the second layer wiring through which current flows out.