JPH0191552A - Data transmission equipment - Google Patents

Abstract

PURPOSE:To attain a processing such as recovery by giving the abnormality of a data terminal equipment connected to a node station as control information, returning it to the station of a transmission station, thereby detecting the abnormality of the data terminal equipment with a transmission station. CONSTITUTION:A node station 1 is provided with the 1st means operated in case of a reception station, detecting whether or not a terminal equipment 3 connected to the station 1 is abnormal and informing the abnormality of the terminal equipment to a common transmission line 2 as the control information when the abnormality is taken place, and the 2nd means informing the abnormality of the terminal equipment to the data terminal equipment 3 connected to the station in case of detecting the abnormality of the terminal equipment of reception destination by looking for the control information on a transmission line circulation data. Thus, the state of the reception state is informed directly to the transmission station and retrial from the transmission station is attained surely.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a data transmission method between a plurality of node stations and a plurality of terminals connected to them on a common transmission path, and in particular, a method for transmitting data between a plurality of node stations and a plurality of terminals connected thereto on a common transmission path. The present invention relates to a data transmission device that reliably guarantees data transfer even when an abnormal state occurs.

[Conventional technology]

Conventionally, in data transmission between terminals in a system, in one-to-one communication, ACK/NACK is exchanged between terminals, and even if a transmission error or a buffer busy state occurs, data transfer is ensured by retrying at the terminal. Ta.

On the other hand, in the recently popular distributed processing systems, it is necessary to send the same data from one terminal to a plurality of other terminals and perform various processing on each terminal, making broadcast communication useful.

In addition, without using the above protocol, JP-A-57-101
There is a data transmission method, such as No. 450, in which the destination node station writes a response to some of the data between node stations connected in a loop to notify the source node station of the status of the source node station. .

[Problem that the invention seeks to solve]

Applying the same transmission method as the previous one-to-one communication to this communication has problems in terms of increasing the load on the transmission path and increasing the communication time. There was a problem that communication could not be accommodated efficiently.

Furthermore, recent large-scale network systems connect multiple data terminals to one node station due to cost considerations, and in this case, JP-A No. 57-101450 only deals with the exchange between node stations; There is no mention of data transmission between data terminals or the distinction between node station status and data terminal status.

An object of the present invention is to provide data transmission to ensure data communication for various communication methods (broadcast communication, one-to-one, one-to-n, n-to-n pair, etc.) between terminals (particularly CPUs) in a loop network. The purpose is to provide a method.

[Means for solving problems]

The first invention is to carry an abnormality in a data terminal connected to a node station as control information and send it back to a transmitting station.

The second invention incorporates the abnormal state of the node station as well as the data terminal into the middle number of the control information, sends it back to the transmitting station, and the transmitting station separates these two abnormalities. did.

[Effect]

According to the first invention, the transmitting station becomes aware of the abnormality of the data terminal, making it possible to perform recovery and other processing.

According to the second invention, it is possible to determine whether the abnormality is in the terminal or the node station and perform processing accordingly.

〔Example〕

FIG. 4 is an overall configuration diagram of the loop system of the present invention, in which a plurality of node stations 3 are connected via a common transmission path 2, and a plurality of data terminals 3 are connected to the node station 1.
connects. The data terminal 3 is often composed of a computer. The data terminal 3 performs communication in the order of its own node station 1→transmission line 2→other data terminal 3. The response is communicated in the following order: other data terminal 3 -> own node station 1 -> transmission path 2 -> data terminal.

FIG. 4 shows an example of a frame structure flowing on a transmission path used in this embodiment.

FH: Frame header, indicating the beginning of this frame. There are many cases where the synchronization code is also used.

DA: Receiving station address.

SA: transmitting station address.

C: Control information, consisting of bit information CI and 02.

INF...Data.

Fe2: Frame check sequence.

Specifically, it is for CRC check from DA to INF.

FIG. 1 shows an embodiment of a node station 1 and a data terminal 3 of the present invention. This embodiment consists of the following configuration.

Node station: communicates with other node stations via the common transmission path 2. What is particularly new in this node station 1 are the control information rewriting circuit 16, the status control circuit 25, and the various signals sent through these circuits.

Receiver 32. Transmitter 33 receives data on transmission line 2 and transmits data from node station 1.

Delay circuit 4: A circuit that ensures continuity of data on the transmission path 2.

Decoder 5: Decodes the frame structure on the transmission path 2 (deciphers FH, DA, SA, etc.).

Encoder 6: Encodes various data within the node station 1 into the frame format shown in FIG.

The main function is para/series conversion.

Internal bus 7.8...Bus 7 is a reception bus, and bus 8 is a transmission bus.

Terminal interface module 9: Consists of various checking mechanisms, sending mechanisms of the node station, and an interface mechanism with the terminal 3, and consists of various components for realizing these mechanisms, as will be described later.

Control information rewriting circuit 16...One circuit is provided for each node station, and creates control information C determined by the reception state at the node station.

Control information C consists of C1 and C2, and when the yacht is in the receiving state, (Ct, Cz) is (0,O), (0,1)(
1, O), (1, 1). The reception status will be described in detail later.

Address check circuit 10...Checks whether DA matches its own address.

Address addition circuit 11: Adds its own address upon transmission.

Control information check circuit 12...Checks the control information C in the received frame.

Control information addition circuit 13...When transmitting, control information C
Add.

FCS check circuit 14...F in the received frame
Perform CS check.

FC8 addition circuit 15: Adds Fe2 upon transmission.

Reception data buffer 17: stores data INF in the received frame.

Reception control circuit 18: Controls writing of data INF to reception data buffer 17.

Transmission data buffer 2o: stores data for transmission.

Transmission control circuit 19: Reads data INF from the buffer 20 and controls transmission.

Terminal data transmission control circuit 22: Controls sending the data INF in the reception data buffer 17 to the data terminal.

P/S converter 22...data INF to data terminal 3
Converts to a bara-shiri format for transmission.

S/P converter 24...Converts data for transmission from the data terminal 3 into serial-parallel data.

Terminal data reception control circuit 23 . . . controls writing of control signals of the P/S converter 22 to the transmission data buffer 20.

Status control circuit 25: A circuit for communicating the status of the node station to the data terminal 3, and for communicating the status of the data terminal 3 to the node station.

FH detection circuit 30. FH rewriting circuit 31...The former detects FH in a frame, and the latter adds FH during transmission.

The above are the contents of the components shown in FIG. FIG. 2 shows the operation flow of the original transmitting node station in receiving round data in such a system, and FIG. 3 shows the operation flow of the receiving node station.

Below, the operation of the system shown in FIG. 1 will be explained using FIGS. 2 and 3.

The node station 1 connects the terminal 3 to the common transmission path 2 via the terminal interface module 9.

When transmitting data from a terminal, the data is input to the terminal data reception control circuit 23 and S/P converter 24 in the terminal interface module 9 via the transmission data line 27. In this embodiment, the data is input to the terminal 3 and the node station. Data is exchanged between the two in serial using the HDLC frame format. The terminal data reception control circuit 23 performs flag detection, etc., creates a timing signal to the S/P converter, an address to the transmission data buffer 20, a timing signal, etc., and takes in data from the terminal to the transmission data buffer 20. Once the data is taken into the buffer, control is transferred from the terminal data reception control circuit 23 to the transmission control circuit 19. On the other hand, the FH detection circuit 30 constantly monitors whether the transmission line is empty or not. FH
When the transmission control circuit 19 detects that the transmission line is empty based on this information stored in the transmission line, the transmission control circuit 19 stops bypassing the transmission line data using the delay circuit 4, and the FH rewriting circuit 31 causes the transmission line to be cleared. After writing the pattern FH indicating that the address adding circuit 11, control information inserting circuit 13 . Transmission data buffer 20. It controls the FC8 addition circuit 15 and sends the frame shown in FIG. 5 to the transmission data bus 8 in the node station. The sent data is output to the transmission line 2 via the encoder 6 and the transmitter 33. Note that the delay time in delay circuit 4 is FH
This is equal to the time from when the detection circuit 30 detects an empty transmission line to when the FH is rewritten by the FH rewriting circuit 31, and ensures continuity of data on the transmission line.

Next, the reception operation at the node station will be explained. When data is input from the transmission path 2 to the reception data bus 7 via the receiver 32 and decoder 5, the FH detection circuit 30 first checks whether or not there is data (if it is not available, it is assumed that there is data). , if there is data, the address check circuit 10 checks whether the DA is the own terminal interface module address (same as the terminal address), and if it is addressed to the own terminal interface module, notifies the reception control circuit 18 to that effect. do.

The reception control circuit 18 takes in only the data INF exchanged between the terminals into the reception data buffer 17.

In parallel with this, the FCS check circuit 14 checks DA to I.
Calculate the CRC up to NF and compare it with Fe2 of the frame. If they do not match, the received data is discarded, and if they match, control is transferred to the terminal data transmission control circuit 22, where a flag is created and at the same time the P/S converter 21
, an address and a timing signal for the receive data buffer 17, and convert the received data into an HDLC frame and send it to the terminal 3 via the receive data line 26.

The above is the basic operation of data transmission and reception in the node station 1. Further, a plurality of terminal interface modules 9 can be connected to the transmission/reception data bus of the node station 1, and a plurality of terminals can be accommodated in one node station. Note that contention control between terminal interface modules 9 during data transmission will be omitted here.

The operation of the node station, which is a feature of the present invention, will be described above with reference to FIGS. 1 to 3 and 5. When the node station 1 transmits a frame, the control information insertion circuit 13 inserts (Cl, Ca) into the C field.
0, O).

When this frame passes through the transmission line 2 and is input to each terminal interface module 9 in the system, each terminal interface module 9 checks the address check circuit 1.
0 information (whether DA matches your address or not),
Information on the reception control circuit (whether the reception data buffer 17 is empty or not) and information on the terminal status line 29 (whether the terminal 3 is operational or not and whether the reception buffer of the terminal 3 is empty or not) is sent to the status control circuit. 25, and notifies the control information rewriting circuit 16. Control information rewriting circuit 16
Now, based on the above information, if the DA does not match (Cle Cz) but the terminal is not automatic (0°0) (leave the transmission pattern as is and do not rewrite it), the DA matches,
If the receive data buffer is not empty (1, O),
If the DA matches and the reception buffer of the terminal 3 is not empty, it is rewritten as (0, 1).If the DA matches and the reception data buffer and the reception buffer of the terminal 3 are empty, it is rewritten as (1, 1). When this frame passes through the transmission path 2 and is input to the terminal interface of the transmission source, it is detected as one-time data. The control information rewriting circuit 16 is designed to reflect the status of each terminal interface module even when frames addressed to multiple terminal interface modules in one node station are input (broadcast communication). Only one is provided at the station. Furthermore, since C may have already been rewritten at the upstream node station, this information can also be monitored. When a plurality of receiving terminal interface modules exist in the system, C is rewritten in this embodiment so that if there is an abnormality in even one module, it can be reliably reported to the sender. For example, if the status of one terminal interface module is (1, 1) but there is another status (1, 0), C can be rewritten to (1, 0).

In the terminal interface module 9 of the transmission source, the address check circuit 10 detects a part of the frame in which C has been rewritten as described above, when the SA matches its own address. When a cycle frame is detected, the control information check circuit 12 checks C of that frame. If the result (C1°Cz) is (0, O), it is determined that the node station has a semi-permanent failure, and the status control circuit 25 notifies the terminal via the status notification line 28. Also, in the case of (0, 1), the terminal is considered abnormal.

In the case of (1, 1), the terminal is similarly notified as a normal termination. On the other hand, in the case of (1, O) and the FCS of one-round data
If an error is detected, it is determined that a temporary abnormality in the node or an error in the transmission path has occurred, and the transmission control circuit 19
The server notifies the user of this fact and attempts to send the frame.

In this way, the status of the receiving station (node station and terminal) is notified to the transmitting station, and data transfer between the terminals can be ensured by the node station and terminal attempting to connect.

Note that this embodiment is only one example of the present invention, and other methods of notifying the transmitting station of the receiving station status and other classifications of the receiving station status are possible. Further, the terminal abnormality example may include terminal abnormalities other than buffer busy.

FIG. 6 shows an embodiment of the data terminal 3, which includes a transceiver 40. Transmitter/receiver 412 communication control section 42. Input/output port 43. MPU (microprocessor >45.
ROM46. It consists of a RAM 47°, a DRAM 48, and a clock oscillator 44.

This data terminal 3 is an example of a personal computer. MPU45
The RAM 47 stores various types of data, and the MPU 45 processes and manages them.
AM (dynamic RAM) 48 sends data in HDLC format and DMA transfer format to data transmission buffer 27 in module 9 via communication control section 42 . Conversely, even during reception, the DRAM 48 performs communication control 4 in the DMA transfer format.
2 from the data reception buffer 17.

Store it in RAM47. Terminal reception buffer is RAM47
Since part of the circuit is common, it may be in the circuit 40.42. It may also be part of the DRAM 48.

Furthermore, various statuses are transmitted and received through the input/output port 43. The signal line 28 carries the status of terminals other than the terminal 3, and the signal line 29 carries the status of the terminal 3. Status determination at the terminal 3 is performed by the MPU 45.

The clock oscillator 44 is a clock for the communication control section 42 and the P/S converter 21 in the interface module 9.
．． Provides a clock for the S/P converter 24.

〔Effect of the invention〕

According to the present invention, the status of the receiving station can be directly notified to the transmitting station, and unlike the conventional method, ACK/NA
It is possible to reliably try to connect from the transmitting station without exchanging CK responses. Furthermore, it is possible to perform the same operation even in communication systems in which it is difficult to obtain a response, such as one-to-n communication and broadcast communication, and these can be efficiently accommodated in the same network system.

[Brief explanation of the drawing]

FIG. 1 is an embodiment diagram of the node station of the present invention, FIGS. 2 and 3 are operational flows of the node station featuring the present invention, FIG. 4 is a system configuration diagram to which the present invention can be applied, and FIG. FIG. 5 is a diagram of frames exchanged between node stations, and FIG. 6 is a diagram of an embodiment of a data terminal. 1... Node station, 2... Transmission line, 3...
・Terminal, 10...Address check circuit, 12...
Control information check circuit, 13... control information insertion circuit,
16... Control information rewriting circuit, 25... Status control circuit, 28... Status notification line, 29...
Terminal status line.

Claims (1)

[Claims] 1. A data transmission device comprising a loop-shaped common transmission path, a plurality of node stations connected to the common transmission path, and a data terminal connected to the stations, wherein the node station a first means that operates in the case of a receiving station, detects whether or not a terminal connected to the station is abnormal, and in the case of abnormality, transmits information indicating that the terminal is abnormal as control information onto the common transmission path; a second means that is activated in the case of a station and notifies a data terminal connected to the station of a terminal abnormality when an abnormality of the receiving terminal is detected by looking at control information on the transmission path round data. Device. 2. In a data transmission device comprising a loop-shaped common transmission path, a plurality of node stations connected to the common transmission path, and a data terminal connected to the station, the node station is connected to the station. a first means for receiving a terminal status from a terminal being connected to a receiving station; a second means for forming control information by distinguishing the states of the terminals and transmitting the control information onto the common transmission path; a third means for notifying a data terminal connected to the station in the event of an abnormality in the node station, and for performing corresponding processing in the transmitting node station in the case of an abnormality in the node station. 3. The data processing apparatus according to claim 2, wherein the data terminal status from the data terminal in the first means is received from the data terminal prior to data reception. 4. The data processing according to claim 2, wherein the control information is sent together with data from a transmitting station, and the control information is formed by rewriting the sent control information. Device. 5. Claim 2, wherein the terminal abnormality refers to the fact that the reception buffer in the terminal is not empty, and the node station abnormality refers to the fact that the reception buffer in the station is not empty. The data processing device described.