JPH0188503U - - Google Patents
Info
- Publication number
- JPH0188503U JPH0188503U JP18510387U JP18510387U JPH0188503U JP H0188503 U JPH0188503 U JP H0188503U JP 18510387 U JP18510387 U JP 18510387U JP 18510387 U JP18510387 U JP 18510387U JP H0188503 U JPH0188503 U JP H0188503U
- Authority
- JP
- Japan
- Prior art keywords
- center conductor
- frequency signal
- input line
- bias network
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims description 5
- 239000012212 insulator Substances 0.000 description 3
- 238000000926 separation method Methods 0.000 description 2
Landscapes
- Waveguides (AREA)
- Waveguide Connection Structure (AREA)
Description
第１図は本考案の一実施例を部分断面で示した
正面図、第２図は本考案の第２の実施例の高周波
信号分離回路を部分断面で示した正面図、第３図
は従来のバイアスネツトワークの一例を示す部分
断面の正面図である。
１…同軸線路中心導体、２，６，７…絶縁体、
３１，３２，３３…高周波信号入出力端子、４…
直流入力端子、５…直流入力線、Ｌ…絶縁体６と
中心導体１の距離、Ｌ１，Ｌ２…信号分離点と絶
縁体７の距離。
FIG. 1 is a partially sectional front view of an embodiment of the present invention, FIG. 2 is a partially sectional front view of a high frequency signal separation circuit according to the second embodiment of the present invention, and FIG. 3 is a conventional FIG. 3 is a partially sectional front view showing an example of the bias network of FIG. 1... Coaxial line center conductor, 2, 6, 7... Insulator,
31, 32, 33...High frequency signal input/output terminal, 4...
DC input terminal, 5...DC input line, L...Distance between insulator 6 and center conductor 1, L1 , L2 ...Distance between signal separation point and insulator 7.
Claims (1)
入出力端子を接続し、前記中心導体に直流信号を
印加する直流入力線を接続したバイアスネツトワ
ークにおいて、前記中心導体から所定距離にある
前記直流入力線の個所に前記高周波信号と整合す
る整合回路を付加すると共に、前記直流入力線を
太くしたことを特徴とするバイアスネツトワーク
。 In a bias network in which a high-frequency signal input/output terminal is connected to a center conductor for transmitting a high-frequency signal, and a DC input line for applying a DC signal is connected to the center conductor, the DC input line is located at a predetermined distance from the center conductor. A bias network characterized in that a matching circuit for matching the high frequency signal is added at the location, and the DC input line is made thicker.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987185103U JPH0756481Y2 (en) | 1987-12-03 | 1987-12-03 | Bias network |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987185103U JPH0756481Y2 (en) | 1987-12-03 | 1987-12-03 | Bias network |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0188503U true JPH0188503U (en) | 1989-06-12 |
| JPH0756481Y2 JPH0756481Y2 (en) | 1995-12-25 |
Family
ID=31476431
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987185103U Expired - Lifetime JPH0756481Y2 (en) | 1987-12-03 | 1987-12-03 | Bias network |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0756481Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62196901A (en) * | 1986-02-25 | 1987-08-31 | Sumitomo Electric Ind Ltd | Bias superposing device for microstrip line |
-
1987
- 1987-12-03 JP JP1987185103U patent/JPH0756481Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62196901A (en) * | 1986-02-25 | 1987-08-31 | Sumitomo Electric Ind Ltd | Bias superposing device for microstrip line |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0756481Y2 (en) | 1995-12-25 |
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