JPH0186324U

JPH0186324U -

Info

Publication number: JPH0186324U
Application number: JP18179387U
Authority: JP
Priority date: 1987-11-27
Filing date: 1987-11-27
Publication date: 1989-06-07

Description

[Brief explanation of the drawing]

第１図から第４図は本考案の実施例を示し、第
１図は本実施例のアナログ・デジタル変換装置を
示すブロツク図、第２図ａ，ｂはアナログ信号が
小信号の場合と大信号の場合とにおける信号処理
の相違を示す波形図、第３図は第１図図示装置の
作動を示すタイミングチヤート、第４図イ，ロは
溶接２次ケーブルの断線モード及びその近傍磁界
の計測結果を示した図であり、第５図ａ，ｂは従
来のアナログ・デジタル変換回路を示すブロツク
図、第６図は従来の回路で小信号と大信号を信号
処理した場合の波形図である。１……比較回路、２……基準電圧設定回路、３
……ピークホールド回路、４……掛算回路、５…
…最大値選択回路、Ｅｐ……ピーク電圧、Ｅｏ…
…基準電圧、Ｅｃ……変換しきい値電圧、Ｅｎ…
…ノイズ成分電圧。 Figures 1 to 4 show an embodiment of the present invention. Figure 1 is a block diagram showing the analog-to-digital converter of this embodiment, and Figures 2a and 2b show a case where the analog signal is a small signal and a case where the analog signal is a large signal. Figure 3 is a timing chart showing the operation of the device shown in Figure 1. Figure 4 A and B are measurement of the disconnection mode of the welded secondary cable and its nearby magnetic field. Figures 5a and 5b are block diagrams showing conventional analog-to-digital conversion circuits, and Figure 6 is a waveform diagram when small signals and large signals are processed using the conventional circuit. . 1...Comparison circuit, 2...Reference voltage setting circuit, 3
...Peak hold circuit, 4...Multiplication circuit, 5...
...Maximum value selection circuit, Ep...Peak voltage, Eo...
...Reference voltage, Ec...Conversion threshold voltage, En...
...Noise component voltage.

補正昭６３．３．１図面の簡単な説明を次のように補正する。明細書第１２頁第４行から明細書第１２頁第７
行に「第５図ａ，ｂ…である。」とあるのを、「
第５図は従来のアナログ・デジタル変換回路を示
すブロツク図、第６図ａ，ｂは従来の回路で小信
号と大信号を信号処理した場合の波形図である。
」に補正する。Amendment 1986.3.1 The brief description of the drawing is amended as follows. Specification page 12, line 4 to specification page 12, line 7
In the line ``Figure 5 a, b...'', change it to ``
FIG. 5 is a block diagram showing a conventional analog-to-digital conversion circuit, and FIGS. 6a and 6b are waveform diagrams when small signals and large signals are processed by the conventional circuit.
”.

Claims

[Scope of utility model registration request]

A device for converting an analog signal having a noise component voltage and having a wide range varying between a small signal and a large signal into a digital signal, the device comprising: a peak hold means for holding a peak voltage value of the first cycle of the analog signal; , a multiplication means for multiplying the output voltage value of the peak hold means by a coefficient to output a voltage larger than the noise component voltage in the analog signal; and a reference voltage setting means for setting a reference voltage corresponding to a small signal in the analog signal. The maximum value selection means selects and outputs the larger output voltage of the multiplication means and the reference voltage setting means, and the analog signal and the output voltage of the maximum value selection means are compared, and the analog signal is output from the maximum value selection means. 1. An analog-to-digital conversion device comprising: comparison means for outputting a digital signal when the voltage is greater than the voltage.