JPH0182531U - - Google Patents
Info
- Publication number
- JPH0182531U JPH0182531U JP1987177053U JP17705387U JPH0182531U JP H0182531 U JPH0182531 U JP H0182531U JP 1987177053 U JP1987177053 U JP 1987177053U JP 17705387 U JP17705387 U JP 17705387U JP H0182531 U JPH0182531 U JP H0182531U
- Authority
- JP
- Japan
- Prior art keywords
- receiver
- switching circuit
- signal switching
- detection circuits
- antennas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 4
Description
第1図乃至第2図はこの考案に係る実施例を示
し、第1図はFM受信機の要部のブロツク図、第
2図は他の実施例を示す要部のブロツク図、第3
図は従来のFM受信機のブロツク図である。
主要部分の符号の説明、1:第1のアンテナ、
2:第2のアンテナ、3:信号切換回路、4:第
1のフロントエンド、5:第1のFM検波回路、
6:ステレオ復調回路、7:第2のフロントエン
ド、8:第2のFM検波回路、9:第3のフロン
トエンド、10:第3のFM検波回路、11:ア
ンテナ切換検出回路。
1 and 2 show an embodiment according to this invention, FIG. 1 is a block diagram of the main part of the FM receiver, FIG. 2 is a block diagram of the main part showing another embodiment, and FIG. 3 is a block diagram of the main part of the FM receiver.
The figure is a block diagram of a conventional FM receiver. Explanation of symbols of main parts: 1: first antenna;
2: second antenna, 3: signal switching circuit, 4: first front end, 5: first FM detection circuit,
6: Stereo demodulation circuit, 7: Second front end, 8: Second FM detection circuit, 9: Third front end, 10: Third FM detection circuit, 11: Antenna switching detection circuit.
Claims (1)
て前記アンテナの1つを選択するようにした信号
切換回路とからなるFM受信機において、 アンテナ選択用にのみ用いられるアンテナの数
に等しいFM検波回路を設け、これらのFM検波
回路の出力に基づき前記信号切換回路を制御する
ように構成したことを特徴とするFM受信機。[Claims for Utility Model Registration] In an FM receiver comprising at least two antennas and a signal switching circuit that selects one of the antennas depending on the reception condition, an antenna used only for antenna selection. 1. An FM receiver comprising: equal number of FM detection circuits, and configured to control the signal switching circuit based on the outputs of these FM detection circuits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987177053U JPH0182531U (en) | 1987-11-21 | 1987-11-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987177053U JPH0182531U (en) | 1987-11-21 | 1987-11-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0182531U true JPH0182531U (en) | 1989-06-01 |
Family
ID=31468734
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987177053U Pending JPH0182531U (en) | 1987-11-21 | 1987-11-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0182531U (en) |
-
1987
- 1987-11-21 JP JP1987177053U patent/JPH0182531U/ja active Pending
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