JPS58158548U - Receiving machine - Google Patents
Receiving machineInfo
- Publication number
- JPS58158548U JPS58158548U JP5645482U JP5645482U JPS58158548U JP S58158548 U JPS58158548 U JP S58158548U JP 5645482 U JP5645482 U JP 5645482U JP 5645482 U JP5645482 U JP 5645482U JP S58158548 U JPS58158548 U JP S58158548U
- Authority
- JP
- Japan
- Prior art keywords
- stereo
- circuit
- receiving circuit
- signal
- receiver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Circuits Of Receivers In General (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図、第２図は従来のＡＭ／ＦＭ切換え回路を示すブ
ロック図、第３図はこの考案の一実施例によるＡＭ／Ｆ
Ｍ切換え回路を示すブロック図である。
１はＦＭステレオ受信回路、２はＡＭ ｆｆ信四回路３
はＬ側出力切換スイッチ、４はＲ側出力切換スイッチ、
５はＬ側低周波増巾回路、６はＲ側低周数増巾回路、７
は電源端子、８は電源切換スイッチ、９はＡＭ出力分割
抵抗、１１は抵抗、１２はダイオード。
第２図1 and 2 are block diagrams showing conventional AM/FM switching circuits, and FIG. 3 is an AM/FM switching circuit according to an embodiment of this invention.
FIG. 3 is a block diagram showing an M switching circuit. 1 is an FM stereo reception circuit, 2 is an AM ff signal four circuit 3
is the L side output selector switch, 4 is the R side output selector switch,
5 is an L side low frequency amplification circuit, 6 is an R side low frequency amplification circuit, 7
is a power supply terminal, 8 is a power selection switch, 9 is an AM output dividing resistor, 11 is a resistor, and 12 is a diode. Figure 2
Claims (1)
るＦＭステレオ受信回路、ＡＭ信号を受信し復調信号を
発生するＡＭ受信回路、上記ＦＭステレオ受信回路とＡ
Ｍ受信回路とに選択的に給電する電源切換スイッチ、上
記ＦＭステレオ受信回路の動作時にステレオ復調信号を
増巾する複数の低周波増巾回路、上記ＡＭ受信回路の動
作時にその復調信号を上記各低周波増巾回路に分割して
与える複数の分割抵抗、上記各分割抵抗の中間接続点と
アースとの間に接続されたダイオード、上記ＦＭステレ
オ受信回路の動作時に上記ダイオードを順方向にバイア
スする抵抗を備えた受信機。An FM stereo receiving circuit that receives an FM stereo signal and generates a stereo demodulated signal, an AM receiving circuit that receives an AM signal and generates a demodulated signal, and the above FM stereo receiving circuit and A.
a power supply selector switch that selectively supplies power to the M receiver circuit; a plurality of low frequency amplification circuits that amplify the stereo demodulated signal when the FM stereo receiver circuit is operating; and a power supply selector switch that selectively supplies power to the FM stereo receiver circuit; A plurality of divided resistors are divided and applied to the low frequency amplification circuit, a diode is connected between the intermediate connection point of each of the divided resistors and the ground, and the diode is biased in the forward direction when the FM stereo receiving circuit is operated. Receiver with resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5645482U JPS58158548U (en) | 1982-04-16 | 1982-04-16 | Receiving machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5645482U JPS58158548U (en) | 1982-04-16 | 1982-04-16 | Receiving machine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58158548U true JPS58158548U (en) | 1983-10-22 |
Family
ID=30066982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5645482U Pending JPS58158548U (en) | 1982-04-16 | 1982-04-16 | Receiving machine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58158548U (en) |
-
1982
- 1982-04-16 JP JP5645482U patent/JPS58158548U/en active Pending
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