JPH0181794U - - Google Patents
Info
- Publication number
- JPH0181794U JPH0181794U JP1987177477U JP17747787U JPH0181794U JP H0181794 U JPH0181794 U JP H0181794U JP 1987177477 U JP1987177477 U JP 1987177477U JP 17747787 U JP17747787 U JP 17747787U JP H0181794 U JPH0181794 U JP H0181794U
- Authority
- JP
- Japan
- Prior art keywords
- processing unit
- central processing
- memory
- write
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000006870 function Effects 0.000 claims 2
- 230000004044 response Effects 0.000 claims 2
- 230000002401 inhibitory effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Information Transfer Systems (AREA)
- Dram (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987177477U JPH0181794U (lt) | 1987-11-24 | 1987-11-24 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987177477U JPH0181794U (lt) | 1987-11-24 | 1987-11-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0181794U true JPH0181794U (lt) | 1989-05-31 |
Family
ID=31469139
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987177477U Pending JPH0181794U (lt) | 1987-11-24 | 1987-11-24 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0181794U (lt) |
-
1987
- 1987-11-24 JP JP1987177477U patent/JPH0181794U/ja active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH0181794U (lt) | ||
JPS6348246U (lt) | ||
JPH0482735U (lt) | ||
JPH01144944U (lt) | ||
JPS59174629U (ja) | 入力回路 | |
JPH0191959U (lt) | ||
JPH03116446U (lt) | ||
JPS6438000U (lt) | ||
JPS59100337U (ja) | Dma制御回路 | |
JPH026344U (lt) | ||
JPS6457536U (lt) | ||
JPS6327952U (lt) | ||
JPS6065843U (ja) | メモリアドレス拡張回路 | |
JPS6392963U (lt) | ||
JPS6313497U (lt) | ||
JPS5851361U (ja) | マイクロコンピユ−タ制御回路 | |
JPS63199348U (lt) | ||
JPH0184152U (lt) | ||
JPS62196452U (lt) | ||
JPH02108144U (lt) | ||
JPS59118048U (ja) | 双方向ダイレクトメモリアクセス転送回路 | |
JPH0196047U (lt) | ||
JPS6095650U (ja) | スタツクのオ−バフロ−検出回路 | |
JPH02310749A (ja) | キャッシュ・メインメモリ制御方式 | |
JPS63114348U (lt) |