JPH0163224U - - Google Patents

Info

Publication number
JPH0163224U
JPH0163224U JP1987157381U JP15738187U JPH0163224U JP H0163224 U JPH0163224 U JP H0163224U JP 1987157381 U JP1987157381 U JP 1987157381U JP 15738187 U JP15738187 U JP 15738187U JP H0163224 U JPH0163224 U JP H0163224U
Authority
JP
Japan
Prior art keywords
gate
output
holds
receives
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987157381U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987157381U priority Critical patent/JPH0163224U/ja
Publication of JPH0163224U publication Critical patent/JPH0163224U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)
JP1987157381U 1987-10-14 1987-10-14 Pending JPH0163224U (it)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987157381U JPH0163224U (it) 1987-10-14 1987-10-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987157381U JPH0163224U (it) 1987-10-14 1987-10-14

Publications (1)

Publication Number Publication Date
JPH0163224U true JPH0163224U (it) 1989-04-24

Family

ID=31436771

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987157381U Pending JPH0163224U (it) 1987-10-14 1987-10-14

Country Status (1)

Country Link
JP (1) JPH0163224U (it)

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