JPH0158874B2 - - Google Patents
Info
- Publication number
- JPH0158874B2 JPH0158874B2 JP18170883A JP18170883A JPH0158874B2 JP H0158874 B2 JPH0158874 B2 JP H0158874B2 JP 18170883 A JP18170883 A JP 18170883A JP 18170883 A JP18170883 A JP 18170883A JP H0158874 B2 JPH0158874 B2 JP H0158874B2
- Authority
- JP
- Japan
- Prior art keywords
- emitting diode
- light
- diode element
- light emitting
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000011347 resin Substances 0.000 claims abstract description 19
- 229920005989 resin Polymers 0.000 claims abstract description 19
- 238000000465 moulding Methods 0.000 abstract description 3
- 238000007789 sealing Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0756—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
〈技術分野〉
本発明は発光ダイオード素子と、この素子の駆
動用ICとを一体的にモールドした構造の発光ダ
イオード装置に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a light emitting diode device having a structure in which a light emitting diode element and an IC for driving the element are integrally molded.
〈発明の背景〉
発光ダイオード装置に特別な機能を付加するた
め駆動用ICを一つの樹脂内に一体化することが
検討されている。例えば、バツテリーチエツカと
称し、発光ダイオード素子の印加電圧が一定の範
囲内にあるときだけ、発光ダイオード素子が点灯
するICが使用される。このICの回路図は第１図
に示す通りである。<Background of the Invention> In order to add special functions to a light emitting diode device, it is being considered to integrate a driving IC into one resin. For example, an IC called a battery checker that lights up a light emitting diode element only when the voltage applied to the light emitting diode element is within a certain range is used. The circuit diagram of this IC is shown in FIG.
ICは３個の端子を有し、第１端子１は電源の
＋端子に接続され、第２端子２は出力端子で、第
１端子１と第２端子２間に発光ダイオード素子３
０が接続される。第３端子３は電源の一端子に接
続され、第１端子１と第３端子３間に電源が接続
される。第１端子１と第３端子３間に電源電圧を
検出するため、２つの抵抗４と５が直列接続され
て、その接続点が２つの比較器６と７の＋側入力
端子に加えられる。電源の両端子１，３間に２つ
の基準電圧を作るため、２つの基準電圧素子８と
９が接続される。この素子８，９はツエナーダイ
オードやPN接合の順方向降下電圧を利用する回
路で構成される。素子８の基準電圧は比較器６の
一側端子に加えられる。素子９の基準電圧は比較
器７の一側端子に加えられる。比較器６と７の出
力はインバータ１０，１１と１２を介してフリツ
プフロツプを構成する２つのノアゲート１３，１
４のセツト端子とリセツト端子にそれぞれ加えら
れる。ノアゲート１４の出力はインバータ１５を
介し出力トランジスタ１６のゲートに加えられ
る。トランジスタ１６は限流抵抗１７を経て第２
端子２に接続される。 The IC has three terminals, the first terminal 1 is connected to the + terminal of the power supply, the second terminal 2 is the output terminal, and a light emitting diode element 3 is connected between the first terminal 1 and the second terminal 2.
0 is connected. The third terminal 3 is connected to one terminal of a power source, and the power source is connected between the first terminal 1 and the third terminal 3. In order to detect the power supply voltage between the first terminal 1 and the third terminal 3, two resistors 4 and 5 are connected in series, and the connection point thereof is applied to the + side input terminals of two comparators 6 and 7. Two reference voltage elements 8 and 9 are connected to create two reference voltages between the terminals 1, 3 of the power supply. The elements 8 and 9 are composed of Zener diodes or circuits that utilize the forward voltage drop of a PN junction. The reference voltage of element 8 is applied to one terminal of comparator 6. The reference voltage of element 9 is applied to one terminal of comparator 7. The outputs of comparators 6 and 7 are passed through inverters 10, 11 and 12 to two NOR gates 13 and 1 forming a flip-flop.
4 set and reset terminals, respectively. The output of NOR gate 14 is applied to the gate of output transistor 16 via inverter 15. The transistor 16 passes through the current limiting resistor 17 to the second
Connected to terminal 2.
従つて、電源電圧が1.6ボルトから10ボルトの
間を変化し、基準電圧素子８は検出電圧が3.15ボ
ルト、素子９は検出電圧が3.0ボルトに設定され
ていたとすると、電源電圧が充分高い場合、比較
器６，７はともにHighレベル出力となり、ノア
ゲート１３，１４が構成するフリツプフロツプの
出力はHighレベルであり、トランジスタ１６は
オフ状態にあり、発光ダイオード素子３０は不灯
状態である。次に電源電圧が少し低下して基準電
圧素子８の検出電圧以下に低下した場合、比較器
６はLowレベル出力となり、インバータ１０，
１１を通してノアゲート１３に加えられる。しか
しノアゲート１４の出力を変化させることができ
ないので、トランジスタ１６のオフは続き、発光
ダイオード３０は不灯のままである。更に電圧が
低下すると、比較器７の出力もLowとなり、こ
れがインバータ１２を介して加えられるのでノア
ゲート１４の出力をLowレベルに変化させ、ト
ランジスタ１６をオンにするので発光ダイオード
３０は点灯する。以上の動作を第２図に示す。 Therefore, if the power supply voltage changes between 1.6 volts and 10 volts, and the detection voltage of reference voltage element 8 is set to 3.15 volts and the detection voltage of element 9 is set to 3.0 volts, if the power supply voltage is high enough, Both the comparators 6 and 7 have high level outputs, the output of the flip-flop constituted by the NOR gates 13 and 14 is high level, the transistor 16 is in the off state, and the light emitting diode element 30 is in the non-lighting state. Next, when the power supply voltage drops a little to below the detection voltage of the reference voltage element 8, the comparator 6 outputs a low level, and the inverter 10,
It is added to Noah Gate 13 through 11. However, since the output of the NOR gate 14 cannot be changed, the transistor 16 remains off and the light emitting diode 30 remains unlit. When the voltage further decreases, the output of the comparator 7 also becomes Low, and this is applied via the inverter 12, changing the output of the NOR gate 14 to Low level and turning on the transistor 16, so that the light emitting diode 30 lights up. The above operation is shown in FIG.
そして、第２図に明らかなように、電源電圧の
上過過程においては高い側の基準電圧となるまで
は点灯を続け、高い基準電圧に達して初めて消灯
する。 As is clear from FIG. 2, in the process of an increase in the power supply voltage, the lamp continues to be lit until it reaches the higher reference voltage, and turns off only when the higher reference voltage is reached.
第１図のICは１mm2以下の面積に構成すること
が可能で、発光ダイオード素子をマウントするリ
ードフレームにマウントすることができる。 The IC shown in FIG. 1 can be configured to have an area of 1 mm 2 or less, and can be mounted on a lead frame on which a light emitting diode element is mounted.
〈発明の目的〉
本発明は上述のような回路を組込んだICチツ
プが発光ダイオードチツプに比較して同様に小さ
い形状に形成し得ることに鑑み、発光ダイオード
を駆動するICを一体的にモールドして、表示装
置の小型化を図り経済性を高めた表示装置を提供
する。<Objective of the Invention> In view of the fact that an IC chip incorporating the above-mentioned circuit can be formed into a smaller shape than a light emitting diode chip, the present invention provides a method for integrally molding an IC that drives a light emitting diode. The present invention provides a display device which is miniaturized and has improved economical efficiency.
〈実施例〉
本発明のIC内蔵発光ダイオード装置の構成図
面を第３図に示す。<Example> FIG. 3 shows a configuration diagram of a light emitting diode device with a built-in IC of the present invention.
リードフレームは３本足で構成されており、中
央のリード片３１は幅広に形成されている。この
幅広部分の中央部は、リードフレームを作る際に
凹部３６が形成されている。リード片３１の頂部
に周知の方法で発光ダイオード素子３０がマウン
トされ、そしてAlワイヤ３２が発光ダイオード
素子３０の電極とリード片３３間にボンデイング
される。上記凹部３６の中にIC４０がマウント
される。IC４０の第１端子１、第２端子２、第
３端子３、はそれぞれリード片３３，３１，３４
にそれぞれワイヤボンデイングされる。IC40は
黒色樹脂３５で封止される。発光ダイオード素子
３０は赤色発光をするので、暗赤色樹脂３７で発
光ダイオード素子３０とIC４０をモールドする。 The lead frame is composed of three legs, and the central lead piece 31 is formed wide. A recess 36 is formed in the center of this wide portion when making the lead frame. The light emitting diode element 30 is mounted on the top of the lead piece 31 by a well-known method, and the Al wire 32 is bonded between the electrode of the light emitting diode element 30 and the lead piece 33. The IC 40 is mounted in the recess 36. The first terminal 1, second terminal 2, and third terminal 3 of the IC 40 are lead pieces 33, 31, and 34, respectively.
are wire bonded to each other. IC40 is sealed with black resin 35. Since the light emitting diode element 30 emits red light, the light emitting diode element 30 and the IC 40 are molded with dark red resin 37.
上記のようにリードフレームの側面に凹部３６
を設け、その中にIC４０を埋め込み樹脂封止す
るものであり、モールドする黒色樹脂３５は薄い
樹脂で塗布面積等も少なくてよく、かつ下記のよ
うに遮光性を十分満足させて、通常の発光ダイオ
ード装置と同程度の大きさで小型化したIC内蔵
型表示装置が得ることができる。 As mentioned above, there is a recess 36 on the side of the lead frame.
The IC 40 is embedded in the IC 40 and sealed with resin.The black resin 35 used for molding is a thin resin that requires less coating area, and satisfies light shielding properties as described below, allowing normal light emission. It is possible to obtain a miniaturized IC built-in display device with a size comparable to that of a diode device.
遮光性については、本発明は発光ダイオード素
子３０をリードフレームの頂部にマウントし、
IC４０をリードフレームの側面にマウントした
から、IC４０は発光ダイオード素子３０の自発
光による光の影響を受けることがない、。また赤
色発光ダイオード素子３０に対し暗赤色樹脂でモ
ールドしたから、発光ダイオード素子３０の発光
は透過させ、且つ外部光がIC４０に照射される
のを防止する。暗赤色樹脂の光透過特性は第４図
に示す通りである。またIC４０はリードフレー
ムに凹部３６を形成し、この凹部３６の中にマウ
ントし、更に黒色樹脂で封止したから外部光の影
響を除くことができる。また上記実施例は発光ダ
イオード装置の外形を全く変化させることなく
ICを一体にモールドすることができる。以上の
ようにして発光ダイオード素子とその駆動ICを
一体的にモールドして使用することができる。 Regarding the light shielding property, the present invention mounts the light emitting diode element 30 on the top of the lead frame,
Since the IC 40 is mounted on the side surface of the lead frame, the IC 40 is not affected by light emitted by the light emitting diode element 30. Further, since the red light emitting diode element 30 is molded with dark red resin, the light emitted from the light emitting diode element 30 is transmitted, and external light is prevented from irradiating the IC 40. The light transmission characteristics of the dark red resin are as shown in FIG. Further, since the IC 40 is formed with a recess 36 in the lead frame, mounted in this recess 36, and further sealed with black resin, the influence of external light can be removed. Moreover, the above embodiment does not change the external shape of the light emitting diode device at all.
IC can be molded into one piece. As described above, the light emitting diode element and its driving IC can be integrally molded and used.
〈効果〉
以上本発明によれば、小型化したうえで、発光
ダイオードの発光にほとんど影響されることなく
ICを発光ダイオードと共に樹脂封止することが
でき、発光ダイオードの用途を著しく拡大する、
小型化したIC内蔵の発光ダイオード表示装置が
提供できる。<Effects> According to the present invention, it is possible to reduce the size and to be almost unaffected by the light emission of the light emitting diode.
ICs can be sealed with resin together with light-emitting diodes, significantly expanding the applications of light-emitting diodes.
A light emitting diode display device with a built-in miniaturized IC can be provided.
第１図はバツテリチエツカ回路を示すブロツク
図、第２図は同バツテリチエツカ回路の動作を説
明するための特性図、第３図は本発明による一実
施例を示す側面図、第４図は同実施例のモールド
樹脂の光透過特性を示す図である。
３０：発光ダイオード素子、３１，３３，３
４：リード片、４０：IC、３７：暗赤色樹脂。
FIG. 1 is a block diagram showing a battery checker circuit, FIG. 2 is a characteristic diagram for explaining the operation of the battery checker circuit, FIG. 3 is a side view showing an embodiment of the present invention, and FIG. 4 is a side view of the same embodiment. FIG. 3 is a diagram showing the light transmission characteristics of the mold resin. 30: Light emitting diode element, 31, 33, 3
4: Lead piece, 40: IC, 37: Dark red resin.
Claims (1)
マウントし、上記リードフレームの側面に凹部を
形成し、上記凹部に上記発光ダイオード素子の駆
動用ICをマウントし、上記ICを黒色樹脂で封止
し、上記発光ダイオード素子、上記リードフレー
ム先端部及び上記ICを上記発光ダイオード素子
の発光色より暗色系樹脂でモールドしたことを特
徴とする発光ダイオード表示装置。1 Mount the light emitting diode element on the top of the lead frame, form a recess in the side surface of the lead frame, mount an IC for driving the light emitting diode element in the recess, seal the IC with black resin, and A light emitting diode display device, characterized in that the diode element, the tip of the lead frame, and the IC are molded with a resin having a color darker than that of the light emitting diode element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58181708A JPS6070783A (en) | 1983-09-27 | 1983-09-27 | Display device by light-emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58181708A JPS6070783A (en) | 1983-09-27 | 1983-09-27 | Display device by light-emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6070783A JPS6070783A (en) | 1985-04-22 |
| JPH0158874B2 true JPH0158874B2 (en) | 1989-12-13 |
Family
ID=16105466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58181708A Granted JPS6070783A (en) | 1983-09-27 | 1983-09-27 | Display device by light-emitting diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6070783A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4118742B2 (en) * | 2002-07-17 | 2008-07-16 | シャープ株式会社 | Light emitting diode lamp and light emitting diode display device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51137268U (en) * | 1975-04-28 | 1976-11-05 | ||
| JPS51162670U (en) * | 1975-06-18 | 1976-12-24 |
-
1983
- 1983-09-27 JP JP58181708A patent/JPS6070783A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6070783A (en) | 1985-04-22 |
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