CN209785529U

CN209785529U - LED display driving circuit, display and driving chip

Info

Publication number: CN209785529U
Application number: CN201920407765.5U
Authority: CN
Inventors: 唐永生; 王勇; 王景帅
Original assignee: Chipone Technology Beijing Co Ltd
Current assignee: Chipone Technology Beijing Co Ltd
Priority date: 2019-03-28
Filing date: 2019-03-28
Publication date: 2019-12-13
Anticipated expiration: 2029-03-28

Abstract

The utility model provides a LED shows drive circuit, display and driver chip, include: a reference current source for generating a reference current; the current mirror comprises an input branch and an output branch, is connected with the reference current source and is used for amplifying the reference current; and the switch module is connected with the input branch and the output branch and used for acquiring the state signal of the reference current and realizing the control of the input branch and the output branch according to the state signal. The utility model discloses a LED shows drive circuit, display and driver chip and can effectively avoid the heavy current to flow in LED to guarantee LED's life.

Description

LED display driving circuit, display and driving chip

Technical Field

The utility model relates to a LED shows driven technical field, especially relates to a LED shows drive circuit, display and driver chip.

Background

An LED (Light Emitting Diode) is a semiconductor device sensitive to voltage characteristics, has negative temperature characteristics, and thus needs to be stably operated and protected during application. The LED device has certain requirements on a driving power supply, and the power supply voltage is usually between 3 and 24V of direct current.

Generally, the working current of the LED is between 5 and 20 mA. When a large current larger than 20mA flows through the LED, the LED display area can be highlighted. The long-time high brightness can cause the burning out of the LED lamp beads.

SUMMERY OF THE UTILITY MODEL

In view of the above shortcomings in the prior art, an object of the present invention is to provide a LED display driving circuit, a display and a driving chip, which can effectively avoid the large current from flowing into the LED, thereby ensuring the service life of the LED.

to achieve the above and other related objects, the present invention provides a LED display driving circuit, including: a reference current source for generating a reference current; the current mirror comprises an input branch and an output branch, is connected with the reference current source and is used for amplifying the reference current; and the switch module is connected with the input branch and the output branch and used for acquiring the state signal of the reference current and realizing the control of the input branch and the output branch according to the state signal.

In an embodiment of the present invention, the reference current source includes a first amplifier, a first NMOS transistor and a load resistor, two input terminals of the first amplifier respectively with a first reference voltage and one end of the load resistor is connected, the other end of the load resistor is grounded, a gate of the first NMOS transistor is connected to an output terminal of the first amplifier, a source electrode is connected to one end of the load resistor, and a drain electrode is connected to the input branch.

In an embodiment of the present invention, the input branch includes a first PMOS transistor, the output branch includes a second PMOS transistor, the gate of the first PMOS transistor and the gate of the second PMOS transistor are connected, just the gate and the drain of the first PMOS transistor all connect with the reference current source, the drain of the second PMOS transistor with the output of the LED display driving circuit connects.

In an embodiment of the present invention, the output branch further includes a third PMOS transistor, a source of the third PMOS transistor is connected to a drain of the second PMOS transistor, the gate is connected to a bias voltage, and the drain is connected to an output of the LED display driving circuit.

In an embodiment of the present invention, the switch module includes a signal generating circuit and a bidirectional switch; the signal generating circuit is connected with the reference current source and used for generating the state signal; the bidirectional switch is arranged between the input branch and the output branch and is used for realizing on-off control of the input branch and the output branch according to the state signal.

In an embodiment of the present invention, the signal generating circuit includes a comparator, a schmitt trigger, a first D trigger and a second D trigger connected in sequence, the positive input end of the comparator inputs the voltage on the load resistor and the negative input end inputs the first reference voltage, and the second trigger is connected to the bidirectional switch.

In an embodiment of the present invention, the reference voltage source further includes a low pass filter, and the switch module is connected in series and disposed between the input branch and the output branch.

In an embodiment of the present invention, the power supply further includes an amplifying module for amplifying the current of the output branch for the second time.

In an embodiment of the present invention, the amplifying module includes a second amplifier, a second NMOS transistor, a third amplifier, a third NMOS transistor and a fourth NMOS transistor, two input terminals of the second amplifier are respectively connected to a second reference voltage and the output branch, and an output terminal of the second amplifier is connected to a gate of the second NMOS transistor; the source electrode of the second NMOS tube is grounded, and the drain electrode of the second NMOS tube is connected with the output branch; the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube; the drain electrode and the grid electrode of the fourth NMOS tube are connected with the output end of the third amplifier; and two input ends of the third amplifier are connected with the output branch circuit and the drain electrode of the third NMOS tube.

In an embodiment of the present invention, the LEDs include but are not limited to conventional LEDs, small pitch LEDs, mini LEDs and micro LEDs.

the utility model provides a LED display driver chip, including foretell LED display driver circuit.

The utility model provides a LED display, including foretell LED display driver chip.

As above, LED display drive circuit, display and driver chip, following beneficial effect has:

(1) The reference current source can be monitored in real time, and large current is effectively prevented from flowing into the LED;

(2) The power consumption of the driving circuit can be reduced, the service life of the LED is ensured, and the practicability is high.

Drawings

Fig. 1 is a schematic structural diagram of an LED display driving circuit according to an embodiment of the present invention;

Fig. 2 is a circuit diagram of an LED display driver circuit according to an embodiment of the present invention;

Fig. 3 is a schematic structural diagram of a signal generating circuit according to an embodiment of the present invention;

FIG. 4 is a timing diagram of the LED display driver circuit of FIG. 2 in one embodiment;

Fig. 5 is a schematic structural diagram of an LED display chip according to an embodiment of the present invention;

Fig. 6 is a schematic structural diagram of an LED display according to an embodiment of the present invention;

Fig. 7 is a flowchart illustrating an LED display driving method according to an embodiment of the present invention.

Description of the element reference numerals

1 reference current source

2 Current mirror

21 input branch

22 output branch

3 switch module

4 amplifying module

Detailed Description

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.

It should be noted that the drawings provided in the following embodiments are only for illustrating the basic concept of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the form, amount and ratio of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.

The utility model discloses a LED shows drive circuit, display and driver chip, through carrying out real time monitoring to the reference current source, can effectively avoid heavy current to flow in LED to LED's life has been guaranteed.

as shown in fig. 1, in an embodiment, the LED display driving circuit of the present invention includes a reference current source 1, a current mirror 2, and a switch module 3.

The reference current source 1 is used to generate a reference current. As shown in fig. 2, in an embodiment, the reference current source 1 includes a first amplifier AMP1, a first NMOS tube NCH1 and a load resistor REXT, two input terminals of the first amplifier AMP1 are respectively connected to a first reference voltage VREF1 and one end of the load resistor REXT, the other end of the load resistor REXT is grounded, a gate of the first NMOS tube NCH1 is connected to an output terminal of the first amplifier AMP1, a source is connected to one end of the load resistor REXT, and a drain is connected to the input branch. In the figure, the first reference voltage VREF1 is a preset internal reference voltage, and the first amplifier AMP1 and the first NMOS transistor NCH1 form a negative feedback loop, so that the voltage VREXT across the load resistor is equal to the first reference voltage VREF 1.

The current mirror 2 comprises an input branch and an output branch, is connected with the reference current source 1, and is used for amplifying the reference current. As shown in fig. 2, in an embodiment, the input branch 21 includes a first PMOS transistor PCH1, the output branch 22 includes a second PMOS transistor PCH2, a gate of the first PMOS transistor PCH1 is connected to a gate of the second PMOS transistor PCH2, a gate and a drain of the first PMOS transistor PCH1 are both connected to a drain of a first NMOS transistor NCH1 in the reference current source 1, and a drain of the second PMOS transistor PCH2 is connected to an output terminal of the LED display driving circuit. The sources of the first PMOS transistor PCH1 and the second PMOS transistor PCH2 are connected with corresponding driving voltages. Wherein, the size (size) ratio of the second PMOS transistor PCH2 to the first PMOS transistor PCH1 is K1. That is, when the load resistor works normally, the input current of the input branch is VREXT/REXT, and the output current of the output branch is K1 (VREXT/REXT).

In an embodiment of the present invention, the output branch 22 further includes a third PMOS transistor PCH3, a source of the third PMOS transistor PCH3 is connected to a drain of the second PMOS transistor PCH2, a gate of the third PMOS transistor PCH is connected to a bias voltage Vbias, and the drain of the third PMOS transistor PCH is connected to an output terminal of the LED display driving circuit. By arranging the third PMOS tube PCH3, the drain voltages of the first PMOS tube PCH1 and the second PMOS tube PCH2 are equal, so that the mismatch current between the first PMOS tube PCH1 and the second PMOS tube PCH2 is reduced.

The switch module 3 is connected to the input branch 21 and the output branch 22, and is configured to collect a state signal of the reference current, and implement control of the input branch and the output branch according to the state signal. As shown in fig. 2, in an embodiment of the present invention, the switch module 3 includes a signal generating circuit (not shown) and a bidirectional switch K1. As shown in fig. 3, the signal generating circuit is connected to the reference current source 1 for generating a state signal (Short signal); the bidirectional switch K1 is disposed between the input branch 21 and the output branch 22, and is used for implementing connection and disconnection between the input branch 21 and the output branch 22 according to the status signal. When the load resistor REXT normally works, the reference current is in a normal interval, the signal generation circuit generates a first level signal, and if a low level signal is used as a normal signal, the bidirectional switch K1 is communicated with the input branch 21 and the output branch 22 to ensure that the LED display driving circuit normally works; when the load resistor REXT is open-circuited, the signal generating circuit generates a second level signal, and if a high level signal is taken as an abnormal signal, the bidirectional switch K1 is connected with the signal generating circuit to disconnect the input branch and the output branch so as to cut off the LED display driving circuit, thereby preventing the LED lamp bead from being highlighted.

As shown in fig. 3, in an embodiment of the present invention, the signal generating circuit includes a comparator C1, a Schmitt trigger, a first D-trigger DFF1 and a second D-trigger DFF2 connected in sequence, a positive input terminal of the comparator C1 inputs a voltage VREXT across the load resistor REXT, a negative input terminal of the comparator C1 inputs the first reference voltage VREF1, an output terminal of the comparator C1 is connected to an input terminal of the Schmitt trigger, an output terminal of the Schmitt trigger is connected to an input terminal of the first D-trigger DFF1, an output terminal of the first D-trigger DFF1 is connected to an output terminal of the second D-trigger DFF2, and an output terminal of the second D-trigger DFF2 is connected to the bidirectional switch K1. Meanwhile, a Clock signal Clock is input to Clock signal terminals of the first and second D flip-flops DFF1 and DFF 2. When the load resistor REXT is working normally, due to the action of the first amplifier AMP1, the voltage VREXT across the load resistor is equal to the first reference voltage VREF1, the comparator C1 outputs a high level, RN outputs a low level after the Schmitt trigger, the first D flip-flop DFF1 and the second D flip-flop DFF2 are reset by RN, and the output Short signal is at a low level. When the load resistor REXT is Short-circuited, the voltage VREXT across the load resistor is lower than the first reference voltage VREF1, the comparator C1 outputs a low level, RN outputs a high level after the Schmitt trigger, the first D flip-flop DFF1 and the second D flip-flop DFF2 end the reset state, when the Clock signal Clock comes to a rising edge, the output of the first D flip-flop DFF1 is at a high level, and when the Clock signal Clock comes to a second rising edge, the output of the second D flip-flop DFF2 is at a high level, the output Short signal is at a high level.

As shown in fig. 4, when the load resistor REXT is operating normally, the Short signal is at low level, the bidirectional switch K1 turns on the gate of the first PMOS transistor PCH1, and the current of the second PMOS transistor PCH2 is determined by the current of the first PMOS transistor PCH 1. When the load resistor REXT is Short-circuited, the Short signal goes high, the gate of the PMOS transistor PCH2 is pulled to the power supply potential, the current on the PMOS transistor PCH2 goes to 0, and the output channel is also closed.

Since the Short signal needs at least one clock cycle to trigger, so when the Short circuit of the load resistor REXT occurs, the gate voltage of the first PMOS transistor PCH1 will become low, in order to avoid the large current mirror image of the first PMOS transistor PCH1 to the second PMOS transistor PCH2, in an embodiment of the present invention, the reference current source 1 further includes a low pass filter, which is connected in series with the switch module and is disposed between the input branch and the output branch. Specifically, the low-pass filter includes a resistor R1 and a capacitor C1, one end of the resistor R1 is connected to the switch module, the other end of the resistor R1 is connected to the output branch, one end of the capacitor C1 is connected to a capacitor driving voltage, and the other end of the capacitor C1 is connected to the other end of the resistor R1. Before the switching state of the switch module 4 is switched, the low-pass filter can filter out the voltage change on the grid of the first PMOS tube PCH1, so that the occurrence of high brightness of the LED lamp beads is avoided.

In an embodiment of the present invention, as shown in fig. 2, the LED display driving circuit of the present invention further includes an amplifying module 4. And the amplifying module 4 is connected with the output branch and used for carrying out secondary amplification on the current of the output branch. Specifically, the amplifying module 4 includes a second amplifier AMP2, a second NMOS tube NCH2, a third amplifier AMP3, a third NMOS tube NCH3 and a fourth NMOS tube NCH4, two input ends of the second amplifier AMP2 are respectively connected to a second reference voltage VREF2 and the output branch 22, and an output end of the second amplifier AMP2 is connected to a gate of the second NMOS tube NCH 2; the source electrode of the second NMOS tube NCH2 is grounded, and the drain electrode of the second NMOS tube NCH2 is connected with the output branch; the source electrode of the third NMOS tube NCH3 is grounded, the gate electrode of the third NMOS tube NCH 3578 is connected to the gate electrode of the second NMOS tube NCH2, and the drain electrode of the third NMOS tube NCH4 is connected to the source electrode of the fourth NMOS tube NCH 4; the drain electrode of the fourth NMOS tube NCH4 is connected with the output end of the LED display driving circuit, and the grid electrode of the fourth NMOS tube NCH4 is connected with the output end of the third amplifier AMP 3; two input ends of the third amplifier are connected with the output branch 22 and the drain of the third NMOS tube NCH 3. Since the gate voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal, the drain voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal due to the closed-loop negative feedback loop formed by the second amplifier AMP2 and the third amplifier AMP 3. Setting the size (size) ratio of the third NMOS tube NCH3 to the second NMOS tube NCH2 to K2, the driving current is (VREXT/REXT) K1K 2, thereby satisfying the driving requirement of the LED lamp bead.

In an embodiment of the present invention, the LEDs include but are not limited to conventional LEDs, small pitch LEDs, mini LEDs and micro LEDs. Wherein, traditional LED means that the lamp pearl central point interval is greater than 2.5 mm's LED. The small-distance LED is an LED with the distance between the central points of the LED lamp beads being 2.5mm or less. The Micro LED and the Mini LED are the same and are based on tiny LED crystal particles as pixel luminous points. The difference is that the Micro LED is an LED crystal with the diameter of 1-10 microns, and a display screen with the center point distance (namely, pixel particles with smaller size) of the LED crystal of 0.05 mm or less is realized; the MiniLED adopts tens of micron-sized LED crystals to realize a display screen with the center point distance (pixel particles) of the LED crystals of 0.5-1.2 mm.

As shown in fig. 5, in an embodiment, the LED display driving chip of the present invention includes the LED display driving circuit. Through the LED display driving circuit, the damage of the LED lamp bead caused by long-time highlighting can be effectively avoided, the service life of an LED is ensured, and the power consumption of the whole LED display driving chip is reduced.

as shown in fig. 6, in an embodiment, the LED display of the present invention includes the LED display driving chip, so as to ensure normal use of the LED display and prolong the service life of the LED display.

As shown in fig. 7, in an embodiment, the LED display driving method of the present invention includes the following steps:

Step S1, a reference current is generated.

Specifically, a reference current is generated based on a reference current source. As shown in fig. 2, in an embodiment, the reference current source includes a first amplifier AMP1, a first NMOS tube NCH1 and a load resistor REXT, two input terminals of the first amplifier AMP1 are respectively connected to a first reference voltage VREF1 and one end of the load resistor REXT, the other end of the load resistor REXT is grounded, a gate of the first NMOS tube NCH1 is connected to an output terminal of the first amplifier AMP1, a source is connected to one end of the load resistor REXT, and a drain is connected to the input branch. In the figure, the first reference voltage VREF1 is a preset internal reference voltage, and the first amplifier AMP1 and the first NMOS transistor NCH1 form a negative feedback loop, so that the voltage VREXT across the load resistor is equal to the first reference voltage VREF 1.

and step S2, amplifying the reference current.

Specifically, the reference current is amplified based on a current mirror. The current mirror comprises an input branch and an output branch. As shown in fig. 2, in an embodiment, the input branch includes a first PMOS transistor PCH1, the output branch includes a second PMOS transistor PCH2, a gate of the first PMOS transistor PCH1 is connected to a gate of the second PMOS transistor PCH2, a gate and a drain of the first PMOS transistor PCH1 are both connected to a drain of a first NMOS transistor NCH1 in the reference current source 1, and a drain of the second PMOS transistor PCH2 is connected to the amplifying module 4. The sources of the first PMOS transistor PCH1 and the second PMOS transistor PCH2 are connected with corresponding driving voltages. Wherein the current amplification factor of the current mirror is K1. That is, when the load resistor works normally, the input current of the input branch is VREXT/REXT, and the output current of the output branch is K1 (VREXT/REXT).

In an embodiment of the present invention, the output branch further includes a third PMOS transistor PCH3, a source of the third PMOS transistor PCH3 is connected to a drain of the second PMOS transistor PCH2, a gate of the third PMOS transistor PCH is connected to a bias voltage Vbias, and the drain of the third PMOS transistor PCH is connected to the amplifying module 4. By arranging the third PMOS tube PCH3, the drain voltages of the first PMOS tube PCH1 and the second PMOS tube PCH2 are equal, so that the mismatch current between the first PMOS tube PCH1 and the second PMOS tube PCH2 is reduced.

And step S3, acquiring a state signal of the reference current, and realizing the amplified on-off control according to the state signal.

Specifically, a state signal of the reference current is acquired based on a switch module, and the amplified on-off control is realized according to the state signal. As shown in fig. 2, in an embodiment of the present invention, the switch module includes a signal generating circuit and a bidirectional switch K1; the signal generating circuit is connected with the reference current source and is used for generating a state signal (Short signal); the bidirectional switch K1 is arranged between the input branch and the output branch and used for realizing the connection and disconnection of the input branch and the output branch according to the state signal. When the load resistor REXT normally works, the reference current is in a normal interval, the signal generation circuit generates a first level signal, and if a low level signal is taken as a normal signal, the bidirectional switch K1 is communicated with the input branch and the output branch to ensure that the LED display driving circuit normally works; when the load resistor REXT is open-circuited, the signal generating circuit generates a second level signal, and if a high level signal is taken as an abnormal signal, the bidirectional switch K1 is connected with the signal generating circuit to disconnect the input branch and the output branch so as to cut off the LED display driving circuit, thereby preventing the LED lamp bead from being highlighted.

in an embodiment of the present invention, the LED display driving method of the present invention further includes amplifying the amplified current for a second time.

Specifically, the current of the output branch circuit is amplified for the second time based on the amplification module. As shown in fig. 2, in an embodiment of the present invention, the amplifying module includes a second amplifier AMP2, a second NMOS tube NCH2, a third amplifier AMP3, a third NMOS tube NCH3 and a fourth NMOS tube NCH4, two input terminals of the second amplifier AMP2 are respectively connected to a second reference voltage VREF2 and the output branch, and an output terminal of the second amplifier AMP2 is connected to a gate of the second NMOS tube NCH 2; the source electrode of the second NMOS tube NCH2 is grounded, and the drain electrode of the second NMOS tube NCH2 is connected with the output branch; the source electrode of the third NMOS tube NCH3 is grounded, the gate electrode of the third NMOS tube NCH 3578 is connected to the gate electrode of the second NMOS tube NCH2, and the drain electrode of the third NMOS tube NCH4 is connected to the source electrode of the fourth NMOS tube NCH 4; the drain of the fourth NMOS transistor NCH4 outputs a driving current, and the gate is connected to the output terminal of the third amplifier AMP 3; two input ends of the third amplifier are connected with the output branch and the drain electrode of the third NMOS tube NCH 3. Since the gate voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal, the drain voltages of the second NMOS tube NCH2 and the third NMOS tube NCH3 are equal due to the closed-loop negative feedback loop formed by the second amplifier AMP2 and the third amplifier AMP 3. And setting the corresponding amplification ratio of the second NMOS tube NCH2 and the third NMOS tube NCH3 to be K2, and then the driving current is (VREXT/REXT) K1K 2, thereby meeting the driving requirements of the LED lamp bead.

To sum up, the LED display driving circuit, the display and the driving chip of the utility model can monitor the reference current source in real time, and effectively avoid the heavy current from flowing into the LED; the power consumption of the driving circuit can be reduced, and the service life of the LED is ensured. Therefore, the utility model discloses effectively overcome the shortcoming among the prior art and had good application prospect.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims

1. an LED display driving circuit, characterized in that: the method comprises the following steps:

A reference current source for generating a reference current;

The current mirror comprises an input branch and an output branch, is connected with the reference current source and is used for amplifying the reference current;

And the switch module is connected with the input branch and the output branch and used for acquiring the state signal of the reference current and realizing the control of the input branch and the output branch according to the state signal.

2. The LED display driver circuit according to claim 1, wherein: the reference current source comprises a first amplifier, a first NMOS (N-channel metal oxide semiconductor) tube and a load resistor, two input ends of the first amplifier are respectively connected with a first reference voltage and one end of the load resistor, the other end of the load resistor is grounded, a grid electrode of the first NMOS tube is connected with an output end of the first amplifier, a source electrode is connected with one end of the load resistor, and a drain electrode is connected with the input branch.

3. The LED display driver circuit according to claim 1, wherein: the input branch circuit comprises a first PMOS (P-channel metal oxide semiconductor) tube, the output branch circuit comprises a second PMOS tube, the grid electrode of the first PMOS tube is connected with the grid electrode of the second PMOS tube, the grid electrode and the drain electrode of the first PMOS tube are both connected with the reference current source, and the drain electrode of the second PMOS tube is connected with the output end of the LED display driving circuit.

4. The LED display driver circuit according to claim 3, wherein: the output branch circuit further comprises a third PMOS tube, a source electrode of the third PMOS tube is connected with a drain electrode of the second PMOS tube, a grid electrode of the third PMOS tube is connected with a bias voltage, and the drain electrode of the third PMOS tube is connected with an output end of the LED display driving circuit.

5. The LED display driver circuit according to claim 2, wherein: the switch module comprises a signal generating circuit and a bidirectional switch; the signal generating circuit is connected with the reference current source and used for generating the state signal; the bidirectional switch is arranged between the input branch and the output branch and is used for realizing on-off control of the input branch and the output branch according to the state signal.

6. The LED display driver circuit according to claim 5, wherein: the signal generating circuit comprises a comparator, a Schmitt trigger, a first D trigger and a second D trigger which are sequentially connected, wherein the positive input end of the comparator inputs the voltage on the load resistor, the negative input end of the comparator inputs the first reference voltage, and the second D trigger is connected with the bidirectional switch.

7. The LED display driver circuit according to claim 1, wherein: the reference current source further comprises a low-pass filter, which is connected in series with the switch module and is arranged between the input branch and the output branch.

8. The LED display driver circuit according to claim 1, wherein: the circuit also comprises an amplifying module which is used for carrying out secondary amplification on the current of the output branch circuit.

9. The LED display driver circuit according to claim 8, wherein: the amplifying module comprises a second amplifier, a second NMOS tube, a third amplifier, a third NMOS tube and a fourth NMOS tube, wherein two input ends of the second amplifier are respectively connected with a second reference voltage and the output branch, and the output end of the second amplifier is connected with a grid electrode of the second NMOS tube; the source electrode of the second NMOS tube is grounded, and the drain electrode of the second NMOS tube is connected with the output branch; the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the third NMOS tube is connected with the source electrode of the fourth NMOS tube; the drain electrode of the fourth NMOS tube is connected with the output end of the LED display driving circuit, and the grid electrode of the fourth NMOS tube is connected with the output end of the third amplifier; and two input ends of the third amplifier are connected with the output branch circuit and the drain electrode of the third NMOS tube.

10. The LED display driver circuit according to claim 1, wherein: the LEDs include, but are not limited to, conventional LEDs, small pitch LEDs, mini LEDs, and micro LEDs.

11. An LED display driving chip is characterized in that: comprising the LED display driver circuit as claimed in any one of claims 1 to 10.

12. An LED display, characterized by: comprising the LED display driver chip of claim 11.