JPH0158695B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a collector dot circuit which aims to increase the ambient dependency margin using a simple compensation circuit.

Conventional collector dot circuits are shown in FIGS. 1A and 1B. In Figure 1, 1, 2, 3, and 4 are signal input terminals, V _put is a dot output, Q is a clamping transistor, and R ₀ and R ₁ are dividing resistors for applying a reference potential to the base of the clamping transistor Q. be.
Normally, the base potential of the clamping transistor Q is set to about -0.1V to -0.2V from the relationship of the signal level, and since the power supply voltage V _EE is -5.2V, the resistance ratio R of the dividing resistors R ₀ and R ₁ is ₀ /R ₁ is 0.03≦R ₀ /R ₁ ≦
It becomes 0.1. Now, in the output LOW level state, a gate current flows through one or two transistors on the dot output side, and therefore, when it flows through one transistor on the dot output side,
That is, in the case of one dot output ON current, the output level V _put rises above the reference output level, the margin with the switching reference potential V _ref (or V _ref1 ) decreases, and the temperature of the clamping transistor increases. There was a drawback that the dependence clearly appeared in the output level surrounding dependence.

In order to eliminate these drawbacks, the object of the present invention is to add a V _ref0 reference potential generation peripheral margin compensation circuit to the collector dot circuit, which will be described in detail below. FIGS. 2A and 2B show collector dot circuits with two dots, and have a circuit configuration in which a reference potential V _ref0 is supplied to the base of a clamping transistor. FIG. 3 is a circuit diagram showing one embodiment of the compensation circuit of the present invention. In this example, the output level is lowered, and the temperature characteristics of the power supply V _EE (=-5.2V) and the transistor V _BE are used to set the switching reference potential V _ref and the temperature characteristics of the four transistors and diodes. In other words, the overall characteristics have been improved. This effect will be explained in a general case. Using a reference potential V _ref with a positive temperature coefficient and the temperature characteristics of N transistors and diodes,
Due to the potential difference between the power supplies _VEE , the current generated in the resistor _R1 generates a voltage drop _Vref0 across the resistor _R0 .
When the V _ref0 reference potential and the dot output level are expressed in general formulas, the following formulas (1) and (2) are obtained.

V _ref0 = −αR ₀ /R ₁ (V _ref −NV _BE −V _EE ) …(1) V _put =V _ref0 −V _BE …(2) α (≒1) is the current amplification factor.

To find the temperature dependence of V _ref0 and V _put ,
Differentiating the above equations (1) and (2) with respect to temperature T, we get
Assuming that the resistance ratio term has no temperature dependence, Here, since dV _BE /dT<0 and dV _ref /dT>0, both the first and second terms in equation (3) are temperature coefficients, and dV _ref0 /dT is a negative temperature coefficient, which is It corresponds to the term in equation (4), acts as an effect to reduce the positive temperature coefficient of the term in equation (4), and exhibits the effect of improving characteristics.

This effect can be seen in the first example, ECL10K power supply V _EE
When using the compensation circuit of FIG. 3, which is the present invention, using specific numerical values, the comparison is as follows. Add switching reference potential to the base of transistor TR1, transistor V _BE 1 stage, diode D ₁
A reference potential V _ref0 is generated by a point shifted by three steps of V _BE by ~D ₃ , a current generated by a potential difference between the power source V _EE , and a resistor R ₀ . This reference potential V _ref0
By supplying the base point of , the dot output is ON current 1
In this case, it can be set to the standard output level. Additionally, the dependence on the surroundings is improved, and the margin increases.

The reference potential _Vref0 and the dot output level _Vput can be expressed by the following equations (5) and (6).

V _ref0 = −αR ₀ /R ₁ (V _ref −(V _BE1 +V _BE2 +V _BE3 +V _BE4
) −V _EE )……(5) V _put =V _ref0 −V _BE ……(6) To find the temperature dependence of V _ref0 and V _put ,
Differentiating equations (5) and (6) above with respect to temperature T, we get
Assuming that the resistance ratio term has no temperature dependence, dV _ref0 /dT=-αR ₀ /R ₁ (dV _ref /dT-(dV _BE1 /dT+dV
_BE2 ／dT＋dV _BE3 ／dT＋dV _BE4 ／dT））……(7) dV _put ／dT＝dV _ref0 ／dT−dV _BE ／dT ……(8) In equations (7) and (8), dV The value of _BE /dT is a function of the emitter current, but approximately dV _BE /dT=
The value is considered to be dV _BE1 /dT = dV _BE4 /dT = -1.6mV/°C. Also, dV _ref /dT=1.3mV/℃,
If R ₀ /R ₁ = 0.1 from the reference potential value setting, then (7)
The equation (8) becomes the value of the following equations (9) and (10).

dV _ref0 /dT=-0.1(1.3-4×(-1.6))=-0.77mV
/ °C ... (9) dV _put /dT = -0.77 - (-1.6) = 0.83 mV / °C ... (10) Next, when comparing with the conventional case in which the reference voltage V _ref0 is not used for the clamping transistor, the Figure 1A
In the case of V _put = R ₀ / R ₀ + R ₁ (V _EE + 2V _BE ) − V _BE ……(11) Differentiate the above equation (11) with respect to the temperature T, and the resistance ratio term takes into account the temperature dependence. If it does not hold, dV _put /dT=R ₀ /R ₀ +R ₁・2dV _BE /dT−dV _BE /dT=R ₀ −R
₁ /R ₀ +R ₁・dV _BE /dT=R ₀ /R ₁ ^-1 /R ₀ /R ₁ ⁺¹・dV _BE /dT
...(12) Here, dV _BE /dT=-1.6mV/℃, _{R 0} /R ₁ ≦
If it is 0.1, then dV _put /dT≧0.1-1/0.1+1 (-1.6)≧1.31mV/℃... (13) In the case of Figure 1B, V _put = -V _BE ,
Its temperature dependence is: dV _put /dT = -dV _BE /dT = - (-1.6) = 1.6mV/℃ ... (14) Equation (10), Equation (13) and Equation (14) As is clear from the comparison, in the case of the circuit of the present invention, compared to the conventional circuits A and B, a wide improvement in temperature dependence of 40% to 50% has been achieved. Since both V _ref and V _ref1 originally have temperature dependence within a certain range, it is preferable that V _put be set as close to "0" as possible. Therefore, the circuit of the present invention can improve the temperature dependence margin by nearly twice as much as that of the conventional circuit, which is extremely advantageous in terms of widening the operating temperature range and preventing malfunctions due to changes in ambient temperature.

Although the example explained above is for the case where the number of dots is two, similar effects can be expected when the number of dots is three or more.

The present invention is particularly advantageous in the case of one ON current for dot output, so it can be used in circuit systems such as multiplexers because it is highly effective.
Additionally, this method is applicable to both LCML and CML circuit formats.

[Brief explanation of drawings]

Figures 1A and 1B are conventional collector dot circuit diagrams,
2A and 2B are collector dot circuits using the present invention, and FIG. 3 is a compensation circuit diagram of the present invention. 5, 6, 7, 8...Input signal terminal, V _put ...Dot output, V _ref0 ...Reference setting potential, V _ref , V _ref1 ...Switching reference potential, Q...Clamp transistor, TR1
...transistor, D ₁ , D ₂ , D ₃ , ... diode.

Claims (1)

[Claims] 1 Consists of a temperature compensation circuit connected to the base of the clamping transistor of the collector dot circuit.
In the ECL circuit, the temperature compensation circuit includes a margin compensation transistor, a plurality of diodes connected in series to the emitter side of the margin compensation transistor, and a first power supply connected between the diode and the first power supply. and a second resistor connected between the collector of the margin compensation transistor and a second power supply, and a reference current having a positive temperature coefficient at the base of the margin compensation transistor. , and a connection point between the collector of the margin compensation transistor and the second resistor is an output of a temperature compensation circuit.