JPH0157866B2 - - Google Patents

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Publication number
JPH0157866B2
JPH0157866B2 JP21380681A JP21380681A JPH0157866B2 JP H0157866 B2 JPH0157866 B2 JP H0157866B2 JP 21380681 A JP21380681 A JP 21380681A JP 21380681 A JP21380681 A JP 21380681A JP H0157866 B2 JPH0157866 B2 JP H0157866B2
Authority
JP
Japan
Prior art keywords
output
voltage controlled
voltage
phase
controlled oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP21380681A
Other languages
Japanese (ja)
Other versions
JPS58125984A (en
Inventor
Yoichi Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21380681A priority Critical patent/JPS58125984A/en
Publication of JPS58125984A publication Critical patent/JPS58125984A/en
Publication of JPH0157866B2 publication Critical patent/JPH0157866B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/455Demodulation-circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)

Description

【発明の詳細な説明】 本発明は同期搬送波再生方式の同期受信機に関
し、互いに90゜の位相差をもつ2つの同期搬送波
を、広い周波数範囲にわたり、しかも速い動作で
得ることを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synchronous receiver using a synchronous carrier regeneration method, and an object of the present invention is to obtain two synchronous carrier waves having a phase difference of 90 degrees from each other over a wide frequency range and at high speed.

第1図に従来例を示す。この例はコスタス
(Costas)ループとして知られる同期搬送再生方
式の同期受信機である。この受信機は変調搬送波
入力の同相成分を同期検波する第1の同期検波器
1、直交成分を同期検波する第2の同期検波器
2、これら2つの同期検波器1,2のおのおのの
出力を低域濾波する低域濾波器3および4、これ
ら2つの低域濾波器3,4の出力を電圧乗算する
位相比較器5、この位相比較器5の出力を低域濾
波する低域濾波器6、この低域濾波器6の出力電
圧で制御される電圧制御発振器7、この電圧制御
発振器7の出力を90゜移相する90゜移相器8から成
り、第1の同期検波器1および第2の同期検波器
2によつて同期検波して得た同相および直交成分
の信号から、変調搬送波入力と電圧制御発振器7
の出力、すなわち再生搬送波との位相誤差を検出
し、この誤差を最小にするように動作する。
FIG. 1 shows a conventional example. An example of this is a synchronous carrier regeneration type synchronous receiver known as a Costas loop. This receiver has a first synchronous detector 1 that synchronously detects the in-phase component of a modulated carrier input, a second synchronous detector 2 that synchronously detects the orthogonal component, and the outputs of each of these two synchronous detectors 1 and 2. Low-pass filters 3 and 4 perform low-pass filtering, a phase comparator 5 that multiplies the outputs of these two low-pass filters 3 and 4 by voltage, and a low-pass filter 6 that performs low-pass filtering on the output of this phase comparator 5. , a voltage-controlled oscillator 7 controlled by the output voltage of this low-pass filter 6, and a 90° phase shifter 8 that shifts the phase of the output of this voltage-controlled oscillator 7 by 90°. From the in-phase and quadrature component signals obtained by synchronous detection by the synchronous detector 2 of 2, the modulated carrier wave input and the voltage controlled oscillator 7
It detects the phase error with the output of the carrier, that is, the reproduced carrier wave, and operates to minimize this error.

第1図に示した同期受信機をテレビジヨン受信
機あるいはラジオ受信機に応用するには広帯域の
90゜移相器を必要とする。本発明は、この90゜移相
器の代わりに、2つの入力信号の位相差が90゜の
とき同期する位相ロツクループ(PLL)を用い
ようとするものである。
In order to apply the synchronous receiver shown in Figure 1 to a television receiver or a radio receiver, a broadband
Requires 90° phase shifter. The present invention attempts to use a phase lock loop (PLL) that synchronizes when the phase difference between two input signals is 90 degrees, instead of this 90 degree phase shifter.

第2図に本発明の一実施例のブロツク図を示
す。第2図でブロツク1から7までは、それぞれ
第1図の1から7までと同じ要素を示し、その動
作も同じである。位相比較器9、低域濾波器1
0、電圧制御発振器11からなるループはPLL
を構成し、第1図の90゜移相器8に相当する。こ
のループの動作は次の通りである。
FIG. 2 shows a block diagram of an embodiment of the present invention. Blocks 1 to 7 in FIG. 2 each show the same elements as 1 to 7 in FIG. 1, and their operations are also the same. Phase comparator 9, low pass filter 1
0, the loop consisting of voltage controlled oscillator 11 is PLL
This corresponds to the 90° phase shifter 8 in FIG. The operation of this loop is as follows.

第1の電圧制御発振器7の出力υ0(t)を υ0(t)=A0cos〔ω0t+0(t)〕 ………(1) 第2の電圧制御発振器11の出力υQ(t)を υQ(t)=AQcos〔ωQt+Q(t)〕 ………(2) とし、これらを電圧乗算器から成る位相比較器9
に加える。ただし、ω0および0(t)は第1の電
圧制御発振器7の発振出力の周波数と位相を示
し、QおよびQ(t)は第2の電圧制御発振器1
1の発振出力の周波数と位相を示す。
The output υ 0 (t) of the first voltage controlled oscillator 7 is υ 0 (t) = A 0 cos [ω 0 t+ 0 (t)] ......(1) The output υ Q of the second voltage controlled oscillator 11 (t) as υ Q (t)=A Q cos [ω Q t+ Q (t)] ......(2)
Add to. However, ω 0 and 0 (t) indicate the frequency and phase of the oscillation output of the first voltage controlled oscillator 7, and Q and Q (t) indicate the frequency and phase of the oscillation output of the second voltage controlled oscillator 1.
1 shows the frequency and phase of the oscillation output.

位相比較器9は電圧乗算器であるから、その出
力υd(t)は υd(t)=υ0(t)・υQ(t) =A0AQcos〔ω0t+0(t)〕cos〔ωQt+Q(t
)〕 =A0AQ/2{cos〔(ω0+ωQ)t+0(t)+Q (t)〕 +cos〔(ω0−ωQ)t+0(t)−Q(t)〕}
………(3) いまω0=ωQとすると、 υd(t)=A0AQ/2{cos〔2ω0t+0(t)+Q
t)〕 +cos〔0(t)−Q(t)〕} ………(4) υd(t)を低域濾波器10で濾波して2ω0の周波
数成分を除去すると、その出力υC1(t)は υC1(t)=A0AQ/2cos〔0(t)−Q(t)〕…
……(5) となる。したがつて、0(t)とQ(t)の差e
(t)がe (t)=0(t)−Q(t)=±90゜ ………(6) のときυC1(t)=0となる。この状態を基準とし
て、Q(t)が0(t)に対し位相の進み、遅れ
が生じた場合、Q(t)と0(t)の差が90゜にな
るように制御される。すなわち第1の電圧制御発
振器7と第2の電圧制御発振器11の各々の出力
は90゜の位相差を持つことになる。
Since the phase comparator 9 is a voltage multiplier, its output υ d (t) is υ d (t)=υ 0 (t)・υ Q (t) = A 0 A Q cos [ω 0 t+ 0 (t )〕cos〔ω Q t+ Q (t
)] =A 0 A Q /2 {cos[(ω 0Q )t+ 0 (t)+ Q (t)] +cos[(ω 0 −ω Q )t+ 0 (t)− Q (t)]}
………(3) Now let ω 0 = ω Q , then υ d (t)=A 0 A Q /2{cos[2ω 0 t+ 0 (t)+ Q (
t)] + cos [ 0 (t) − Q (t)]} ………(4) When υ d (t) is filtered by the low-pass filter 10 to remove the frequency component of 2ω 0 , the output υ C1 (t) is υ C1 (t) = A 0 A Q /2cos [ 0 (t) - Q (t)]...
...(5) becomes. Therefore, the difference e between 0 (t) and Q (t)
When (t) is e (t) = 0 (t) - Q (t) = ±90° (6), υ C1 (t) = 0. With this state as a reference, if Q (t) leads or lags in phase with respect to 0 (t), control is performed so that the difference between Q (t) and 0 (t) becomes 90°. That is, the outputs of the first voltage controlled oscillator 7 and the second voltage controlled oscillator 11 have a phase difference of 90 degrees.

以上はω0=ωQとして説明してきたが、次にこ
の状態を得る手段について説明する。電流切替器
12から、定電流Isが低域濾波器10の抵抗R2
コンデンサCの接続点に供給される。このR2
Cの積を積分定数として低域濾波器10から積分
電圧が得られるから、第2の電圧制御発振器11
の出力周波数ωQ(t)は掃引状態となる。従つ
て、この周波数と第1の電圧制御発振器7の出力
周波数ω0との差ωQ(t)−ω0も掃引状態となる。
その掃引の速度をΔω〓rad/sec2とすれば、位相比
較器9、低域濾波器10、電圧制御発振器11か
らなるPLLの入力位相は−1/2Δω〓t2となる。
The above explanation has been made assuming ω 0Q , but next we will explain the means for obtaining this state. A constant current Is is supplied from the current switch 12 to the connection point between the resistor R 2 and the capacitor C of the low-pass filter 10 . Since the integrated voltage is obtained from the low-pass filter 10 by using the product of R 2 and C as an integral constant, the second voltage controlled oscillator 11
The output frequency ω Q (t) of is in a sweep state. Therefore, the difference ω Q (t)−ω 0 between this frequency and the output frequency ω 0 of the first voltage controlled oscillator 7 is also in the sweep state.
If the speed of the sweep is Δω〓rad/sec 2 , then the input phase of the PLL consisting of the phase comparator 9, low-pass filter 10, and voltage-controlled oscillator 11 becomes −1/2Δω〓t 2 .

前述のυ0(t)、0(t)、υQ(t)、Q(t)
、υd
(t)、υC1(t)およびe(t)−π/2のラプラ
ス変 換をそれぞれV0(s)、Φ0(s)、VQ(s)、ΦQ
(s)、Vd(s)、VC1(s)およびΦe(s)とし、位
相比較器9の感度をKd、電圧制御発振器11の
制御感度をKQ、低域濾波器10の伝送特性をF
(s)とすれば、 Vd(s)=Kd〔Φ0(s)−ΦQ(s)〕 ………(7) VC1(s)=F(s)Vd(s) ………(8) ΦQ(s)=KQVC1(s)/S ………(9) 式(7)〜式(9)からループの伝達関数H(s)は、 H(s)=ΦQ(s)/Φ0(s)=KQKdF(s)/
s+KQKdF(s) ………(10) そして、 Φe(s)/Φ0(s)=Φ0(s)−Φ0(s)−ΦQ
s)/Φ0(s)=1−H (s) =s/s+KQKdF(s) ………(11) したがつて位相差Φe(s)は Φe(s)=sΦ0(s)/s+KQKdF(s)
………(12) 式(12)のΦ0(s)は、位相比較器9、低域濾波器1
0、電圧制御発振器11からなるPLLの入力位
相であるから、前に求めた−1/2Δω〓t2を用いて Φ0(s)=−Δω〓/s3 ………(13) また、低域濾波器10の構成が第2図に示すよう
な能動濾波器であれば、 F(s)=sτ2+1/sτ1………(14) ただし、τ1=R1C、τ2=R2Cとする。
The aforementioned υ 0 (t), 0 (t), υ Q (t), Q (t)
, υ d
(t), υ C1 (t) and e (t)−π/2 are expressed as V 0 (s), Φ 0 (s), V Q (s), Φ Q, respectively.
(s), V d (s), V C1 (s) and Φ e (s), the sensitivity of the phase comparator 9 is K d , the control sensitivity of the voltage controlled oscillator 11 is K Q , and the sensitivity of the low-pass filter 10 is The transmission characteristics are F
(s), then V d (s) = K d0 (s) - Φ Q (s)] ...... (7) V C1 (s) = F (s) V d (s) ... ...(8) Φ Q (s) = K Q V C1 (s)/S ......(9) From equations (7) to (9), the loop transfer function H(s) is H(s) = Φ Q (s) / Φ 0 (s) = K Q K d F (s) /
s+K Q K d F (s) ......(10) And Φ e (s) / Φ 0 (s) = Φ 0 (s) - Φ 0 (s) - Φ Q (
s)/Φ 0 (s) = 1-H (s) = s/s + K Q K d F (s) ......(11) Therefore, the phase difference Φ e (s) is Φ e (s) = sΦ 0 (s)/s+K Q K d F(s)
......(12) Φ 0 (s) in equation (12) is the phase comparator 9 and the low-pass filter 1.
0, this is the input phase of the PLL consisting of the voltage controlled oscillator 11, so using -1/2∆ω〓t 2 obtained earlier, Φ 0 (s) = -∆ω〓/s 3 ...... (13) Also, If the configuration of the low-pass filter 10 is an active filter as shown in FIG. 2, F(s)=sτ 2 +1/sτ 1 ………(14) However, τ 1 = R 1 C, τ 2 = R2C .

式(13)および式(14)を式(12)に代入して Φe(s)=−Δω〓/s/s2+2ζωo+ωo 2
……(15) ただし、 従つて、定常状態でのe(t)−π/2は lim t→∞〔e(t)−π/2〕=lim s→0e(s) =lim s→0−Δω〓/s2+2ζωo+ωo 2 =−Δω/ω〓o 2(rad) ………(16) と一定の値となる。すなわちωQ(t)=ω0となつ
ていることを示す。
Substituting equations (13) and (14) into equation (12), Φ e (s)=−Δω〓/s/s 2 +2ζω oo 2
...(15) However, Therefore, e (t)-π/2 in steady state is lim t→∞ [ e (t)-π/2] = lim s→ 0e (s) = lim s→ 0 −Δω〓/s 2 +2ζω oo 2 = −Δω/ω〓 o 2 (rad) ......(16) It becomes a constant value. That is, it shows that ω Q (t)=ω 0 .

ただし、式(16)で示す位相差が残るので、こ
れを0にするために、電流切替器12は、PLL
が定常状態に達するに充分な時間の経過後、定電
流Isを断つ。。この時、式(12)のΦ0(s)に式(16)
の値を入れ最終値定理を適用すれば、 e(t)−π/2=lim s→0e(s)=0 ………(17) 従つて式(6)で示す位相関係、すなわち第1の電圧
制御発振器7の出力と第2の電圧制御発振器11
の出力の位相差は90゜となる。
However, since the phase difference shown in equation (16) remains, in order to reduce this to 0, the current switch 12
After sufficient time has elapsed for the constant current Is to reach a steady state, the constant current Is is cut off. . At this time, equation (16) is applied to Φ 0 (s) in equation (12).
If we enter the value of Output of first voltage controlled oscillator 7 and second voltage controlled oscillator 11
The phase difference of the output is 90°.

結局、第2図の位相比較器9、低域濾波器1
0、電圧制御発振器11からなるPLLは第1図
の90゜移相器と置き換えることができた。しかも、
これは広い周波数範囲にわたる90゜移相器となつ
ている。
After all, the phase comparator 9 and the low-pass filter 1 in FIG.
0.0, a PLL consisting of a voltage controlled oscillator 11 could replace the 90° phase shifter in FIG. Moreover,
This is a 90° phase shifter over a wide frequency range.

なお外部雑音等のために、いま述べたPLLの
ロツクがはずれた時、再度、電圧制御発振器11
が掃引を開始できるようにするために、電圧比較
器13を設け、低域濾波器10の出力電圧が一定
値に達したら電流切換器12の出力電流の方向を
制御するようになつている。
Note that when the PLL mentioned above loses lock due to external noise, etc., the voltage controlled oscillator 11
In order to start sweeping, a voltage comparator 13 is provided to control the direction of the output current of the current switch 12 when the output voltage of the low-pass filter 10 reaches a certain value.

第3図は、第1図に示すコスタス・ループの引
込み動作を容易にするための構成を示す。第3図
でブロツク1から8まではそれぞれ第1図の1か
ら8までと同じ要素を示し、その動作も同じであ
る。帯域濾波器14、微分器15、電圧乗算器1
6、低域濾波器17、電圧加算器18はPLL引
込み回路である。
FIG. 3 shows a configuration for facilitating the retracting operation of the Costas loop shown in FIG. Blocks 1 to 8 in FIG. 3 each represent the same elements as 1 to 8 in FIG. 1, and their operations are also the same. Bandpass filter 14, differentiator 15, voltage multiplier 1
6. The low-pass filter 17 and the voltage adder 18 are PLL pull-in circuits.

同期検波器1への入力をAicosωit、電圧制御
発振器7の出力をA0cosω0t、90゜の移相器8の出
力をA0sinω0tとすると、同期検波器1の出力は υpc(t)=A1A0cosωitcosω0t =AiA0/2{cos(ωi+ω0)t+cos(ωi−ω0)t
} ………(18) この信号を低域濾波器3、帯域濾波器14で濾波
し、微分器15で微分して、 υpc′(t)=−AiA0/2(ωi−ω0)sin(ωi−ω0
)t ………(19) また同期検波器2の出力は、 υps(t)=AiA0cosωitsinω0t =AiA0/2{sin(ωi+ω0)t−sin(ωi−ω0)t
} ………(20) この信号を低域濾波器4で低域濾波すると、 υps′(t)=−AiA0/2sin(ωi−ω0)t ………(21) これらυpc′(t)とυps′(t)を電圧乗算器16
で乗算すれば、 υpcs(t)=1/2(AiA0/2〕2{ωi
−ω0){1−cos2(ωi−ω0)t}………(22) が得られる。この式はυpcs(t)の直流成分が同
期検波器1への入力周波数と電圧制御発振器7の
出力周波数との差に比例し、その差の符号を極性
とする信号であることを示す。すなわち周波数弁
別機能を示す。式(22)の信号は低域濾波器17
で低域濾波され、電圧加算器18でコスタス・ル
ープの低域濾波器6の出力と電圧加算される。
If the input to the synchronous detector 1 is A i cosω i t, the output of the voltage controlled oscillator 7 is A 0 cosω 0 t, and the output of the 90° phase shifter 8 is A 0 sinω 0 t, then the output of the synchronous detector 1 is The output is υ pc (t) = A 1 A 0 cosω i tcosω 0 t = A i A 0 /2{cos(ω i0 )t+cos(ω i −ω 0 )t
} ………(18) This signal is filtered by the low-pass filter 3 and the bandpass filter 14, and differentiated by the differentiator 15, so that υ pc ′(t)=−A i A 0 /2(ω i − ω 0 ) sin(ω i −ω 0
) t ......(19) Also, the output of the synchronous detector 2 is υ ps (t) = A i A 0 cosω i tsinω 0 t = A i A 0 /2 {sin (ω i + ω 0 ) t-sin (ω i −ω 0 )t
} ………(20) When this signal is low-pass filtered by low-pass filter 4, υ ps ′(t)=−A i A 0 /2sin(ω i −ω 0 )t ………(21) These υ pc ′(t) and υ ps ′(t) by voltage multiplier 16
If you multiply by, υ pcs (t)=1/2(A i A 0 /2) 2i
−ω 0 ){1−cos2(ω i −ω 0 )t} (22) is obtained. This equation shows that the DC component of υ pcs (t) is proportional to the difference between the input frequency to the synchronous detector 1 and the output frequency of the voltage controlled oscillator 7, and is a signal whose polarity is the sign of the difference. In other words, it shows a frequency discrimination function. The signal of equation (22) is passed through the low-pass filter 17
The output signal is low-pass filtered by the voltage adder 18, and the voltage is added to the output of the low-pass filter 6 of the Costas loop.

なお、帯域濾波器14の濾波特性を第5図に示
す。下側遮断周波数fLはコスタス・ループの雑音
帯域幅から、fUはこのループの引込み範囲から決
める。
Incidentally, the filtering characteristics of the bandpass filter 14 are shown in FIG. The lower cutoff frequency f L is determined from the noise bandwidth of the Costas loop, and f U is determined from the pull-in range of this loop.

結局、第3図の構成では、同期検波器1への入
力周波数と電圧制御発振器7の出力周波数との差
を周波数弁別することによつて、コスタス・ルー
プの引込み範囲を広くすることができる。
After all, in the configuration shown in FIG. 3, by frequency-discriminating the difference between the input frequency to the synchronous detector 1 and the output frequency of the voltage-controlled oscillator 7, it is possible to widen the range of the Costas loop.

次に本発明をテレビジヨン選局装置に応用した
具体例について述べる。第4図において、高周波
入力部19には、複数のテレビジヨン放送波が入
力される。その中のあるチヤンネルの映像搬送波
をυV(t)、音声搬送波をυs(t)とする。υv(t

は残留側帯波変調されているから、 υv(t)=Re{〔I(t)+jQ(t)〕expj〔ωv
v〕} =I(t)cos〔ωvt+v〕−Q(t)sin〔ωv
t+v〕………(23) と表せる。ここで、Reは{ }内の式の実数部、
I(t)は搬送波に対し同相成分の振幅で映像信
号を含む。Q(t)は搬送波に対し直交成分の振
幅、ωvは映像搬送波の角周波数、vは映像搬送
波の位相である。
Next, a specific example in which the present invention is applied to a television channel selection device will be described. In FIG. 4, a plurality of television broadcast waves are input to the high frequency input section 19. Let the video carrier wave of a certain channel among them be υ V (t), and the audio carrier wave be υ s (t). υ v (t
)
is modulated by the residual sideband, so υ v (t)=R e {[I(t)+jQ(t)]expj[ω v t
+ v ]} =I(t)cos[ω v t+ v ]−Q(t)sin[ω v
t+ v ]......(23) Here, R e is the real part of the expression in { },
I(t) includes a video signal with an amplitude of an in-phase component with respect to a carrier wave. Q(t) is the amplitude of a component orthogonal to the carrier wave, ω v is the angular frequency of the video carrier wave, and v is the phase of the video carrier wave.

第1の電圧制御発振器20の出力を υ0(t)=A0cos(ω0t+0) ………(1)′ とし、これを式(23)の映像搬送波υv(t)と共
に電圧乗算器から成る第1の同期検波器21に加
えると、その出力υpv(t)は υpv(t)={I(t)cos〔ωvt+v〕 −Q(t)sin〔ωvt+v〕}A0cos(ω0t+0) =A0I(t)cos〔ωvt+v〕cos(ω0t+0) −A0Q(t)sin〔ωvt+vcos(ω0t+0) =A0I(t)/2{cos〔ωv+ω0)t+v0〕 +cos〔(ωv−ω0)t+v0〕} −A0Q(t)/2{sin〔(ωv+ω0)t+v0〕 +sin〔(ωv−ω0)t+v0〕} ………(24) いま、電圧制御発振器出力が、映像搬送波に同期
すると、ω0=ωvであるから、 υpv(t)=A0I(t)/2{cos〔2ωvt+v0
+cos〔v0〕} −A0Q(t)/2{sin〔2ωvt+v0〕+sin〔
v0〕}………(25) 低域濾波器22で2ωvを除去すると、 υpv(t)=A0I(t)/2cos−A0Q(t)/2sin ………(26) ここで、はv0で、映像搬送波と電圧制御
発振出力との位相差である。もし、=0ならば υpv(t)=A0I(t)/2 ………(27) となる。すなわち映像搬送波に対し同期成分の振
幅が検出出力として得られる。しかし直交成分の
振幅は検波されない。検波出力A0I(t)/2は映像 検波出力として、低域濾波器22を経て信号増幅
器23で増幅され、映像信号増幅器24を経て映
像出力装置25に出力される。低域濾波器22の
濾波特性は第6図に示されている。なお、第6図
において、49は映像信号ベースバンド、50は
音声搬送波を示す。映像信号はこの図に示すよう
にベーススバンドで濾波される。
Let the output of the first voltage controlled oscillator 20 be υ 0 (t) = A 0 cos (ω 0 t+ 0 ) ......(1)', and use this as the voltage along with the image carrier wave υ v (t) in equation (23). When applied to the first synchronous detector 21 consisting of a multiplier, its output υ pv (t) is υ pv (t) = {I(t) cos [ω v t+ v ] −Q(t) sin [ω v t+ v ]}A 0 cos(ω 0 t+ 0 ) =A 0 I(t)cos[ω v t+ v ]cos(ω 0 t+ 0 ) −A 0 Q(t) sin[ω v t+ v cos(ω 0 t+ 0 ) =A 0 I(t)/2 {cos[ω v0 )t+ v + 0 ] +cos[(ω v −ω 0 )t+ v0 ]} −A 0 Q(t)/2 {sin [(ω v + ω 0 ) t+ v + 0 ] + sin [(ω vω 0 ) t+ v0 ]} ………(24) Now, when the voltage controlled oscillator output is synchronized with the video carrier wave, ω Since 0 = ω v , υ pv (t) = A 0 I(t)/2 {cos [2ω v t+ v + 0 ]
+cos〔 v0 〕} −A 0 Q(t)/2{sin〔2ω v t+ v0 〕+sin〔
v0 ]}……(25) When 2ω v is removed by the low-pass filter 22, υ pv (t)=A 0 I(t)/2cos−A 0 Q(t)/2sin……( 26) Here, is v0 , which is the phase difference between the video carrier and the voltage-controlled oscillation output. If = 0, υ pv (t) = A 0 I (t)/2 (27). That is, the amplitude of the synchronous component with respect to the video carrier wave is obtained as a detection output. However, the amplitude of the orthogonal component is not detected. The detection output A 0 I(t)/2 is output as a video detection output through a low-pass filter 22, amplified by a signal amplifier 23, and outputted to a video output device 25 through a video signal amplifier 24. The filtering characteristics of the low-pass filter 22 are shown in FIG. In FIG. 6, 49 indicates a video signal baseband, and 50 indicates an audio carrier wave. The video signal is filtered at baseband as shown in this figure.

テレビジヨン放送の音声搬送波υs(t)は周波
数変調されているから、 υs(t)=Ascos〔{ωs+S(t)}t+s
………(28) で表せる。ここで、Asは音声搬送波の振幅、ωs
は音声搬送波の角周波数、S(t)は音声信号、
sは音声搬送波の位相である。
Since the audio carrier wave υ s (t) of television broadcasting is frequency modulated, υ s (t) = A s cos [{ω s + S (t)} t + s ]
It can be expressed as (28). where A s is the amplitude of the audio carrier, ω s
is the angular frequency of the audio carrier wave, S(t) is the audio signal,
s is the phase of the audio carrier.

このυs(t)と式(1)′のυ0(t)を同期検波器2
1に加えると、その出力は、 υps=Ascos〔{ωs+S(t)}t+s〕A0cos(ω0
0) =AsA0/2cos〔(ωs+ω0)t+S(t)t+s
0〕 +AsA0/2cos〔(ωs−ω0)t+S(t)t+s
0〕………(29) 低域濾波器22でωs+ω0の周波数成分を除去す
ると、 υps(t)=AsA0/2cos〔(ωs−ω0)t+S(t)
t+s0〕 =AsA0/2cos〔{ωIF+S(t)}t+IF〕……
…(30) ここで、ωIFはωs−ω0で音声中間角周波数、IF
s0で音声中間搬送波の位相である。式(30)
は式(28)で示される高周波数音声搬送波を中間
周波音声搬送波に変換したものに他ならない。
This υ s (t) and υ 0 (t) of equation (1)′ are calculated by the synchronous detector 2.
1, its output is υ ps = A s cos [{ω s + S(t)} t+ s ] A 0 cos (ω 0
+ 0 ) =A s A 0 /2cos [(ω s + ω 0 )t+S(t)t+ s +
0 ] +A s A 0 /2cos [(ω s −ω 0 )t+S(t)t+ s
0 ]……(29) When the frequency component of ω s + ω 0 is removed by the low-pass filter 22, υ ps (t)=A s A 0 /2cos [(ω s −ω 0 )t+S(t)
t+ s0 ] = A s A 0 /2cos [{ω IF + S(t)} t+ IF ]...
…(30) Here, ω IF is the audio intermediate angular frequency at ω s − ω 0 , and IF is
s0 is the phase of the audio intermediate carrier. Formula (30)
is nothing but the high frequency audio carrier wave shown in equation (28) converted into an intermediate frequency audio carrier wave.

低域濾波器22の濾波特性は、第6図のように
中間周波音声搬送波周波数ωIFをカバーするよう
になつている。ωIFとして4.5MHzをとつている
が、この図はNTSC方式の例であり、他の方式で
は周波数が異なる。中間周波音声搬送波はこの低
域濾波器22を経て、信号増幅器23および音声
中間周波増幅器26で増幅される。その出力は周
波数弁別器27で検波され、音声信号S(t)が
得られる。S(t)は音声出力装置28に供給さ
れる。
The filtering characteristics of the low-pass filter 22 are designed to cover the intermediate frequency audio carrier frequency ω IF as shown in FIG. Although 4.5MHz is used as the ω IF , this figure is an example of the NTSC system, and the frequency is different for other systems. The intermediate frequency audio carrier wave passes through this low pass filter 22 and is amplified by a signal amplifier 23 and an audio intermediate frequency amplifier 26. The output is detected by a frequency discriminator 27 to obtain an audio signal S(t). S(t) is supplied to the audio output device 28.

以上では、映像搬送波υv(t)の位相と電圧制
御発振器20の出力υ0(t)の位相との間に差が
ないもの、すなわち、=0として説明したが、
この状態は次のようにして得られる。
In the above explanation, it is assumed that there is no difference between the phase of the video carrier wave υ v (t) and the phase of the output υ 0 (t) of the voltage controlled oscillator 20, that is, =0.
This state can be obtained as follows.

位相比較器29、低域濾波器30および第2の
電圧制御発振器31からなるPLL(第2図の9,
10,11に相当するPLL)の働らきで、第2
の電圧制御発振器31の出力υQ(t)は第1の電
圧制御発振器20の出力と90゜の位相差を持つか
ら υQ(t)=A0sin(ω0t+0) ………(31) これを式(23)の映像搬送波υv(t)と共に電圧
乗算器から成る第2の同期検波器32に加える
と、その出力υPQ(t)は υPQ(t)={I(t)cos〔ωvt+v〕 −Q(t)sin〔ωvt+v〕}A0sin(ω0t+0) =A0I(t)cos〔ωvt+v〕sin(ω0t+0) −A0Q(t)sin〔ωvt+v〕sin(ω0t+0) =A0I(t)/2{sin〔(ωv+ω0)t+v0〕 −sin〔(ωv−ω0)t+v0〕} −A0Q(t)/2{−cos〔(ωv+ω0)t+v0
〕 +cos〔(ωv−ω0)t+v0〕} ………(32) ω0=ωvであるから、 υPQ(t)=A0I(t)/2{sin〔2ωvt+v0
−sin〔v0〕} −A0Q(t)/2{−cos〔2ωvt+v0〕+cos
v0〕}………(33) 低域濾波器33で2ωv信号を除去すると、 υPQ(t)=−A0I(t)/2sin−A0Q(t)/2cos
………(34) が得られる。このυPQ(t)は信号増幅器34で増
幅され、位相比較器35に加えられる。
A PLL (9 in FIG. 2,
10 and 11), the second
Since the output υ Q (t) of the voltage controlled oscillator 31 has a phase difference of 90° from the output of the first voltage controlled oscillator 20, υ Q (t)=A 0 sin(ω 0 t+ 0 ) ......( 31) When this is added to the second synchronous detector 32 consisting of a voltage multiplier along with the video carrier wave υ v (t) in equation (23), its output υ PQ (t) is υ PQ (t)={I( t)cos[ω v t+ v ] −Q(t) sin[ω v t+ v ]}A 0 sin(ω 0 t+ 0 ) =A 0 I(t) cos[ω v t+ v ] sin(ω 0 t+ 0 ) −A 0 Q(t) sin [ω v t+ v ] sin (ω 0 t+ 0 ) = A 0 I(t)/2 {sin [(ω v + ω 0 ) t+ v + 0 ] −sin [( ω v −ω 0 )t+ v0 ]} −A 0 Q(t)/2{−cos[(ω v0 )t+ v + 0
] +cos [(ω v −ω 0 )t+ v0 ]} ………(32) Since ω 0v , υ PQ (t)=A 0 I(t)/2{sin[2ω v t+ v + 0 ]
−sin [ v0 ]} −A 0 Q (t) / 2 {−cos [2ω v t + v + 0 ] + cos
[ v0 ]}……(33) When the 2ω v signal is removed by the low-pass filter 33, υ PQ (t)=−A 0 I(t)/2sin−A 0 Q(t)/2cos
......(34) is obtained. This υ PQ (t) is amplified by a signal amplifier 34 and applied to a phase comparator 35.

制御電圧υC2(t)は位相比較器35で、式
(26)と式(34)で得られるυPV(t)およびυPQ
(t)を電圧乗算して得られる。
The control voltage υ C2 (t) is determined by the phase comparator 35, and υ PV (t) and υ PQ obtained from equations (26) and (34)
(t) multiplied by voltage.

υC2(t)=υPV(t)・υPQ(t) ={A0I(t)/2cos−A0Q(t)/2sin} {−A0I(t)/2sin−A0Q(t)/2cos} =−A0 2/8{I(t)2−Q(t)2}Θ −A0 2/4{I(t)Q(t)} ………(35) ここでΘ=2である。υ C2 (t)=υ PV (t)・υ PQ (t) = {A 0 I(t)/2cos−A 0 Q(t)/2sin} {−A 0 I(t)/2sin−A 0 Q(t)/2cos} =-A 0 2 /8 {I(t) 2 -Q(t) 2 }Θ −A 0 2 /4{I(t)Q(t)} ......(35) Here Θ=2.

映像搬送波υV(t)は残留側波帯特性を持つて
いるから、同相成分I(t)は直交成分Q(t)よ
りも常に大きい。したがつて、−A0/8{I(t)2− Q(t)2}≠0である。この時、ループ雑音帯域
幅が−A0 2/4{I(t)Q(t)}を除去するのに充 分狭ければ、第1の電圧制御発振器20はΘ=0
となるように制御される。すなわち20,21,
22,23,29,31,32,33,34,3
5,36,37,38からなるPLLは=0と
なるように制御される。=0のとき、式(27)
ですでに示したとおり、映像搬送波に対し同相成
分の振幅が検波出力として得られる。このPLL
はコスタス・ループを構成している。なお、低域
濾波器36は式35で示される信号を低域濾波す
る低域濾波器、電圧加算器37は低域濾波器36
の出力すなわちコスタス・ループの制御電圧と次
に述べるコスタス・ループ引込み用周波数弁別回
路の出力電圧とを加算する電圧加算器、電圧加算
器38は電圧加算器37の出力と同じく次に述べ
る選局電圧を選択する回路の出力とを加算する電
圧加算器である。
Since the video carrier wave υ V (t) has vestigial sideband characteristics, the in-phase component I(t) is always larger than the quadrature component Q(t). Therefore, −A 0 /8{I(t) 2 −Q(t) 2 }≠0. At this time, if the loop noise bandwidth is narrow enough to eliminate -A 0 2 /4 {I(t)Q(t)}, the first voltage controlled oscillator 20
It is controlled so that That is, 20, 21,
22, 23, 29, 31, 32, 33, 34, 3
The PLL consisting of 5, 36, 37, and 38 is controlled so that =0. When = 0, formula (27)
As already shown in , the amplitude of the in-phase component of the video carrier wave is obtained as the detection output. This PLL
constitutes the Costas Loop. Note that the low-pass filter 36 is a low-pass filter that low-pass filters the signal expressed by equation 35, and the voltage adder 37 is the low-pass filter 36.
The voltage adder 38 is a voltage adder that adds the output of the Costas loop, that is, the control voltage of the Costas loop, and the output voltage of the frequency discrimination circuit for pulling in the Costas loop, which will be described next. This is a voltage adder that adds the output of the voltage selection circuit.

帯域濾波器39、微分器40、電圧乗算器4
1、低域濾波器42および電圧加算器37は、そ
れぞれ第3図の14,15,16,17および1
8に相当するコスタス・ループ引込み用周波数弁
別回路である。電圧選択器43は制御入力装置4
4で制御されて、電圧記憶装置45から選局希望
チヤンネルに対応して選局電圧を選択する回路で
ある。電圧記憶装置45は可変抵抗器、デイジタ
ル化電圧記憶装置あるいはその他の記憶装置のい
ずれでもよい。電流切替器46、電圧比較器47
はそれぞれ第2図の12,13に相当し、電圧切
替制御器48は、電流切替器46が29,30,
31からなるPLLが定常状態に達するに充分な
時間の経過後に定電流Isを断つのを制御するため
の制御器である。
Bandpass filter 39, differentiator 40, voltage multiplier 4
1, the low-pass filter 42 and the voltage adder 37 are respectively 14, 15, 16, 17 and 1 in FIG.
This is a frequency discrimination circuit for drawing in a Costas loop corresponding to No. 8. The voltage selector 43 is the control input device 4
4, the circuit selects a channel selection voltage from the voltage storage device 45 in accordance with the channel desired to be selected. Voltage storage device 45 may be a variable resistor, digitized voltage storage device, or other storage device. Current switcher 46, voltage comparator 47
correspond to 12 and 13 in FIG. 2, respectively, and the voltage switching controller 48 and the current switching controller 46 correspond to 29, 30,
This is a controller for controlling cutting off of the constant current Is after a sufficient time has elapsed for the PLL consisting of 31 to reach a steady state.

以上のような構成をとることにより、制御入力
装置44から入力された選局希望の局に対応して
選局電圧を選択し、これを第1の電圧制御発振器
20に加えてまず所要の発振波数近傍の周波数を
もつ信号を発振させ、これに29,30,31か
らなるPLLで90゜の位相差をもつ信号の第2の電
圧制御発振器31で発振させ、これらの2つの発
振器を2つの電圧制御発振器とするコスタス・ル
ープと、39,40,41,42および37から
なる引込み用波数弁別回路とで、高周波入力部1
9から入力される選局希望の局を同期受信するこ
とができる。
By adopting the above configuration, a tuning voltage is selected corresponding to the desired station inputted from the control input device 44, and this voltage is applied to the first voltage controlled oscillator 20 to first generate the required oscillation. A signal with a frequency close to the wave number is oscillated, and a PLL consisting of 29, 30, and 31 is used to oscillate the signal in the second voltage controlled oscillator 31 with a phase difference of 90°, and these two oscillators are The high frequency input section 1 is made up of a Costas loop as a voltage controlled oscillator and a wave number discriminator circuit for pulling in consisting of 39, 40, 41, 42 and 37.
It is possible to synchronously receive the desired station input from 9.

なお、高周波入力部19、第1の電圧制御発振
器20、第1の同期検波器21、位相比較器2
9、第2の電圧制御発振器31、第2の同期検波
器31を1GHz近くの高い周波数で動作させるに
は、高移動度デバイス、特にGaAsデバイスが有
効である。
Note that the high frequency input section 19, the first voltage controlled oscillator 20, the first synchronous detector 21, and the phase comparator 2
9. High mobility devices, especially GaAs devices, are effective in operating the second voltage controlled oscillator 31 and the second synchronous detector 31 at a high frequency near 1 GHz.

以上に述べたとおり、本発明では同期搬送波再
生方式の同期受信機において、90゜移相器の代わ
りに、第1の電圧制御発振器の出力を入力とし、
第2の電圧制御発振器の出力がこの入力と90゜の
位相となるPLLを用い、さらにこのPLLの低域
濾波器の積分回路素子の接続点に定電流を供給し
て、第2の電圧制御発振器の発振周波数を掃引す
る構成をとつているので、このため単一周波数で
は構成することは容易でも、広い周波数にわたつ
て構成することが困難な90゜移相器に代わる回路
が得られ、しかもその動作が速い構成となつてい
る。
As described above, in the present invention, in a synchronous receiver using a synchronous carrier regeneration method, the output of the first voltage controlled oscillator is input instead of the 90° phase shifter,
A PLL in which the output of the second voltage controlled oscillator is in phase with this input by 90° is used, and a constant current is supplied to the connection point of the integrating circuit element of the low-pass filter of this PLL to perform the second voltage control. Since it has a configuration that sweeps the oscillation frequency of the oscillator, a circuit that can replace the 90° phase shifter, which is easy to configure at a single frequency but difficult to configure over a wide range of frequencies, can be obtained. Moreover, it is configured to operate quickly.

例えば本発明をテレビジヨン受信機に応用すれ
ば、第1の電圧制御発振器20の発振出力の位相
を、選局希望の局の映像搬送波の位相に同期さ
せ、映像信号および音声中間周波信号を得ている
ので、従来のテレビジヨンチユーナのようなイン
ダクタと可変容量ダイオードを使用した同調方式
に比べ、集積回路化が容易となり、またチユーナ
の製造工程での無調整化が実現できる。
For example, if the present invention is applied to a television receiver, the phase of the oscillation output of the first voltage controlled oscillator 20 is synchronized with the phase of the video carrier wave of the desired station to obtain a video signal and an audio intermediate frequency signal. Therefore, compared to the tuning method using an inductor and a variable capacitance diode as in the conventional television tuner, it is easier to integrate the circuit, and it is possible to eliminate adjustment in the tuner manufacturing process.

また、ベースバンドに復調された映像信号と、
中間周波に変換された音声中間周波信号を、第6
図のような濾波特性を持つ低域濾波器22で濾波
し、信号増幅器23で両者を増幅する構成とした
場合には、映線信号と音声中間周波信号を1つの
増幅器で増幅しているにも拘らず、従来のインタ
ーキヤリア音声受信方式にように、映像信号が音
声信号に混信することがない。特に音声重による
音楽のステレオ放送のバズ対策として有効であ
る。
In addition, the video signal demodulated to baseband,
The audio intermediate frequency signal converted to an intermediate frequency is
If the configuration is such that the low-pass filter 22 with filtering characteristics as shown in the figure filters the signal, and the signal amplifier 23 amplifies both, the video signal and the audio intermediate frequency signal are amplified by one amplifier. Nevertheless, the video signal does not interfere with the audio signal as in the conventional intercarrier audio reception system. This is particularly effective as a countermeasure against buzz in stereo music broadcasts with overlapping audio.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の要部ブロツク図、第2図は本
発明の一実施例の要部ブロツク図、第3図はコス
タス・ループ用周波数弁別回路の要部ブロツク
図、第4図は本発明の他の実施例の要部ブロツク
図、第5図はコスタス・ループ用周波数弁別回路
の帯域濾波器の濾波特性図、第6図は信号増幅器
の濾波特性の一例を示す図である。 1……第1の同期検波器、2……第2の同期検
波器、3,4……低域濾波器、5……第2の位相
比較器、6……低域濾波器、7……第1の電圧制
御発振器、9……第1の位相比較器、10……低
域濾波器、11……第2の電圧制御発振器、12
……電流切替器、20……第1の電圧制御発振
器、29……第1の位相比較器、30……低域濾
波器、31……第2の電圧制御発振器。
FIG. 1 is a block diagram of the main part of the conventional example, FIG. 2 is a block diagram of the main part of an embodiment of the present invention, FIG. 3 is a block diagram of the main part of the frequency discriminator circuit for Costas loop, and FIG. FIG. 5 is a block diagram of a main part of another embodiment of the invention, FIG. 5 is a diagram showing filtering characteristics of a bandpass filter of a frequency discrimination circuit for Costas loop, and FIG. 6 is a diagram showing an example of filtering characteristics of a signal amplifier. DESCRIPTION OF SYMBOLS 1...First synchronous detector, 2...Second synchronous detector, 3, 4...Low pass filter, 5...Second phase comparator, 6...Low pass filter, 7... ...First voltage controlled oscillator, 9... First phase comparator, 10... Low pass filter, 11... Second voltage controlled oscillator, 12
... Current switcher, 20 ... First voltage controlled oscillator, 29 ... First phase comparator, 30 ... Low pass filter, 31 ... Second voltage controlled oscillator.

Claims (1)

【特許請求の範囲】 1 第1および第2の電圧制御発振器と、このう
ち第2の電圧制御発振器の出力周波数を掃引する
掃引手段と、前記第1および第2の電圧制御発振
器の出力の位相を比較する第1の位相比較器と、
前記第1および第2の電圧制御発振器の出力をそ
れぞれ同期搬送波とし、これら2つの同期搬送波
によつて、受信機入力部から入力される変調搬送
波の同相および直交成分を検波する第1および第
2の同期検波器と、前記第1および第2の同期検
波器の出力から前記変調搬送波入力と前記第1の
電圧制御発振器出力の位相差を検出する第2の位
相比較器とを備え、前記第1の位相比較器とその
出力を低域濾波する第1の低域濾波器と前記第2
の電圧制御発振器とを含めてなる第1の位相ロツ
クループに前記第1の電圧制御発振器の出力を入
力するとともに、前記掃引手段を、電流切替器か
らの定電流出力を前記第1の低域濾波器の積分回
路に加えて積分電圧を得、この積分電圧を前記第
2の電圧制御発振器および電圧比較器に加え、こ
の電圧比較器の出力で前記電流切替器が、前記第
1の位相ロツクループが定常状態に達するのに充
分な時間の経過後、前記定電流を断つように構成
し、前記第2の位相比較器の出力で第2の低域濾
波器を介して前記第1の電圧制御発振器を制御す
る第2の位相ロツクループを構成したことを特徴
とする受信機。 2 変調搬送波が、テレビジヨン信号搬送波であ
ることを特徴とする特許請求の範囲第1項記載の
受信機。
[Claims] 1. First and second voltage controlled oscillators, sweeping means for sweeping the output frequency of the second voltage controlled oscillator, and phases of the outputs of the first and second voltage controlled oscillators. a first phase comparator that compares the
The outputs of the first and second voltage controlled oscillators are respectively synchronous carrier waves, and the first and second voltage controlled oscillators detect in-phase and quadrature components of the modulated carrier wave input from the receiver input section using these two synchronous carrier waves. a synchronous detector, and a second phase comparator that detects a phase difference between the modulated carrier input and the first voltage controlled oscillator output from the outputs of the first and second synchronous detectors, a first low-pass filter for low-pass filtering the output of the first phase comparator;
The output of the first voltage controlled oscillator is input to a first phase lock loop including a voltage controlled oscillator, and the sweeping means is configured to input the constant current output from the current switch to the first low pass filter. The integrated voltage is applied to the second voltage controlled oscillator and the voltage comparator, and the output of the voltage comparator is used to control the current switch and the first phase lock loop. After a sufficient time to reach a steady state, the constant current is cut off, and the output of the second phase comparator passes through a second low-pass filter to the first voltage controlled oscillator. 1. A receiver comprising a second phase lock loop for controlling. 2. The receiver according to claim 1, wherein the modulated carrier wave is a television signal carrier wave.
JP21380681A 1981-12-23 1981-12-23 Receiver Granted JPS58125984A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21380681A JPS58125984A (en) 1981-12-23 1981-12-23 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21380681A JPS58125984A (en) 1981-12-23 1981-12-23 Receiver

Publications (2)

Publication Number Publication Date
JPS58125984A JPS58125984A (en) 1983-07-27
JPH0157866B2 true JPH0157866B2 (en) 1989-12-07

Family

ID=16645346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21380681A Granted JPS58125984A (en) 1981-12-23 1981-12-23 Receiver

Country Status (1)

Country Link
JP (1) JPS58125984A (en)

Also Published As

Publication number Publication date
JPS58125984A (en) 1983-07-27

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