JPH0155613B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a random binary code string generator that generates logical "1" or "0" with arbitrary probability.

As a testing method for digital circuits, a random binary code string of logic "1" and "0" is added to the test circuit, and the number of clocks of one of the binary codes, for example, logic "1" appearing at the output terminal is counted. There is a method to compare the count value with the normal circuit.

Further, a random binary code string with a low probability of producing a logical "1" or "0" may be used as a reset signal or a load signal.

A configuration diagram of a conventional device used in such a case is shown in FIG. FIG. 1 shows an example of 4 bits and 3 outputs. 1 in FIG. 1 is a binary random number generator such as an M-sequence generator, 2A to 2C are registers, and 3A to 3C.
is a digital comparator, and 6A to 6C are output terminals.

At the output terminals 11a to 14d of the binary random number generator 1, binary random numbers with a probability of 1/2 are independently outputted in synchronization with the clock. Therefore, the output end 11
The output binary codes of a to 14d are set to 2 for each clock.
When viewed as a hexadecimal digital value, it ranges from “0” to “1”.
Assuming that the values up to this point are 4-digit digital values, they all occur with equal probability.

The registers 2A to 2C are set in advance so that a four-digit binary digital value corresponding to the desired probability of occurrence is output. Note that switches may be used in place of the registers 2A to 2C.

Digital comparators 3A to 3C output the output of binary random number generator 1 and registers 2A to 3C for each clock.
The outputs of the registers 2A to 2C are compared, and if the outputs of the registers 2A to 2C are larger than the output of the binary random number generator 1, a code "1" is output to the output terminals 6A to 6C, and in other cases, a "0" is output.

In this way, the code string that comes out to the output terminals 6A to 6C has a probability of 2 to 1 with an accuracy of 2 ⁴ .
The value becomes a random code string.

Since FIG. 1 shows an example of a 4-bit configuration, there are four binary random number generators 11 to 14 in binary random number generator 1, registers 2A to 2C, and digital comparator 3.
A to 3C also have 21 to 24 registers, 3
There are 1 to 34 digital comparators. If this is made into an 8-bit configuration, eight of each configuration will be required. The outputs 11a-14d of the binary random number generators 11-14 are connected to the inputs of the digital comparators 3A-3C, respectively. The connection method is 2.
First outputs 11a-1 of hex random number generators 11-14
4a to the digital comparator 3A, and the following 1
Connect 1b to 14b to 3B, and connect 11c to 14c to 3C.

Also, since FIG. 1 is an example of three outputs, three registers 2A to 2C and three digital comparators 3A to 2C are used.
3C, and outputs are taken out from three output terminals 6A to 6C, respectively. Since the binary random number generator 1 has many outputs such as 11 to 14 and 11a to 11d, only one is required.

When there are many digital circuits to test, it is convenient to have multiple outputs at the same time.

However, in order to increase the number of outputs in the conventional device as shown in FIG. 1, the same number of registers and digital comparators as the required number of outputs are required. For example, if you need a generator with 8 bits and 8 outputs,
This requires 8 binary random number generators, 8×8=64 registers, and 8×8=64 digital comparators, resulting in a complicated configuration.

The present invention provides a generator that can extract a large amount of output with a small number of components even when multiple outputs are required. Hereinafter, this invention will be explained in detail with reference to the drawings.

First, a configuration diagram of an embodiment according to the present invention is shown in FIG. Figure 2 shows an example of 8 bits and 8 outputs, where 10 and 20 are generators, 4A to 4H, respectively.
is a multiplier, and 6A to 6H are output terminals.

The generator 10 includes a set of binary random number generators, 8
There are sets of registers 2A to 2H and eight sets of digital comparators 3A to 3H, and the respective components are connected in the same manner as in FIG.

The generator 10 has a 4-bit configuration. Therefore, the binary random number generator 1 has the following as shown in FIG.
There are four binary random number generators 11-14, and registers 2A-2H and digital comparators 3A-3H also have registers 21-24 and digital comparators 31-34, respectively. That is, the generator 1
0 has 4 bits and 8 outputs, and is composed of 4 binary random number generators, 4×8=34 registers, and 4×8=32 digital comparators.

The generator 20 each has one binary random number generator 1L, a register 2L and a digital comparator 3L.

The generator 20 also has a 4-bit configuration. Therefore, the binary random number generator 1L has numbers 11 to 14 in FIG.
There are four binary random number generators corresponding to , and the register 2L and digital comparator 3L each have 21
There are four registers corresponding to .about.24 and four digital comparators corresponding to 31-34. That is, the generator 20 has a 4-bit 1 output, and is composed of four binary random number generators, a register, and a digital comparator.

Note that instead of providing the binary random number generator 1L in the generator 20, the open terminals of the binary random number generators 11 to 14 in the generator 10 may be used.

Multipliers 4A to 4H multiply the eight outputs of generator 10 and the output of generator 20, respectively. FIG. 2 shows an example in which AND gates are used as the multipliers 4A to 4H.

In the case of 8 bits and 8 outputs in Figure 2, four 2
All you need is a base random number generator, 36 registers, 36 digital comparators and 8 multipliers;
The number of configurations is about half that of the case shown in the figure.

The embodiment shown in FIG. 2 can be expressed in general terms as follows.

(1) When generating a random binary code string of n outputs with a precision of 2 ^m , where m≧2 integers and n≧1 integers, (2) a≧1 integers, and b≧1 integers. and a+b=
(3) n consisting of a binary random number generators, n x a registers, and n x a digital comparators.
(4) a one-output generator 20 consisting of b binary random number generators, b registers and b digital comparators; (5) n output of the generator 10; n multipliers each multiplying the output of the generator 20;

In the case of 8 bits and 8 outputs in Figure 2, m=8, n=
8, and since a=4, b=4.

For example, in the case of 12-bit 10 outputs, m=12, n
=10, and if a=6, then b=6, and if a=4, b=8.

In addition, in the case of 16-bit 10 outputs, m = 16, n = 10
and if a=8, then b=8 and a=4
Then, b=12.

When a=6, the generator 10 only needs to have 6 binary random number generators, 60 registers and 60 digital comparators, and the generator 20 each has 6 binary random number generators. All that is required is a register, a register, and a digital comparator.

In order to realize the case of 12 bits and 10 outputs with the conventional device of FIG. 1, 12 random number generators, 120 registers and 120 digital comparators are required. Therefore, according to the configuration shown in FIG. 2, the number of components can be significantly reduced.

The probability of occurrence of "1" appearing at the output terminals 6A to 6H in the 8-bit configuration shown in FIG. 2 is as follows.

Since the output of the generator 10 is 4 bits, 1/2 ⁴ =
Since the output of the generator 20 is also 4 bits, 1/2 ⁴ =1/16. The output of the generator 10 and the output of the generator 20 are multiplied by the multipliers 4A to 4H, so (1/16) x (1/16) = 1/256,
The probability of occurrence of "1" is 1/2 ⁸ .

By changing the set value of the register 2L of the generator 20, the probability of occurrence shown in FIG. 2 can be changed. If the output of the generator 20 is changed from (1/16) to (15/16), the output terminals 6A to 6H have the probability of occurrence = (1/16) x [(1/16) to (15/16). )]=(1/
256) to (15/256) are obtained. This is "1"
This shows that the probability of occurrence of is close to 0 can be set finely.

Note that since the generator 20 has only one set of registers 2L, changing the setting value of the register 2L
outputs can be changed simultaneously.

If an inverter is connected to each output of the generator 10 and generator 20 in Fig. 2, and 4A to 4H are made into a NAND circuit, the probability of occurrence of "1" appearing at the output terminals 6A to 6H is as follows. .

The output of the generator 10 becomes (15/16), and by varying the register 2L, the output of the generator 20 becomes (1/16) to (15/16). Therefore, output terminals 6A to 6H have (210/256) to (255/
256) is obtained. This means that the probability of occurrence of "1" is 1
This shows that it is possible to finely set the one closest to .

Next, a block diagram of another embodiment according to the present invention is shown in FIG. FIG. 3 is a diagram in which a generator 20 and adders 5A to 5H are added to FIG. 2.

The generator 30 has the same configuration as the generator 10, but the occurrence probabilities set in the registers 2A to 2H are different, and the outputs of the multipliers 4A to 4H and each output of the generator 30 are combined with the Add in ~5H. FIG. 3 shows an example in which OR gates are used as adders 5A to 5H.

The embodiment shown in FIG. 3 can be expressed in general terms as follows.

(1) m, n, a, b, generator 10, generator 2
The conditions for 0 and the multiplier are the same as in Figure 1, and (2) an
(3) n adders that add the outputs of the n multipliers and the outputs of the n generators 30, respectively;

For example, the probability of occurrence in Figure 2 is (1/256) ~
(15/256) and the probability of occurrence obtained by the generator 30 in FIG. 3 is (100/256), then the output terminals 6A to 6H in FIG.
256) can be obtained. That is, according to the configuration shown in FIG. 3, a binary code string having the accuracy of the occurrence probability shown in FIG. 2 can be obtained even when the code is far from 0 or 1.

In other words, the probability of occurrence in Figure 2 is, for example,
If it is 0.00163 or 0.999837, in Figure 3
0.455163 will give you a probability of occurrence such as 0.623837.

As described above, according to the present invention, a multi-output random binary code string with high accuracy of occurrence probability can be obtained with a small number of components, and the probability of multi-output occurrence can be further reduced by changing the setting values of a small number of registers. It can be changed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional device, FIG. 2 is a block diagram of an embodiment according to the present invention, and FIG. 3 is a block diagram of another embodiment according to the present invention. 1...Binary random number generator, 1L...Binary random number generator, 2A to 2H...Register, 2L...Register, 3A to 3H...Digital comparator, 3L...
Digital comparator, 4A to 4H... Multiplier, 5A
~5H...Adder, 6A~6H...Output terminal, 1
1-14...Binary random number generator, 21-24...Register, 31-34...Digital comparator, 11
a to 14d...Output terminals of the binary random number generators 11 to 14.

Claims (1)

[Claims] 1 In the case of generating a random binary code string of n outputs with a precision of 2 ^m , where m≧2 integers, n≧1 integers, a≧1 integers, b≧1, integer and a+b=m
For each clock, the outputs of the a binary random number generators and the outputs of the n×a registers are compared by the n×a digital comparators, and the outputs of the n×a registers are a first generator 10 with n outputs that outputs a ``1'' when is greater than the output of the a binary random number generators and a ``0''otherwise; The output of the random number generator and the output of b registers are compared with b digital comparators, and when the output of b registers is greater than the output of b binary random number generators, a "1" is output; In other cases, it includes a second generator 20 with one output that outputs "0", and n multipliers that multiply the n output of the first generator 10 and the output of the second generator 20, respectively. A random binary code string generator characterized in that: 2 When generating a random binary code string of n outputs with an integer of m≧2, an integer of n≧1, and a precision of 2 ^m , an integer of a≧1, an integer of b≧1, and a+b=m
For each clock, the outputs of the a binary random number generators and the outputs of the n×a registers are compared by the n×a digital comparators, and the outputs of the n×a registers are a first generator 10 with n outputs that outputs a ``1'' when is greater than the output of the a binary random number generators and a ``0''otherwise; The output of the random number generator and the output of b registers are compared with b digital comparators, and when the output of b registers is greater than the output of b binary random number generators, a "1" is output; In other cases, it includes a second generator 20 with one output that outputs "0", and n multipliers that multiply the n output of the first generator 10 and the output of the second generator 20, respectively. , A random binary code string generator characterized in that the outputs of the n multipliers are changed by changing the setting values of the b registers of the second generator 20. 3 In the case of generating a random binary code string of n outputs with a precision of 2 ^m , where m≧2 integers, n≧1 integers, a≧1 integers, b≧1 integers, and a+b=m
For each clock, the outputs of the a binary random number generators and the outputs of the n×a registers are compared by the n×a digital comparators, and the outputs of the n×a registers are a first generator 10 with n outputs that outputs a ``1'' when is greater than the output of the a binary random number generators and a ``0''otherwise; The output of the random number generator and the output of the b registers are compared with b digital comparators, and when the output of the b registers is greater than the output of the b binary random number generators, "1" is output; a second generator 20 with a single output that otherwise produces "0"; n multipliers for multiplying the n output of the first generator 10 and the output of the second generator 20, respectively; The outputs of the a binary random number generators and the outputs of the n×a registers are compared by n×a digital comparators every clock, and the outputs of the n×a registers are the a binary random numbers. a third generator 30 with n outputs that outputs "1" when the output is greater than the output of the generator and outputs "0"otherwise; the outputs of the n multipliers and the outputs of the third generator 30; 1. A random binary code string generator comprising: n adders for respectively adding .