JPH0145228Y2 - - Google Patents

Info

Publication number
JPH0145228Y2
JPH0145228Y2 JP1982030543U JP3054382U JPH0145228Y2 JP H0145228 Y2 JPH0145228 Y2 JP H0145228Y2 JP 1982030543 U JP1982030543 U JP 1982030543U JP 3054382 U JP3054382 U JP 3054382U JP H0145228 Y2 JPH0145228 Y2 JP H0145228Y2
Authority
JP
Japan
Prior art keywords
transistor
load
voltage
input terminal
smoothing capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982030543U
Other languages
Japanese (ja)
Other versions
JPS58134043U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3054382U priority Critical patent/JPS58134043U/en
Publication of JPS58134043U publication Critical patent/JPS58134043U/en
Application granted granted Critical
Publication of JPH0145228Y2 publication Critical patent/JPH0145228Y2/ja
Granted legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案は、種々の電子機器に用いられる電源平
滑回路に係り、特に増幅器に直流電源を供給する
に最適な同回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply smoothing circuit used in various electronic devices, and particularly to the same circuit that is most suitable for supplying DC power to an amplifier.

従来の電源平滑回路は、第1図に示す様に入力
端子1には整流回路(図示せず)からの整流出力
即ち非平滑電圧が加わり、電源スイツチ2の閉成
に応じてフイルタ用のコンデンサ3に抵抗4を介
して充電電流が流れ、該コンデンサ3の両端が所
定の電圧になる迄充電されたときトランジスタ5
がオンになり、出力端子6に安定化され、平滑さ
れた出力電圧が現われ、負荷7に該出力電圧が供
給される。
In a conventional power supply smoothing circuit, as shown in Fig. 1, a rectified output from a rectifier circuit (not shown), that is, a non-smoothed voltage is applied to an input terminal 1, and a capacitor for a filter is applied when a power switch 2 is closed. 3 through the resistor 4, and when the capacitor 3 is charged until both ends reach a predetermined voltage, the transistor 5
is turned on, a stabilized and smoothed output voltage appears at the output terminal 6, and the load 7 is supplied with this output voltage.

ところが前述の様に前記コンデンサ3の充電が
抵抗4及びコンデンサ3の各値RoCoによつて定
まる時定数にて行われるため、該コンデンサ3の
充電がほぼ完了する迄トランジスタ5は動作しな
いので、負荷7への電圧供給が行われず、従つて
該負荷7が増幅器の場合増幅動作の遅れが生じて
しまう欠点があつた。
However, as mentioned above, since the capacitor 3 is charged with a time constant determined by the resistor 4 and each value RoCo of the capacitor 3, the transistor 5 does not operate until the capacitor 3 is almost completely charged. Therefore, when the load 7 is an amplifier, there is a drawback that the amplification operation is delayed.

そこで本考案は、前記欠点を除去した電源平滑
回路を提供するもので、以下図面に従つて説明す
る。
Therefore, the present invention provides a power supply smoothing circuit that eliminates the above-mentioned drawbacks, and will be described below with reference to the drawings.

第2図は本考案の電源平滑回路を示し、8は入
力端子、9は電源スイツチ、10,11はバイア
ス抵抗、12はベース抵抗、13は平滑コンデン
サ、14は第1のトランジスタ、15は第2のト
ランジスタ、16は出力端子、17は負荷であ
る。
FIG. 2 shows the power supply smoothing circuit of the present invention, where 8 is an input terminal, 9 is a power switch, 10 and 11 are bias resistors, 12 is a base resistor, 13 is a smoothing capacitor, 14 is a first transistor, and 15 is a first transistor. 2 is a transistor, 16 is an output terminal, and 17 is a load.

次に本考案回路の動作について説明すると、電
源スイツチ9を閉じた瞬間、平滑コンデンサ13
の充電電荷はゼロであるから、B点の電位はアー
ス電位に等しい。前記電源スイツチ9の閉成によ
り、A点はVc.c.なる非平滑電圧が現われ、第2の
トランジスタ15は直ちにオンとなり、これに伴
い第1のトランジスタ14のベースが上昇するの
で、該第1のトランジスタ14はオンとなつて出
力端子16には、前記Vc.c.から第1のトランジス
タ14のコレクタ・エミツタ間の電圧降下(ほぼ
飽和電圧に等しい)を差引いた電圧が発生して、
負荷17に加わる。
Next, to explain the operation of the circuit of the present invention, at the moment when the power switch 9 is closed, the smoothing capacitor 13
Since the charge at is zero, the potential at point B is equal to the ground potential. When the power switch 9 is closed, a non-smooth voltage of Vc.c. appears at the point A, the second transistor 15 is immediately turned on, and the base of the first transistor 14 rises accordingly. The first transistor 14 is turned on, and a voltage obtained by subtracting the voltage drop between the collector and emitter of the first transistor 14 (approximately equal to the saturation voltage) is generated at the output terminal 16.
Added to load 17.

前記平滑コンデンサ13にバイアス抵抗10を
介して充電電流が流れ、充電が完了するとA点と
B点はほぼ同電位になるため、第2のトランジス
タ15はカツトオフになり、第1のトランジスタ
14のベースには、バイアス抵抗10及びベース
抵抗18を介して所定バイアスが与えられると共
に該バイアス抵抗10及び平滑コンデンサ13に
よつて入力端子8に加えられた非平滑電圧に含ま
れるリツプル分は除去され、出力端子16には、
平滑化された出力電圧が現われて、負荷17に直
流電圧が供給される。
A charging current flows through the smoothing capacitor 13 via the bias resistor 10, and when charging is completed, points A and B have almost the same potential, so the second transistor 15 is cut off, and the base of the first transistor 14 is cut off. A predetermined bias is applied to the bias resistor 10 and the base resistor 18, and the ripple included in the unsmoothed voltage applied to the input terminal 8 is removed by the bias resistor 10 and the smoothing capacitor 13, and the output The terminal 16 has
A smoothed output voltage appears, supplying the load 17 with a DC voltage.

以上の様に本考案の電源平滑回路によれば、従
来の如く電源スイツチ閉成時負荷への電源供給が
遅れ、負荷として接続された増幅器等の動作遅延
は、全く解消され、電源スイツチの閉成と共に第
2のトランジスタのオンによつて負荷に直ちに電
源が供給できる。
As described above, according to the power supply smoothing circuit of the present invention, the delay in power supply to the load when the power switch is closed and the delay in the operation of the amplifier, etc. connected as a load, as in the conventional case, are completely eliminated. As soon as the second transistor is turned on, power can be supplied to the load.

本考案の一実施例として第2図において次の値
を用いた場合に所期の目的が達成し得た。
As an example of the present invention, when the following values were used in FIG. 2, the intended purpose could be achieved.

R1=2.7KΩ R2=330Ω R3=10KΩ R4=2.7KΩ C =100μF R1=2.7KΩ R2=330Ω R3=10KΩ R4=2.7KΩ C = 100μF

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電源平滑回路、第2図は本考案
の同回路を示す。 主な図番の説明、8……入力端子、9……電源
スイツチ、10,11……バイアス抵抗、12…
…ベース抵抗、13……平滑コンデンサ、14…
…第1のトランジスタ、15……第2のトランジ
スタ、16……出力端子、17……負荷。
FIG. 1 shows a conventional power supply smoothing circuit, and FIG. 2 shows the same circuit according to the present invention. Explanation of main figure numbers, 8...Input terminal, 9...Power switch, 10, 11...Bias resistor, 12...
...Base resistance, 13...Smoothing capacitor, 14...
...first transistor, 15...second transistor, 16...output terminal, 17...load.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 非平滑電圧が印加される入力端子と、該入力端
子と出力端子に直列にコレクタ・エミツタが接続
された一方の導電型の第1のトランジスタと、該
第1のトランジスタのコレクタ・ベース間にその
コレクタ・エミツタが接続された他方の導電型の
第2のトランジスタと、前記第1のトランジスタ
及び第2のトランジスタのベースとアース間に接
続された平滑コンデンサと、前記入力端子に印加
された非平滑電圧を出力又は遮断する電源スイツ
チと、前記出力端子に接続された負荷とより成
り、前記電源スイツチの閉成時、前記平滑コンデ
ンサで前記第2のトランジスタのベースを制御す
ることによつて該第2のトランジスタをオンにな
すと同時に前記第1のトランジスタをオンにな
し、前記負荷に電源を供給することを特徴とする
電源平滑回路。
an input terminal to which a non-smoothed voltage is applied, a first transistor of one conductivity type whose collector and emitter are connected in series to the input terminal and the output terminal, and a transistor between the collector and base of the first transistor. a second transistor of the other conductivity type to which the collector and emitter are connected; a smoothing capacitor connected between the bases of the first transistor and the second transistor and the ground; and a non-smoothing capacitor connected to the input terminal. It consists of a power switch that outputs or cuts off a voltage, and a load connected to the output terminal, and when the power switch is closed, the smoothing capacitor controls the base of the second transistor to A power supply smoothing circuit characterized in that the first transistor is turned on at the same time as the second transistor is turned on, and power is supplied to the load.
JP3054382U 1982-03-03 1982-03-03 power supply smoothing circuit Granted JPS58134043U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3054382U JPS58134043U (en) 1982-03-03 1982-03-03 power supply smoothing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3054382U JPS58134043U (en) 1982-03-03 1982-03-03 power supply smoothing circuit

Publications (2)

Publication Number Publication Date
JPS58134043U JPS58134043U (en) 1983-09-09
JPH0145228Y2 true JPH0145228Y2 (en) 1989-12-27

Family

ID=30042252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3054382U Granted JPS58134043U (en) 1982-03-03 1982-03-03 power supply smoothing circuit

Country Status (1)

Country Link
JP (1) JPS58134043U (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50136741U (en) * 1974-04-25 1975-11-11

Also Published As

Publication number Publication date
JPS58134043U (en) 1983-09-09

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