JPH0135496B2 - - Google Patents

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Publication number
JPH0135496B2
JPH0135496B2 JP54165130A JP16513079A JPH0135496B2 JP H0135496 B2 JPH0135496 B2 JP H0135496B2 JP 54165130 A JP54165130 A JP 54165130A JP 16513079 A JP16513079 A JP 16513079A JP H0135496 B2 JPH0135496 B2 JP H0135496B2
Authority
JP
Japan
Prior art keywords
carbon
silicon substrate
silicon
oxygen plasma
rie
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54165130A
Other languages
Japanese (ja)
Other versions
JPS5687325A (en
Inventor
Kazumasa Onodera
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Original Assignee
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHO ERU ESU AI GIJUTSU KENKYU KUMIAI filed Critical CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority to JP16513079A priority Critical patent/JPS5687325A/en
Publication of JPS5687325A publication Critical patent/JPS5687325A/en
Publication of JPH0135496B2 publication Critical patent/JPH0135496B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置の製法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a semiconductor device.

平行平板電極構造を有する装置を用いたドライ
エツチング法によりフレオン系ガスを用いてシリ
コン酸化膜、窒化膜、多結晶シリコン膜、等をエ
ツチングしたときその反応機構を起因して異方性
エツチングが期待されるため、微細パターンのエ
ツチング法としてリアクテイブ・イオン・エツチ
ング(以下RIEと称す)法の有用性が認識されて
きている。
When a silicon oxide film, nitride film, polycrystalline silicon film, etc. is etched using a Freon gas using a dry etching method using a device with a parallel plate electrode structure, anisotropic etching is expected due to the reaction mechanism. Therefore, the usefulness of reactive ion etching (hereinafter referred to as RIE) is being recognized as an etching method for fine patterns.

しかしながらこのドライエツチング法は純粋に
化学反応のみを提供するのではなく、イオン化さ
れたガスによるシリコン基板表面へのスパツタリ
ング効果が加わる結果、シリコン結晶中へ反応ガ
スの構成元素である炭素(C)、弗素(F)が浸入して結
晶欠陥を誘発し、ひいてはシリコン基板上に形成
された半導体素子の電気的特性を劣化させる。と
りわけシリコン基板表面が露出して長時間フレオ
ン系ガスプラズマ中に浸積されたときにはこのス
パツタリング効果は更に増大する。
However, this dry etching method does not provide only a purely chemical reaction; as a result of the sputtering effect of the ionized gas on the silicon substrate surface, carbon (C), a constituent element of the reaction gas, is transferred into the silicon crystal. Fluorine (F) enters and induces crystal defects, which in turn deteriorates the electrical characteristics of semiconductor devices formed on silicon substrates. In particular, this sputtering effect is further increased when the surface of the silicon substrate is exposed and immersed in Freon gas plasma for a long period of time.

また侵入元素のうち、炭素は後続の熱処理過程
においてシリコンカーバイト(SiC)を形成し、
これが基板中に分布する金属不純物集合のための
核として働く結果、RIEにより導入された他の元
素、例えば弗素、等と比較して結晶欠陥を誘発し
て素子特性に悪影響を与える可能性はとりわけ大
きい、と考えられる。
Among the interstitial elements, carbon forms silicon carbide (SiC) in the subsequent heat treatment process,
As a result, this acts as a nucleus for the collection of metal impurities distributed in the substrate, and as a result, compared to other elements introduced by RIE, such as fluorine, there is a particular possibility that this will induce crystal defects and adversely affect device characteristics. It can be considered large.

本発明においてはRIEにより導入された高濃度
表面炭素堆積層を除去して、後続の熱処理過程に
おいて新たな結晶欠陥の発生を阻止せしめる方法
を提案するにある。
The present invention proposes a method for removing the high concentration surface carbon deposit layer introduced by RIE to prevent new crystal defects from occurring in the subsequent heat treatment process.

即ち、RIE法により絶縁被膜をエツチングした
のち、同一装置内もしくは他の装置中へRIE終了
後の表面露出せしシリコン基板を入れ、しかるの
ち酸素を導入してたとえば酸素プラズマを発生さ
せる酸素プラズマ処理法である。この方法におい
ては表面堆積層を形成する炭素は揮発性の化合物
であるCO、CO2等のCXOY系の炭素酸化物となり
反応系外へ除去される。即ち XC+YO→CXOY の反応過程が成立している、と考えられる。
That is, after etching the insulating film using the RIE method, the silicon substrate with the surface exposed after RIE is placed in the same device or another device, and then oxygen is introduced to generate, for example, oxygen plasma, which is an oxygen plasma treatment. It is the law. In this method, the carbon forming the surface deposited layer becomes a volatile compound such as C X O Y carbon oxides such as CO and CO 2 and is removed from the reaction system. In other words, it is thought that the reaction process of XC+YO→C X O Y is established.

しかも本酸素プラズマ処理法においては露出せ
しシリコンは酸素と反応してSiLOMのシリコン酸
化物(膜)を形成する反応過程が上記炭素酸化物
の反応過程と同時に起こる結果(低温での酸化の
進行)、露出面の炭素のみではなく、表面からシ
リコン・バルク中へ分布する高濃度の炭素をも除
去できるという長所を有する。
Furthermore, in this oxygen plasma treatment method, the exposed silicon reacts with oxygen to form a silicon oxide (film) of Si L O M , which occurs simultaneously with the carbon oxide reaction process (at low temperatures). This method has the advantage of being able to remove not only the carbon on the exposed surface, but also the high concentration of carbon distributed from the surface into the silicon bulk.

また、他の長所としては低温での(120℃最
大)プラズマ処理の結果、処理中に表面堆積炭素
がシリコン・バルク中へと拡散することはないの
で前述せしCXOY系による炭素の除去過程におい
てほゞ完全に炭素表面堆積層を除去できる点であ
る。これは高温酸素雰囲気中における熱処理(基
板の酸化)では完全に堆積層を除去できない点と
は異なる。
Another advantage is that as a result of plasma processing at low temperatures (maximum 120°C), surface-deposited carbon does not diffuse into the silicon bulk during processing, so the C The point is that the carbon surface deposited layer can be almost completely removed during the removal process. This differs from the fact that the deposited layer cannot be completely removed by heat treatment (oxidation of the substrate) in a high-temperature oxygen atmosphere.

次に具体例を用いて本発明を詳述する。 Next, the present invention will be explained in detail using specific examples.

第1図は本発明に用いる酸素プラズマ処理装置
の一例であり、通常のRIEに用いられるものであ
る。当該装置内にRIEにより表面の露出せしシリ
コン基板1を入れロータリーポンプ4、窒素トラ
ツプ3で真空排気後、反応ガスとしての酸素を導
入して高周波発振法により酸素プラズマを発生せ
しめて本発明になる酸素プラズマ処理をする。
尚、同図で2は制御バルブである。
FIG. 1 shows an example of an oxygen plasma processing apparatus used in the present invention, which is used in ordinary RIE. A silicon substrate 1 with an exposed surface is placed in the device by RIE, and after evacuation is performed using a rotary pump 4 and a nitrogen trap 3, oxygen is introduced as a reaction gas and an oxygen plasma is generated by a high frequency oscillation method. Oxygen plasma treatment is performed.
In addition, in the figure, 2 is a control valve.

第2図はRIE法によりシリコン酸化物をRIEし
たときの炭素堆積を示すオージエ電子分光分析の
一例である。
FIG. 2 is an example of Auger electron spectroscopy showing carbon deposition when silicon oxide is subjected to RIE using the RIE method.

即ち、エツチング直後のシリコン基板表面附近
に存在する炭素の深さ方向分布を示す。
That is, it shows the depth distribution of carbon existing near the surface of the silicon substrate immediately after etching.

図から明らかのごとく、炭素が約20Åの厚さで
シリコン基板表面を覆つて濃度高く存在し(表面
付近で最大でシリコン原子密度の約50%)、また、
バルク・シリコン中に約20Å程度深く(横軸40Å
付近まで)更に浸入している。ここで、炭素濃度
曲線は図中の横軸の40Å付近で略フラツトになつ
ていることから、この付近までRIEにより炭素が
侵入していたことになる。なお、図中、炭素濃度
が零とならないのは、オージエ分析中にチヤンバ
ー内に存在する残留ガス中の炭素を検出したもの
であり、シリコン基板中にRIEにより導入された
炭素ではない。
As is clear from the figure, carbon exists at a high concentration covering the silicon substrate surface with a thickness of about 20 Å (maximum is about 50% of the silicon atomic density near the surface), and
Approximately 20 Å deep in bulk silicon (horizontal axis 40 Å
(to the vicinity) is further infiltrating. Here, since the carbon concentration curve becomes approximately flat near 40 Å on the horizontal axis in the figure, it means that carbon has invaded by RIE up to this vicinity. Note that in the figure, the carbon concentration that is not zero is due to carbon detected in the residual gas present in the chamber during Auger analysis, and is not carbon introduced into the silicon substrate by RIE.

第3図は、第2図の高濃度炭素体積層を持つた
シリコン基板を本発明による酸素プラズマ処理
を、第1図に示す装置を用いて、一例として、5
分間行ない、高濃度炭素体積層のほとんどを除去
した。
FIG. 3 shows that the silicon substrate having the high concentration carbon stack shown in FIG. 2 was subjected to oxygen plasma treatment according to the present invention using the apparatus shown in FIG.
This was carried out for several minutes to remove most of the high-density carbon stack.

すなわち、第2図における横軸の表面から40Å
よりも深くドライエツチングが進行し、炭素の侵
入のない領域までドライエツチングした場合であ
り、その表面にはSiLOMのシリコン酸化物(膜)
が約8Å成長している。これは、新たにドライエ
ツチングされたSi原子が、SiLOM膜を形成するた
めに消費されたことを示している。なお、図中、
バルク・シリコン中の炭素濃度が零となつていな
いのは、第2図と同様に、オージエ分析チヤンバ
中の残留ガス中の炭素を検出していることによる
ものである。これは本発明になる酸素プラズマ処
理効果が顕著にあらわれていることを示す。
That is, 40 Å from the surface of the horizontal axis in Figure 2.
This is a case where the dry etching progresses deeper than that and reaches a region where carbon does not invade, and the surface is covered with a silicon oxide (film) of Si L O M.
has grown to about 8 Å. This indicates that the newly dry etched Si atoms were consumed to form the Si L O M film. In addition, in the figure,
The reason why the carbon concentration in the bulk silicon is not zero is because, as in FIG. 2, carbon is detected in the residual gas in the Auger analysis chamber. This shows that the oxygen plasma treatment effect of the present invention is remarkable.

ここで行われる酸素プラズマ処理には、通常の
エツチング装置で十分実施可能であり、その除去
作用により、シリコン基板表面に生じる堆積炭素
のみだけでなく、表面からシリコン・バルク中へ
分布する高濃度の炭素までをも除去することが、
ポイントとなるからである。
The oxygen plasma treatment carried out here can be sufficiently carried out using ordinary etching equipment, and its removal action not only removes deposited carbon on the silicon substrate surface, but also removes the high concentration of carbon distributed from the surface into the silicon bulk. It is possible to remove even carbon.
This is because it becomes a point.

なお、平行平板型リアクテイブ・イオン・エツ
チング装置(平行平板型RIE)を使用した場合に
は、酸素ガス圧力:0.5〜0.01TORR、印加電
力:100〜800W、時間:3分〜15分間、基板温
度:120℃等の条件でも行うことが可能である。
When using parallel plate type reactive ion etching equipment (parallel plate type RIE), oxygen gas pressure: 0.5 to 0.01 TORR, applied power: 100 to 800 W, time: 3 minutes to 15 minutes, and substrate temperature. : It is possible to perform the test under conditions such as 120℃.

また、バーレル型ドライエツチング装置を使用
した場合には、酸素ガス圧力:0.5〜0.05TORR、
印加電力:50〜500W、時間:5分〜20分間、基
板温度:120℃等の条件で行うとも可能である。
In addition, when using a barrel type dry etching device, oxygen gas pressure: 0.5 to 0.05 TORR,
It is also possible to conduct the process under conditions such as applied power: 50 to 500 W, time: 5 minutes to 20 minutes, and substrate temperature: 120°C.

即ち、通常のエツチング装置の使用は、上述の
種々の限定条件に特定され得るものではなく、常
に、装置の種別、型式、及び炭素の層厚、又は印
加電力、酸素ガス圧力等々により、適宜調整され
るべきものである。
In other words, the use of a normal etching device is not limited to the various limiting conditions mentioned above, but is always adjusted as appropriate depending on the type, model, carbon layer thickness, applied power, oxygen gas pressure, etc. of the device. It should be done.

換言すれば、本発明の趣旨とする所は、積極的
にオーバーエツチングを行つて、シリコン基板上
部に侵入した高濃度の炭素までをも除去でするこ
とであり、エツチング装置の使用条件等に何等限
定され得るべきものではない。
In other words, the purpose of the present invention is to actively perform over-etching to remove even high-concentration carbon that has entered the upper part of the silicon substrate, without making any changes to the operating conditions of the etching equipment. It should not be limited.

次にRIE後の高温熱酸化雰囲気中における炭素
の挙動について述べる。第4図はRIEをSiO2/Si
系にエツチング完了直後のシリコン基板を一方は
本発明になる酸素プラズマ処理を行つてしかるの
ち900、1000、1100℃の各々の温度において熱酸
化を行つたとき、他の一方は酸素プラズマ処理を
行わないで同様な熱酸化過程を経た各々のシリコ
ン基板についての赤外吸収スペクトルより求めた
炭素の吸収ピーク高さ(Hp)と半値幅
〔FWHM〕の積の酸化温度特性を示す。〔Hp〕×
〔FWHM〕はシリコン中に存在する炭素量に比
例する。
Next, we will discuss the behavior of carbon in a high-temperature thermal oxidation atmosphere after RIE. Figure 4 shows RIE as SiO 2 /Si
One side of the silicon substrate immediately after etching was subjected to the oxygen plasma treatment according to the present invention, and then thermal oxidation was performed at temperatures of 900, 1000, and 1100°C, while the other side was subjected to the oxygen plasma treatment. The oxidation temperature characteristics of the product of carbon absorption peak height (Hp) and half-width [FWHM] obtained from the infrared absorption spectrum of each silicon substrate that underwent a similar thermal oxidation process are shown below. [HP] ×
[FWHM] is proportional to the amount of carbon present in silicon.

同図にみられる如くRIEを行つてシリコン基板
を酸素プラズマ処理を行つたときには図中の温度
範囲においてほぼ炭素の存在は認められない。一
方、酸素プラズマ処理を行わない場合には同様な
温度範囲において炭素は濃度高く存在する。この
ことは前述せし如く、高濃度炭素堆積シリコン基
板を酸素雰囲気中において揮発性物質CXOYの形
成過程を期待しても、一部の炭素は高温熱処理効
果によりシリコンバルク中へ拡散する結果、上記
形成過程は表面層を形成する炭素のみにしか及ば
ず、RIEにより導入された高濃度表面炭素堆積層
の除去方法としては適当とは言い難く、本発明に
よる酸素プラズマ処理が有効な方法であることを
証明している。
As seen in the figure, when a silicon substrate is subjected to oxygen plasma treatment by RIE, the presence of carbon is hardly recognized in the temperature range shown in the figure. On the other hand, when oxygen plasma treatment is not performed, carbon exists at a high concentration in a similar temperature range. As mentioned above, even if we expect the formation process of volatile substances C As a result, the above formation process affects only the carbon forming the surface layer, and it is difficult to say that it is an appropriate method for removing the high concentration surface carbon deposit layer introduced by RIE, and the oxygen plasma treatment according to the present invention is an effective method. proves that.

以上の具体例は酸素プラズマ処理をRIEと同一
装置を用いて行つた場合であるがバーレル型(ト
ンネル型)のプラズマエツチング装置中に酸素を
導入して酸素プラズマ処理としても同様な効果が
期待できる。
The above specific example is a case where oxygen plasma processing is performed using the same equipment as RIE, but the same effect can be expected by introducing oxygen into a barrel-type (tunnel-type) plasma etching equipment and performing oxygen plasma processing. .

また、以上の具体例はSiO2/Si系における効
果であるが同様にしてSi3N4/SiO2/Si系、
Poly・Si/SiO2/Si系等においてシリコン基板
表面がRIEにより露出せしとき効果を発揮する。
In addition, although the above specific example is an effect in the SiO 2 /Si system, the same effect can be applied to the Si 3 N 4 /SiO 2 /Si system,
It is effective when the silicon substrate surface is exposed by RIE in Poly・Si/SiO 2 /Si systems, etc.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は酸素プラズマ発生装置の概略図であ
る。第2図はRIE後のシリコン基板中の炭素の深
さ方向の分布を示す図であり、第3図はRIE後酸
素プラズマ処理を行つたシリコン基板中の炭素の
深さ方向の分布を示す図であり、第4図はRIE後
の酸素プラズマ処理有無によるシリコン基板中の
炭素の熱処理による挙動を示す図である。 尚、図において、1……シリコン基板、2……
制御バルブ、3……窒素トラツプ、4……ロータ
リーポンプである。
FIG. 1 is a schematic diagram of an oxygen plasma generator. Figure 2 is a diagram showing the distribution of carbon in the depth direction in a silicon substrate after RIE, and Figure 3 is a diagram showing the distribution in the depth direction of carbon in a silicon substrate subjected to oxygen plasma treatment after RIE. FIG. 4 is a diagram showing the behavior of carbon in a silicon substrate due to heat treatment with and without oxygen plasma treatment after RIE. In the figure, 1...silicon substrate, 2...
Control valve, 3... nitrogen trap, 4... rotary pump.

Claims (1)

【特許請求の範囲】[Claims] 1 フレオン系ガスを反応ガスとしたリアクテイ
ブ・イオン・エツチング法によりシリコン酸化
膜、窒化膜、多結晶シリコン、等の絶縁被膜をド
ライエツチングしてシリコン基板を露出せしめる
エツチング法において、該ドライエツチング後に
低温酸素プラズマ中に該シリコン基板を浸漬して
リアクテイブ・イオン・エツチングにより誘起さ
れたシリコン基板表面の堆積炭素を除去する工程
と、酸素プラズマにより生成されたシリコン基板
上部のシリコン酸化物を除去する工程とを含むこ
とを特徴とする半導体装置の製法。
1 In an etching method in which an insulating film such as a silicon oxide film, nitride film, polycrystalline silicon, etc. is dry-etched to expose a silicon substrate by a reactive ion etching method using a Freon-based gas as a reactive gas, the etching method is performed at a low temperature after the dry etching. a step of immersing the silicon substrate in oxygen plasma to remove deposited carbon on the surface of the silicon substrate induced by reactive ion etching; and a step of removing silicon oxide on the top of the silicon substrate generated by the oxygen plasma. A method for manufacturing a semiconductor device, comprising:
JP16513079A 1979-12-19 1979-12-19 Manufacture of semiconductor device Granted JPS5687325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16513079A JPS5687325A (en) 1979-12-19 1979-12-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16513079A JPS5687325A (en) 1979-12-19 1979-12-19 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5687325A JPS5687325A (en) 1981-07-15
JPH0135496B2 true JPH0135496B2 (en) 1989-07-25

Family

ID=15806465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16513079A Granted JPS5687325A (en) 1979-12-19 1979-12-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5687325A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127329A (en) * 1982-01-26 1983-07-29 Seiko Epson Corp Etching method for insulating protection film of semiconductor substrate
JPS5911629A (en) * 1982-07-12 1984-01-21 Toshiba Corp Surface cleaning method
JPS6098626A (en) * 1983-11-02 1985-06-01 Oki Electric Ind Co Ltd Surface treating method of semiconductor layer
JPH01281748A (en) * 1988-05-07 1989-11-13 Fujitsu Ltd Manufacture of semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5362474A (en) * 1976-11-17 1978-06-03 Hitachi Ltd Cleaning method of metal photo mask

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5362474A (en) * 1976-11-17 1978-06-03 Hitachi Ltd Cleaning method of metal photo mask

Also Published As

Publication number Publication date
JPS5687325A (en) 1981-07-15

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