JPH0135492Y2 - - Google Patents

Info

Publication number
JPH0135492Y2
JPH0135492Y2 JP1982138395U JP13839582U JPH0135492Y2 JP H0135492 Y2 JPH0135492 Y2 JP H0135492Y2 JP 1982138395 U JP1982138395 U JP 1982138395U JP 13839582 U JP13839582 U JP 13839582U JP H0135492 Y2 JPH0135492 Y2 JP H0135492Y2
Authority
JP
Japan
Prior art keywords
layer
silver
hybrid integrated
external terminal
external terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982138395U
Other languages
Japanese (ja)
Other versions
JPS5944064U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13839582U priority Critical patent/JPS5944064U/en
Publication of JPS5944064U publication Critical patent/JPS5944064U/en
Application granted granted Critical
Publication of JPH0135492Y2 publication Critical patent/JPH0135492Y2/ja
Granted legal-status Critical Current

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  • Coils Or Transformers For Communication (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Description

【考案の詳細な説明】 (技術分野) 本考案は混成集積回路に関し、特に半田適性の
良い外部端子を有する混成集積回路に関する。
[Detailed Description of the Invention] (Technical Field) The present invention relates to a hybrid integrated circuit, and particularly to a hybrid integrated circuit having external terminals with good solderability.

(従来技術) 積層チツプ型コンデンサ、積層チツプ型コイル
等の小型電子部品は知られている。この種の積層
電子部品は側面に薄膜状の外部端子を有してお
り、これらの部品をプリント基板へ直接搭載して
上記の外部端子とプリント基板面の配線との間に
半田を施していわゆる直づけを可能にしている。
しかし、半田時の熱や機械的力により外部端子が
剥れたり、半田親和性その他の問題があるため外
部端子用金属材料の種類は限定される。
(Prior Art) Small electronic components such as multilayer chip capacitors and multilayer chip coils are known. This type of laminated electronic component has a thin film-like external terminal on the side, and these components are directly mounted on a printed circuit board and solder is applied between the external terminal and the wiring on the printed circuit board. Allows for direct attachment.
However, the types of metal materials for external terminals are limited because external terminals may peel off due to heat and mechanical force during soldering, and there are problems with solder affinity and other problems.

銀や銀合金は下地との付着性が良く導電性が良
いのでこの種の外部端子に汎用されているが、半
田浴に浸漬されるとき銀等が半田浴中へ溶解され
るという問題がある。これを防止するために銀等
を下地層としてその表面に錫などの層を形成する
ことが試みられているが、未だ十分に満足なもの
は得られていない。
Silver and silver alloys are commonly used for this type of external terminal because they have good adhesion to the base and good conductivity, but there is a problem that when immersed in the solder bath, silver etc. dissolves into the solder bath. . In order to prevent this, attempts have been made to form a layer of tin or the like on the surface of a base layer of silver or the like, but a fully satisfactory result has not yet been obtained.

(考案の目的) 本考案は半田適性の良い外部端子を有する混成
集積回路を提供することを目的とする。本考案は
導電性が良く、下地への付着性が良く、半田浴中
への溶出の問題がなく、外気による酸化の問題が
なく、また機械的強度の高い(剥離し難い)外部
端子を備えた積層コンデンサネツトワークを提供
することを目的とする。
(Purpose of the invention) An object of the invention is to provide a hybrid integrated circuit having external terminals with good solderability. This device has good conductivity, good adhesion to the base, no problems of elution into the solder bath, no problems of oxidation due to outside air, and has external terminals with high mechanical strength (hard to peel). The purpose of this research is to provide a multilayer capacitor network with high performance.

(考案の概要) 上に述べたように、銀等はすぐれた外部端子で
はあるが半田に溶解し易いので、本考案者は銀及
び銀合金層を電気めつきによりニツケル層で被覆
することを試みた。これにより半田やせの問題は
解消したが、今度はニツケル層の表面が酸化され
易くなり、半田の乗り及び抵抗の点で問題が生じ
た。そこでさらにその外面に錫層を形成したとこ
ろ、この問題が解消することが分つた。しかしな
がら、層数が増したことにより、外部端子自体に
剥離現象が見られた。そこで銀や銀合金層とニツ
ケル層との間にさらに銅層を介在させることによ
りこの問題を解決することができた。また、銀又
は銀合金層は低温焼付法により形成されるが、そ
の他の層は電気めつき法に形成したとき上述した
問題のないすぐれた外部端子が得られた。その上
電気めつき法によると、外部端子の各層が上層に
より完全に蔽われ且つ周辺に過不足ない積層が得
られるので特性が向上する。従つて、本考案の外
部端子の銀又は銀合金層以外の部分は電気めつき
層に限定される。
(Summary of the invention) As mentioned above, although silver is an excellent external terminal, it easily dissolves in solder, so the inventor of the present invention decided to cover the silver and silver alloy layer with a nickel layer by electroplating. I tried. Although this solved the problem of thinning of the solder, the surface of the nickel layer became more susceptible to oxidation, causing problems in terms of solder coverage and resistance. Then, by forming a tin layer on the outer surface, it was found that this problem was solved. However, due to the increased number of layers, a peeling phenomenon was observed in the external terminal itself. Therefore, this problem could be solved by further interposing a copper layer between the silver or silver alloy layer and the nickel layer. Furthermore, although the silver or silver alloy layer was formed by low-temperature baking, when the other layers were formed by electroplating, an excellent external terminal without the above-mentioned problems was obtained. Moreover, according to the electroplating method, each layer of the external terminal is completely covered by the upper layer, and a laminated layer with just the right amount and deficiency can be obtained at the periphery, so that the characteristics are improved. Therefore, the portion of the external terminal of the present invention other than the silver or silver alloy layer is limited to the electroplated layer.

(考案の構成) 以下本考案を図面に関連して詳しく説明する。
第1〜2図は混成集積回路を示す。混成集積回路
は、L,C,R等の受動素子及びトランジスタや
ダイオード等の能動素子を基板の内部や外面に高
密度に組込んだものであり、それ自体公知であ
る。本考案は、混成集積回路の周辺に引出される
引出端のための外部端子に関するものであるか
ら、回路部としては略示に留める。例えば複数の
コンデンサが形成されるように導体金属層15を
内蔵した誘電体16より成るコンデンサ部13
と、複数のコイルが形成されるように導体17を
内蔵した絶縁性磁性層18より成るインダクタ部
19とを含む積層体(例えば焼結体)を基板と
し、その表面にプリント配線20やコンデンサ2
1,22(内部電極との間に容量を形成する)、
抵抗膜R、トランジスタTRなどを搭載する。内
外の機能部品を互に、又は外部回路へ引出すため
の外部端子はすべて混成集積回路の外周部に膜状
に形成されている。これらの外部端子は本考案の
特殊な構成を有している。どの外部端子も同一の
構造を有するから、以下では第3図を参照して外
部端子2についてのみ説明する。
(Structure of the invention) The invention will be described in detail below with reference to the drawings.
1-2 illustrate hybrid integrated circuits. A hybrid integrated circuit is one in which passive elements such as L, C, R, etc. and active elements such as transistors and diodes are assembled in high density inside or on the outside of a substrate, and is known per se. Since the present invention relates to an external terminal for a lead-out end drawn out to the periphery of a hybrid integrated circuit, the circuit portion is only schematically illustrated. For example, a capacitor section 13 made of a dielectric material 16 containing a conductive metal layer 15 so as to form a plurality of capacitors.
The substrate is a laminate (for example, a sintered body) including an inductor portion 19 made of an insulating magnetic layer 18 containing a conductor 17 so as to form a plurality of coils, and printed wiring 20 and a capacitor 2 are arranged on the surface of the laminate (for example, a sintered body).
1, 22 (forms a capacitance with the internal electrode),
Equipped with resistor film R, transistor TR, etc. All external terminals for leading out internal and external functional components to each other or to an external circuit are formed in a membrane shape on the outer periphery of the hybrid integrated circuit. These external terminals have a special configuration of the present invention. Since all the external terminals have the same structure, only the external terminal 2 will be described below with reference to FIG.

混成集積回路の端面23は必要ならばバレル研
磨などの方法で研磨して配線、電極、インダクタ
等の引出端を適正に端面23に露出させ、銀又は
銀合金(Ag−Pdなど)粉末をペースト化した導
電塗料を塗布し焼付けて下地銀又は合金層24
(以下単に銀層と称する)を形成する。銀層の上
には電気めつきにより銅層25を形成する。部分
的に導電層を有する小形部品に電気めつきを行う
方法には種々な方法があるので、任意の方法を用
いて電気めつきを行えば良い。銅層25は銀層2
4と、次に形成されるニツケル層26との間に介
在してこれら両層を強く接着させる。次に、ニツ
ケル層26を同じく電気めつき法により形成す
る。ニツケル層26は銀及び銅層に対する保護被
覆として働き、外部端子の半田やせの問題を抑制
することができる。またニツケル層は銅層及び次
に形成される錫層と良く接着し且つこれらの層に
対して化学的に安定である。最後にニツケル層2
6の表面に電気めつきにより錫層27を形成す
る。錫層はニツケル層26の酸化を防ぐ。錫層2
7は半田浴に対して溶融し易いが、ニツケル層2
6の存在により銀及び銅層の溶融を防止し、また
銅層25の存在により外部端子の剥離抵抗力を向
上させることができる。
If necessary, the end face 23 of the hybrid integrated circuit is polished by a method such as barrel polishing to properly expose the lead-out ends of wiring, electrodes, inductors, etc. on the end face 23, and silver or silver alloy (Ag-Pd, etc.) powder is pasted. The base silver or alloy layer 24 is formed by applying the conductive paint and baking it.
(hereinafter simply referred to as a silver layer). A copper layer 25 is formed on the silver layer by electroplating. There are various methods for electroplating a small component partially having a conductive layer, and any method may be used to electroplate the small component. Copper layer 25 is silver layer 2
4 and the next formed nickel layer 26 to strongly adhere these two layers. Next, a nickel layer 26 is formed by the same electroplating method. The nickel layer 26 acts as a protective coating for the silver and copper layers and can suppress the problem of solder thinning on the external terminals. The nickel layer also adheres well to and is chemically stable with the copper layer and the subsequently formed tin layer. Finally, nickel layer 2
A tin layer 27 is formed on the surface of 6 by electroplating. The tin layer prevents oxidation of the nickel layer 26. tin layer 2
7 is easily melted in the solder bath, but the nickel layer 2
The presence of the copper layer 25 can prevent the silver and copper layers from melting, and the presence of the copper layer 25 can improve the peeling resistance of the external terminal.

以上により、本考案はすぐれた焼結積層インダ
クタを提供することができた。
As described above, the present invention was able to provide an excellent sintered laminated inductor.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例による混成集積回路の
断面図、第2図は同平面図、及び第3図は同拡大
部分断面図である。 1,2,3,…12:外部端子、13:コンデ
ンサ部、19:インダクタ部、23:端面、2
4:銀又は銀合金層、25:銅層、26:メツキ
層、27:錫層。
FIG. 1 is a sectional view of a hybrid integrated circuit according to an embodiment of the present invention, FIG. 2 is a plan view thereof, and FIG. 3 is an enlarged partial sectional view thereof. 1, 2, 3,...12: External terminal, 13: Capacitor section, 19: Inductor section, 23: End surface, 2
4: Silver or silver alloy layer, 25: Copper layer, 26: Plating layer, 27: Tin layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コンデンサ、インダクタ、抵抗等の受動素子
と、トランジスタ、ダイオード等の能動素子と、
これらのための配線パターンとを内蔵および/又
は搭載した混成集積回路坂、および前記回路板の
外周に設けられた複数の外部端子より成り、前記
外部端子は、配線パターンの引き出し端に接続す
る銀または銀合金層と、この層の上に形成された
電気めつき層とよりなり、前記めつき層は、下か
ら順に銅層、ニツケル層、および錫層より成るこ
とを特徴とする、混成集積回路。
Passive elements such as capacitors, inductors, and resistors, and active elements such as transistors and diodes,
It consists of a hybrid integrated circuit board built-in and/or mounted with wiring patterns for these, and a plurality of external terminals provided on the outer periphery of the circuit board. or a hybrid integrated structure comprising a silver alloy layer and an electroplating layer formed on this layer, wherein the plating layer is comprised of a copper layer, a nickel layer, and a tin layer in order from the bottom. circuit.
JP13839582U 1982-09-14 1982-09-14 hybrid integrated circuit Granted JPS5944064U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13839582U JPS5944064U (en) 1982-09-14 1982-09-14 hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13839582U JPS5944064U (en) 1982-09-14 1982-09-14 hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS5944064U JPS5944064U (en) 1984-03-23
JPH0135492Y2 true JPH0135492Y2 (en) 1989-10-30

Family

ID=30310536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13839582U Granted JPS5944064U (en) 1982-09-14 1982-09-14 hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS5944064U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154296A (en) * 1978-05-26 1979-12-05 Fuji Photo Film Co Ltd Electrode light reproduction type light charging half- cell and photochemical cell using the said half-cell
JPS54157296A (en) * 1978-06-02 1979-12-12 Tdk Corp Electrode structure and the manufacturing method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54154296A (en) * 1978-05-26 1979-12-05 Fuji Photo Film Co Ltd Electrode light reproduction type light charging half- cell and photochemical cell using the said half-cell
JPS54157296A (en) * 1978-06-02 1979-12-12 Tdk Corp Electrode structure and the manufacturing method

Also Published As

Publication number Publication date
JPS5944064U (en) 1984-03-23

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