JPH0135488Y2 - - Google Patents
Info
- Publication number
- JPH0135488Y2 JPH0135488Y2 JP1984065101U JP6510184U JPH0135488Y2 JP H0135488 Y2 JPH0135488 Y2 JP H0135488Y2 JP 1984065101 U JP1984065101 U JP 1984065101U JP 6510184 U JP6510184 U JP 6510184U JP H0135488 Y2 JPH0135488 Y2 JP H0135488Y2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor
- layers
- side surfaces
- active layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 25
- 230000010355 oscillation Effects 0.000 claims description 8
- 230000003287 optical effect Effects 0.000 claims description 2
- 238000005253 cladding Methods 0.000 description 15
- 239000000758 substrate Substances 0.000 description 9
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 229910017974 NH40H Inorganic materials 0.000 description 2
- 238000003776 cleavage reaction Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000007017 scission Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
Description
【考案の詳細な説明】 (イ) 産業上の利用分野 本考案は半導体レーザに関する。[Detailed explanation of the idea] (b) Industrial application fields The present invention relates to semiconductor lasers.
(ロ) 従来技術
従来の半導体レーザは例えばn型GaAs(ガリ
ウム砒素)基板上にn型Ga1-XAlXAS(0<X<1)
からなるn型、クラツド層、ノンドープ
Ga1-YAlYAS(0≦Y<X)からなる活性層、P型
Ga1-XAlXASからなるP型クラツド層を順次積層し
たのち、例えば特開昭57−66688号公報に開示さ
れている如く基板裏面にスクライブ線を形成し斯
るスクライブ線に沿つて分離することによりチツ
プ単位に分離される。従つて斯るチツプの共振器
端面を含む4側面は凹凸の少ない平担面となつて
いる。(b) Prior art A conventional semiconductor laser is, for example, an n-type GaAs (gallium arsenide) substrate with an n-type Ga 1-XAlXAS (0<X<1)
N-type, clad layer, non-doped
Active layer consisting of Ga 1-YAlYAS (0≦Y<X), P type
After sequentially stacking P-type clad layers made of Ga 1-XAlXAS , a scribe line is formed on the back surface of the substrate as disclosed in Japanese Patent Laid-Open No. 57-66688, and the layers are separated along the scribe line. Separated into chips. Therefore, the four side faces of such a chip, including the resonator end faces, are flat surfaces with few irregularities.
然るにこのように4側面が平担であるとピンセ
ツトで上記チツプを挾着したとき等に上記ピンセ
ツトに付着していた不純物が上記チツプの側面に
付着すると共にその後斯る不純物が上記各層中に
自然に拡散し各層間の接合を短絡せしめうるとい
う問題を生じる。 However, if the four sides are flat like this, when the chip is clamped with tweezers, the impurities that have adhered to the tweezers will adhere to the side surfaces of the chip, and then these impurities will naturally form in each of the layers. This poses a problem in that it can diffuse into the layers and short-circuit the junctions between the layers.
また、一般的に半導体チツプはP型クラツド層
表面をヒートシンク上にボンデイングするため、
上述したように側面が平担であるとハンダ材の這
上りにより短絡を生じるという問題がある。 In addition, since semiconductor chips generally bond the surface of the P-type cladding layer onto a heat sink,
As mentioned above, if the side surfaces are flat, there is a problem in that short circuits occur due to creeping of the solder material.
(ハ) 考案の目的
本考案は斯る問題点に鑑みてなされたもので、
上記不純物拡散及び/もしくはハンダ材の這上り
により生じる短絡を極力抑止可能な半導体レーザ
を提供せんとするものである。(c) Purpose of the invention This invention was made in view of the above problems.
It is an object of the present invention to provide a semiconductor laser which can suppress short circuits caused by the impurity diffusion and/or solder material creep-up as much as possible.
(ニ) 考案の構成
本考案の構成的特徴は第1の半導体層、該半導
体層を挾装し上記第1の半導体層よりもバンドギ
ヤツプが大でかつ光屈折率が小なる第2、第3の
半導体層を有した発振層を備え、上記発振層の共
振器端面を除く側面には上記各層の積層方向に凹
凸が形成されていることにある。(d) Structure of the invention The structural features of the invention include a first semiconductor layer, a second semiconductor layer sandwiching the semiconductor layer, and a second and third semiconductor layer having a larger bandgap and a smaller optical refractive index than the first semiconductor layer. The present invention includes an oscillation layer having a semiconductor layer, and a side surface of the oscillation layer other than a resonator end face is formed with unevenness in the stacking direction of the respective layers.
(ホ) 実施例
第1図は本考案の実施例を示し、1は一主面が
(100)面のn型GaAs基板、2は該基板の一主面
上に積層された発振層であり、該発振層は第1ク
ラツド層3、活性層4、第2クラツド層5を順次
積層してなる。上記第1クラツド層3はn型
Ga1-XAlXAS(0<X<1)からなり、活性層4はノ
ンドープn型Ga1-YAlYAS(0≦Y<X)からなり、
また上記第2クラツド層5はP型Ga1-XAlXASから
なる。6は上記発振層2上に形成されたキヤツプ
層であり、該キヤツプ層はP型GaAsからなる。
7は上記キヤツプ層6上に形成されたSiO2、
Si3N4等からなる絶縁層であり、該絶縁層の一部
は紙面垂直方向、即ち(110)方向にストライプ
状に除去されている。8は上記絶縁層7上及びキ
ヤツプ層6上に形成された第1電極であり、該電
極はキヤツプ層6とオーミツク接触する。9は第
2電極であり、該電極は基板1裏面に形成され斯
る基板とオーミツク接触する。(E) Embodiment Figure 1 shows an embodiment of the present invention, in which 1 is an n-type GaAs substrate with one principal surface of the (100) plane, and 2 is an oscillation layer laminated on one principal surface of the substrate. , the oscillation layer is formed by sequentially laminating a first cladding layer 3, an active layer 4, and a second cladding layer 5. The first cladding layer 3 is of n-type
It consists of Ga 1-XAlXAS (0<X<1), and the active layer 4 consists of non-doped n-type Ga 1-YAlYAS (0≦Y<X),
Further, the second cladding layer 5 is made of P-type Ga 1-XAlXAS . 6 is a cap layer formed on the oscillation layer 2, and the cap layer is made of P-type GaAs.
7 is SiO 2 formed on the cap layer 6;
This is an insulating layer made of Si 3 N 4 or the like, and a portion of the insulating layer is removed in a stripe pattern in the direction perpendicular to the plane of the paper, that is, in the (110) direction. A first electrode 8 is formed on the insulating layer 7 and the cap layer 6, and is in ohmic contact with the cap layer 6. Reference numeral 9 denotes a second electrode, which is formed on the back surface of the substrate 1 and is in ohmic contact with the substrate.
斯る半導体レーザでは紙面垂直方向と直交する
2面は平担な劈開面として、共振器端面して作用
し、また紙面垂直方向に延在する側面10a,1
0bには上記各層の積層方向に凹凸が形成されて
いる。本実施例において斯る凹凸は側面10a,
10bにおいて活性層4の側面を第1、第2クラ
ツド層3,5の側面よりも内側に入り込ませるこ
とによつて形成されたものである。 In such a semiconductor laser, two planes perpendicular to the direction perpendicular to the plane of the paper act as flat cleavage planes and act as end faces of the resonator, and side surfaces 10a and 1 extending in the direction perpendicular to the plane of the paper act as flat cleavage planes.
0b has unevenness formed in the lamination direction of each layer. In this embodiment, such unevenness is the side surface 10a,
The active layer 10b is formed by making the side surface of the active layer 4 go inside the side surfaces of the first and second cladding layers 3 and 5.
斯る凹凸形成は例えばGaAs及びAl比が小なる
GaAlAsを選択的にエツチングするNH40H:
H202=20:1の混合液を用い40℃、数分間の条
件で行なう。即ち斯るエンチング液において第
2、第3クラツド層3,5よりもAl比が小なる
活性層4及びGaAsからなる基板1、キヤツプ層
6は第1、第2クラツド層3,5よりもエツチン
グ速度が速いため選択的にエツチングされる。そ
の結果図に示す如く、側面10a,10bにおい
て活性層4の側面が第1、第2クラツド層3,5
の側面よりも内側に入り込むこととなる。尚、斯
るエツチング時上記共振器端面は上記エツチング
液に対して非エツチング性のマスクで被われてい
る。 Such unevenness formation is caused by, for example, a decrease in the GaAs and Al ratio.
NH40H selectively etching GaAlAs:
A mixture of H202=20:1 is used at 40°C for several minutes. That is, in such an etching solution, the active layer 4 having a lower Al ratio than the second and third cladding layers 3 and 5, the substrate 1 made of GaAs, and the cap layer 6 are etched more than the first and second cladding layers 3 and 5. It is etched selectively due to its high speed. As a result, as shown in the figure, the side surfaces of the active layer 4 are connected to the first and second cladding layers 3 and 5 at the side surfaces 10a and 10b.
It will go inside from the side. Incidentally, during such etching, the end face of the resonator is covered with a non-etching mask against the etching solution.
本実施例の半導体レーザによれば両側面10
a,10bをピンセツトで挾着してもピンセツト
に付着している不純物はエツチングされた活性層
4には付きにくいため、斯る不純物の自然拡散に
よる接合の短絡は生じない。 According to the semiconductor laser of this embodiment, both sides 10
Even if a and 10b are clamped with tweezers, the impurities adhering to the tweezers are difficult to adhere to the etched active layer 4, so that no junction short circuit occurs due to natural diffusion of such impurities.
また、上記第1電極8側をハンダを用いてヒー
トシンクにボンデイングした際も上記キヤツプ層
8のテーパによりヒートシンクから活性層までの
沿面距離が長くなるのでハンダの這上りによる短
絡事故も減少する。 Further, even when the first electrode 8 side is bonded to a heat sink using solder, the creepage distance from the heat sink to the active layer is increased due to the taper of the cap layer 8, so short circuit accidents due to solder creeping up are reduced.
第2図は本考案の他の実施例を示し、本実施例
の特徴は共振器端面ではない2側面10a,10
b近傍での活性層4厚みを大となしたことであ
る。尚、第2図中第1図と同一箇所には同一番号
を付して説明を省略する。 FIG. 2 shows another embodiment of the present invention, and the feature of this embodiment is that the two side faces 10a, 10 which are not the resonator end faces are
This is because the thickness of the active layer 4 near b is increased. Note that the same parts in FIG. 2 as in FIG. 1 are given the same numbers and their explanations will be omitted.
このような構成にする理由としては通常活性層
4の層厚は0.1μmと非常に小さく従つて第1の実
施例の構成ではハンダ材にて上記チツプをヒート
シンク等に圧着固定する際に盛り上り上記活性層
4の側面の凹部に毛細管現象により進入するとい
う問題があるためであり、本実施例の構成では斯
る毛細管現象による進入を防止できる。 The reason for this configuration is that the layer thickness of the active layer 4 is normally very small at 0.1 μm, and therefore, in the configuration of the first embodiment, when the chip is crimped and fixed to a heat sink etc. with solder material, it bulges. This is because there is a problem that the liquid enters the recesses on the side surface of the active layer 4 due to capillary phenomenon, and the structure of this embodiment can prevent such intrusion due to capillary phenomenon.
尚、本実施例装置は第3図に示す如く、n型
GaAs基板1の一主面上に紙面垂直方向に延在す
る溝を一定間隔で設け、斯る一主面上に第1クラ
ツド層3、活性層4、第2クラツド層5、キヤツ
プ層6を順次積層後上記溝と溝との間にストライ
プ状開孔を有する絶縁層7及び第1、第2電極
8,9を形成する。また上記第1クラツド層3の
表面形状は基板の一主面形状に略一致せしめ、他
の成長層の表面形状は平担としてある。 In addition, as shown in FIG. 3, this embodiment device is an n-type
Grooves extending perpendicular to the plane of the paper are provided at regular intervals on one main surface of the GaAs substrate 1, and a first cladding layer 3, an active layer 4, a second cladding layer 5, and a cap layer 6 are formed on the one main surface. After successive lamination, an insulating layer 7 having striped openings between the grooves and first and second electrodes 8 and 9 are formed. Further, the surface shape of the first cladding layer 3 is made to substantially match the shape of one principal surface of the substrate, and the surface shapes of the other growth layers are flat.
上記電極形成後、上記溝に沿つてチツプ単位に
分割し、第1の実施例と同様に2側面10a,1
0bをNH40H:H202=20:1の混合液でエツ
チングすることにより第2図に示したチツプが得
られる。 After forming the electrodes, the chips are divided into chips along the grooves, and the two side surfaces 10a, 1
The chip shown in FIG. 2 is obtained by etching 0b with a mixture of NH40H:H202=20:1.
(ヘ) 考案の効果
本考案の半導体レーザでは共振器端面を除く側
面において、活性層の側面を第1、第2クラツド
層の側面よりも内側に入り込ませているため不純
物拡散及びハンダ材の這上りにより生じる短絡等
を防ぐことができる。(f) Effects of the invention In the semiconductor laser of the invention, since the side surfaces of the active layer are deeper inside than the side surfaces of the first and second cladding layers on the side surfaces other than the resonator end faces, impurity diffusion and solder material creeping are prevented. Short circuits caused by uplinks can be prevented.
第1図は本考案の一実施例を示す断面図、第2
図及び第3図は本考案の他の実施例を示す断面図
である。
3……第1クラツド層(第2の半導体層)、4
……活性層(第1の半導体層)、5……第2クラ
ツド層(第3の半導体層)。
Fig. 1 is a sectional view showing one embodiment of the present invention;
3 and 3 are cross-sectional views showing other embodiments of the present invention. 3...first cladding layer (second semiconductor layer), 4
. . . active layer (first semiconductor layer), 5 . . . second cladding layer (third semiconductor layer).
Claims (1)
の半導体層よりもバンドギヤツプが大でかつ光屈
折率が小なる第2、第3の半導体層を有する発振
層を備えた半導体レーザにおいて、上記発振層を
備えた半導体レーザにおいて、上記発振層の共振
器端面を除く側面では、上記第1の半導体層の側
面が上記第2、第3の半導体層の側面よりも内側
に入り込んでいることを特徴とする半導体レー
ザ。 a first semiconductor layer sandwiching the semiconductor layer;
In a semiconductor laser including an oscillation layer having second and third semiconductor layers having a larger band gap and a smaller optical refractive index than the semiconductor layer, the semiconductor laser including the oscillation layer has resonance of the oscillation layer. A semiconductor laser characterized in that, on side surfaces other than the end surfaces, the side surface of the first semiconductor layer is deeper than the side surfaces of the second and third semiconductor layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6510184U JPS60176563U (en) | 1984-05-02 | 1984-05-02 | semiconductor laser |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6510184U JPS60176563U (en) | 1984-05-02 | 1984-05-02 | semiconductor laser |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60176563U JPS60176563U (en) | 1985-11-22 |
JPH0135488Y2 true JPH0135488Y2 (en) | 1989-10-30 |
Family
ID=30596787
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6510184U Granted JPS60176563U (en) | 1984-05-02 | 1984-05-02 | semiconductor laser |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60176563U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5724569A (en) * | 1980-07-18 | 1982-02-09 | Mitsubishi Electric Corp | Uhf band gaas fet |
-
1984
- 1984-05-02 JP JP6510184U patent/JPS60176563U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5724569A (en) * | 1980-07-18 | 1982-02-09 | Mitsubishi Electric Corp | Uhf band gaas fet |
Also Published As
Publication number | Publication date |
---|---|
JPS60176563U (en) | 1985-11-22 |
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