JPH0135383B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video buffer circuit used in an optical character reading device.

A video buffer circuit of a conventional optical character reading device (hereinafter abbreviated as OCR) will be explained with reference to FIG. In FIG. 1, reference numeral 1 indicates a self-scanning solid-state line sensor, and this solid-state line sensor 1 is positioned parallel to the reading line of a form. 2 indicates a video buffer memory having a bit capacity of M×N. Further, 3 is an X-direction address counter, which has a function of specifying an address in the X-axis direction (column direction) of the video buffer memory 2. A Y-direction address counter 4 has a function of specifying an address in the Y-axis direction (row direction) of the video buffer memory 2. Then, the digitized signal from the solid-state line sensor 1 is written into the video buffer memory 2 for each read line by address designation by the address counters 3 and 4. Furthermore, in order to increase the processing speed, two sets of such video buffer circuits are provided so that data can be effectively read and written to each video buffer memory on a line-by-line basis. In other words, from the video buffer memory where writing was performed,
Cut out each character pattern and perform recognition processing. Meanwhile, the photoelectric conversion pattern of the next read line is being written into the other video buffer memory.

In an OCR that has two video buffer memories, the general relationship between the number of characters written in the reading line of a form and the reading processing time is the second one.
As shown in the figure. That is, in this graph, the solid line indicates the recognition processing time, and the broken line a indicates the relationship between the recognition time for one character and the number of written characters. Furthermore, the broken line b indicates the scanning time for one reading line, and the broken line c indicates the scanning time for two reading lines. In this way, the scanning time for two read lines is not twice the scanning time for one line. This is because it is necessary to sequentially scan each read line and then perform recognition, so it is necessary to scan the first line without performing recognition processing.

By the way, the specifications for the OCR reading field are B4.
When it is possible to read large-sized documents, the number of bits of the solid-state sensor 1 and the number of bits of the X-direction address counter 3 shown in FIG.
needs to be enlarged accordingly. Therefore, the capacity of the video buffer memory 2 also inevitably increases. For example, in an OCR that has a large video buffer that can store the video information of the read line of a B4 size form,
When storing the read lines of a small-sized form, a considerable amount of black data on the form conveyance path that is not actually necessary for recognition will be stored. Specifically, when the resolution of the solid-state sensor 1 is 10 bits/mm, the number of bits N of the solid-state sensor 1 must be 364 x 10 bits or more for a B4-sized document, whereas for a small A6-sized document Then, the number of bits N of solid sensor 1 is 105×10
A little bit is fine. That is, a B4-sized document requires at least three times the number of bits N in the reading line direction (direction perpendicular to the conveying direction of the document) as compared to an A6-sized document.

However, from the point of view of reading processing speed, in general, for large forms, the reading processing speed is determined by the recognition speed of a single character, and for small forms, the scanning speed (transportation speed of the form) determines the reading processing speed. Determine. Therefore, if a video buffer memory with a large capacity is used to read a small form, the scanning time will be longer than necessary, and the reading processing speed will depend on the size of the form. Despite its small size, it had the drawback of not being very fast.

This invention was made in view of the above-mentioned circumstances, and provides an optical character reading device that can efficiently use video buffer memory according to the size of the form and increase the processing speed of reading small-sized forms. The purpose of the present invention is to provide a video buffer circuit used in the present invention.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a circuit diagram of a video buffer circuit used in OCR according to an example of the present invention. In FIG. 3, a solid sensor 11 has a capacitance of N bits corresponding to the reading line direction of a form (not shown). Reference numeral 12 denotes a video buffer memory, which has a capacity of N bits corresponding to the document reading line direction (X-axis direction) and M bits corresponding to the document conveying direction (Y-axis direction), that is, M×N bits. ing.
Furthermore, this video buffer memory 12 is composed of a plurality of memory chips, and if the number is, for example, 32 in this embodiment, each memory chip has a storage capacity of M×N/32 bits. It turns out. 13 is the X direction address counter,
A memory chip address designation section 13a that designates one of the memory chips constituting the video buffer 12, and an X-direction address designation section 13b that designates the X-direction address within the designated memory chip.
It is composed of. Reference numeral 14 denotes a conversion circuit which has the function of outputting a chip address signal for changing the address arrangement of the memory chip in response to an output signal from the chip address designating section 13a and an output signal from a status register 15, which will be described later.
Reference numeral 16 denotes a Y-direction address counter, which includes a memory chip address designation section 16a that designates one of the memory chips, and a Y-direction address designation section 16b that designates the Y-direction address within the designated memory chip.
It is composed of. Reference numeral 17 denotes a conversion circuit which has a function of outputting a chip address signal for converting the address arrangement of the memory chip based on an output signal from the chip address designating section 16a and an output signal from the status register 15, which will be described later. A decoder 18 has a function of outputting a signal for selecting and designating one of the memory chips 12a constituting the video buffer 12 based on the conversion circuit 14 and the output chip address signal. The status register 15 is controlled by the control unit 19
It has a function of holding area designation information of the video buffer memory 12 output from the video buffer memory 12. The control unit 19 controls the X and Y direction address counter 1.
3, 16 and the status register 15.

Next, the operation of the above embodiment will be explained. Control part 1
9 is an X- and Y-direction address counter 13, so as to maximize the utilization efficiency of the video buffer memory 12 having a capacity of M×N according to the document size.
16 count capacity is determined and the data is sent to the status register 15 as area designation information. The status register 15 holds the area designation information until new data is sent. X and Y direction address counters 13, 16
is operated when writing and reading video information to and from the video buffer memory 12. When writing, it operates in synchronization with the line sensor 11, and when reading, it operates according to a control signal from the control section 19. Conversion circuits 14 and 17 convert chip address signals and status register 1 output from chip address designators 13a and 16a in X and Y direction address counters 13 and 16, respectively.
Based on the area status signal output from 5, a chip address signal is output that determines the address arrangement of memory chips in the video buffer memory 12. This chip address signal is supplied to a decoder 18, which outputs a chip select signal for selecting one memory chip within the video buffer memory 12.

More specifically, the size of the solid-state sensor 11 is set to match the B4 size of the form, and the count value M of the X-direction address counter 13 is set to 0 to 4096.
Then, the X-direction address counter 13 becomes a 12-bit counter. On the other hand, if the maximum value N of the scan count number for one line of the form is 128, the Y-direction address counter 16 is stored in the video buffer memory 12.
The capacity N×M is 128×4096 bits. here,
Assuming that the capacity of one memory chip constituting the video buffer memory 12 is 128×128=16K bits, the video buffer memory 12 is composed of 32 memory chips. If a B4 size form is to be read under these conditions, the address arrangement of the 32 memory chips in the video buffer memory 12 may be arranged as shown in FIG. 4A. In other words, it is sufficient to arrange the 32 memory chips in one row in the X direction on addresses. In this way, video information for one line of a B4 size form will be written into the video buffer memory 12.

In addition, when reading an A6 size form under the above conditions, the X
Set the count value N of the direction address counter 13 to 1024.
If the count value M of the Y-direction address counter 16 is set to 512, the video buffer memory 12 will be used efficiently. That is, in this case, the address arrangement of the 32 memory chips in the video buffer memory 12 is as shown in FIG. All you have to do is make it an array on the address. In this way, the video buffer memory 12 has
Information for multiple lines (for example, 4 lines) in an A6 size form will be written. This conversion of the array on the address of the memory chip is performed under the control of the control section 19, as described above.

In this way, in the case of small-sized forms,
Since a plurality of lines are successively captured into the video buffer 12, the scanning speed is faster when scanning continuous lines than when scanning one line at a time, as shown in FIG. In addition, regarding the relationship between scanning speed and character recognition speed, as the number of characters in one line increases, the processing speed is limited by the recognition speed, but in reality, the recognition speed of one character is not constant and changes depending on the shape of the character. do. Therefore, the number of characters and the recognition time do not have a constant slope as shown in FIG. Furthermore, as the form size becomes smaller, the variation in the slope becomes larger. Here, the effect of the present application becomes noticeable. In other words, in the present application, the video buffer memory 12 is effectively used according to the form size, and in the case of a small form, since multiple lines of video information are taken in, the recognition speed is slow and scanning of the next line is made to wait. Since the frequency of occurrence of lost time is reduced, the effective processing speed is improved.

As described above, the present invention provides a video buffer circuit used in an optical character reading device that can efficiently use the video buffer memory according to the document size and increase the processing speed for reading small-sized documents. can be provided.

[Brief explanation of drawings]

Fig. 1 is a diagram for explaining the operation of a conventional video buffer circuit, Fig. 2 is a graph showing the general relationship between the number of characters written in the reading line of a form and the reading processing time, and Fig. 3 is a graph of the invention. FIGS. 4A and 4B are explanatory diagrams for clarifying the operation of the embodiment, respectively. 11...Line sensor, 12...Video buffer memory, 13...X direction address counter, 1
4...Conversion circuit, 15...Status register,
16... Y-direction address counter, 17... Conversion circuit, 18... Decoder, 19... Control unit.

Claims (1)

[Claims] 1. In a video buffer circuit used in an optical character reading device, a video buffer memory composed of a plurality of memory chips and to which video information is supplied, an X-direction address counter and a Y-direction address counter of this video buffer memory, and a form size a control unit that outputs array conversion control information on the address of the memory chip in accordance with the address of the memory chip; and a control unit that converts the write address information output from both address counters using the control information output from the control unit and outputs the write address to the video buffer. 1. A video buffer circuit comprising address conversion means for supplying information.