JPH01318569A - Speed control circuit - Google Patents

Speed control circuit

Info

Publication number
JPH01318569A
JPH01318569A JP63148891A JP14889188A JPH01318569A JP H01318569 A JPH01318569 A JP H01318569A JP 63148891 A JP63148891 A JP 63148891A JP 14889188 A JP14889188 A JP 14889188A JP H01318569 A JPH01318569 A JP H01318569A
Authority
JP
Japan
Prior art keywords
output
circuit
speed
voltage
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63148891A
Other languages
Japanese (ja)
Other versions
JP2894563B2 (en
Inventor
Yoshikatsu Miyauchi
宮内 義勝
Takio Maekawa
前川 多喜夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP63148891A priority Critical patent/JP2894563B2/en
Publication of JPH01318569A publication Critical patent/JPH01318569A/en
Application granted granted Critical
Publication of JP2894563B2 publication Critical patent/JP2894563B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To secure a torque at low speed by setting characteristics of a speed feedback circuit to broken line-shaped characteristics. CONSTITUTION:A speed signal 1 is converted into a voltage by an F/V converter 2 to obtain a revolution signal Va. An offset circuit 3 outputs a signal when the revolution signal Va reaches a given voltage. An inverting amplifier circuit 4 inverts the output of the offset circuit 3 into Vb on the basis of the revolution signal Va and amplifies Vd to output a voltage Vc. A differential amplifier circuit 5 outputs a deviation signal Vd between the output Vc of inverting amplifier circuit 4 and a speed control voltage Vref determined by a speed regulating variable resistor 6. Further, a comparison PWM circuit 8 compares a reference triangular wave outputted from a reference triangular wave generator circuit 7 with the deviation signal Vd to output PWM pulse to a control circuit 9. In this manner, it is possible to secure a torque at low speed.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明は、電動ロクロ、電動ウィンチ等負荷変動による
速度低下等の速度を制御回路へフィードバックする速度
制御回路に関する。
The present invention relates to a speed control circuit that feeds back the speed of an electric potter's wheel, an electric winch, etc., such as speed reduction due to load fluctuation, to a control circuit.

【従来の技術】[Conventional technology]

従来、速度制御回路には、速度を決定する電圧によって
制御するもの、即ち、フィードバック制御しないものが
あり、又、フィードバック制御するもので、負荷により
速度が低下したとき速度を上げるようにフィードバック
する際、F/Vコンバータの出力電圧は第8図のように
回転数に比例し、フィードバック量は速度全域ですべて
同じであった。
Conventionally, speed control circuits include those that control the speed using a voltage that determines the speed, that is, those that do not perform feedback control, and those that perform feedback control, and when the speed decreases due to the load, feedback is applied to increase the speed. The output voltage of the F/V converter was proportional to the rotational speed as shown in FIG. 8, and the amount of feedback was the same over the entire speed range.

【発明が解決しようとする課題】[Problem to be solved by the invention]

従来の速度制御回路で、フィードバック制御しないもの
では、負荷が加わると速度が低下するという問題、4が
あり、又、フィードバック制御するものでも、フィード
バック量が速度全域で同じであるため、低速域での負荷
に対して回転しなくなり、口7り状態になるという問題
点を有していた。 本発明はかかる点に鑑みてなされたもので、その目的と
するところは、フィードバック量を可変にして低速域で
のトルクを確保することにある。
Conventional speed control circuits that do not have feedback control have the problem that the speed decreases when a load is applied, and even in those that perform feedback control, the amount of feedback is the same over the entire speed range, so it is difficult to operate at low speeds. The problem was that it would not rotate under the load, resulting in a sagging condition. The present invention has been made in view of this point, and its purpose is to make the amount of feedback variable to ensure torque in a low speed range.

【課題を解決するための手段】[Means to solve the problem]

上記目的を達成するために、本発明は、速度信号を電圧
変換するF/Vコンバータと、前記F/Vコンバータの
出力が一定電圧に達するまで出力しないオフセット回路
と、前記F/Vコンバータの出力を基準に前記オフセッ
ト回路の出力を反転する反転増幅回路とを具備し、前記
反転増幅回路の折れ線状の信号をフィードバックしてフ
ィードバック量を変えるようにしたものである。
In order to achieve the above object, the present invention provides an F/V converter that converts a speed signal into a voltage, an offset circuit that does not output until the output of the F/V converter reaches a certain voltage, and an output of the F/V converter. and an inverting amplifier circuit that inverts the output of the offset circuit with reference to , and the linear signal of the inverting amplifier circuit is fed back to change the amount of feedback.

【作用】[Effect]

上記のように構成された速度制御回路は、低中速域での
フィードバック量を大きく確保でき、低速でのトルクを
確保でさて負荷変動に対してロック状態になることがな
くなる。
The speed control circuit configured as described above can secure a large amount of feedback in the low-to-medium speed range, and can secure torque at low speeds without becoming locked against load fluctuations.

【実施例】【Example】

実施例について図面により説明する。第1図において、
速度信号1(周波数)をF/Vコンバータ2で電圧変換
して、第2図のように回転数に対して出力電圧Vaを得
る。オフセット回路3は、回路で決められた一定電圧■
、に達するまで出力しない、そのため、オフセット回路
3の出力は第2図の電圧vbのようになる。反転増幅回
路4は、F/Vコンバータ2の出力とオフセット回路3
の出力とを入力し、F/Vコンバータ2の出力を基準と
してオフセット回路3の出力を反転してvb′とし、そ
れを増幅して第2図の電圧Vcを出力する。差動増幅回
路5は、反転増幅回路4の出力Vcと速度調節可変抵抗
6で定まる速度コントロール電圧V refとを比較し
、V rJ−V ref +(V ref−Vc)の式
に基づいて出力Vdを出す。回転している状態で負荷が
加わると、回転数が低下し、反転増幅回路4の出力Vc
は低下し、差動増幅回路5の出力Vd上昇する。基準三
角波発生回路7は、第3図(a)のように基準三角波V
eを出力し、この基準三角波Veと差動増幅回路5の出
力■dとを比較PWM発生回路8に人力する。Vd>V
eのとき、比較PWM発生回路8の出力Vfは第3図(
b)のようにオン、Vd<Veのとき出力Vfはオフし
、PWMパルスを発生し、スイッチング制御素子を有す
る制御回路9へ入力する。 負荷が加わると、差動増幅回路5の出力Vclが上昇し
、比較PWM発生回路8のオン時間が長くなって、フィ
ードバック機能を果たす。ここで、反転増幅回路4の出
力を折れ線状にしていると、低中速域では急な勾配を持
ち、差動増幅回路5の出力Vdが大きく確保でき、低速
トルクを確保するフィードバック量を大きくできる。 つぎに、差動増幅回路5へ入力される反転増幅回路4の
出力Vcが折れ線状であるため、速度コントロール電圧
V refと回転数との関係は第4図・のような特性が
得られ、低中速域も巾広く確保できる。即ち、速度コン
トロール電圧V refは、第5図のように速度調節可
変抵抗6のスライドストロークと比例関係にあり、反転
増幅回路4の出力Vcと速度コントロール電圧V re
fとを差動増幅されてVref−Vc=Vdとなり、出
力Vdは第6図の破線で示すようになって、速度コント
ロール電圧Vrefと回転数との関係は第4図のように
なる。 更に、反転増幅回路4の出力Vclが第7図の状態より
、オフセット電圧3および反転増幅回路4の回路電圧を
スイッチ10により高く切換えて折れ線状電圧の勾配を
第7図Vc2のように大きくすることによって、差動増
幅回路5によるフィードバック量を大さくすることがで
きる。
Examples will be explained with reference to the drawings. In Figure 1,
A speed signal 1 (frequency) is converted into a voltage by an F/V converter 2 to obtain an output voltage Va with respect to the rotational speed as shown in FIG. Offset circuit 3 is a constant voltage determined by the circuit.
Therefore, the output of the offset circuit 3 becomes the voltage vb shown in FIG. 2. The inverting amplifier circuit 4 connects the output of the F/V converter 2 and the offset circuit 3.
The output of the offset circuit 3 is inverted with respect to the output of the F/V converter 2 to obtain vb', which is amplified to output the voltage Vc shown in FIG. The differential amplifier circuit 5 compares the output Vc of the inverting amplifier circuit 4 with the speed control voltage V ref determined by the speed adjustment variable resistor 6, and outputs it based on the formula V rJ - V ref + (V ref - Vc). Output Vd. If a load is applied while it is rotating, the rotational speed will decrease and the output Vc of the inverting amplifier circuit 4 will decrease.
decreases, and the output Vd of the differential amplifier circuit 5 increases. The reference triangular wave generation circuit 7 generates a reference triangular wave V as shown in FIG. 3(a).
This reference triangular wave Ve and the output d of the differential amplifier circuit 5 are manually inputted to the comparison PWM generation circuit 8. Vd>V
e, the output Vf of the comparison PWM generation circuit 8 is as shown in FIG.
As shown in b), when the output Vf is turned on and Vd<Ve, the output Vf is turned off and a PWM pulse is generated, which is input to the control circuit 9 having a switching control element. When a load is applied, the output Vcl of the differential amplifier circuit 5 rises, and the ON time of the comparison PWM generation circuit 8 becomes longer, thereby performing a feedback function. Here, if the output of the inverting amplifier circuit 4 is made into a polygonal line, it will have a steep slope in the low and medium speed range, and a large output Vd of the differential amplifier circuit 5 can be secured, increasing the amount of feedback to ensure low speed torque. can. Next, since the output Vc of the inverting amplifier circuit 4 input to the differential amplifier circuit 5 is linear, the relationship between the speed control voltage V ref and the rotation speed has the characteristics shown in FIG. 4. A wide range of low and medium speeds can also be secured. That is, the speed control voltage V ref is in a proportional relationship with the slide stroke of the speed adjustment variable resistor 6 as shown in FIG.
f is differentially amplified so that Vref-Vc=Vd, and the output Vd becomes as shown by the broken line in FIG. 6, and the relationship between the speed control voltage Vref and the rotational speed becomes as shown in FIG. 4. Furthermore, when the output Vcl of the inverting amplifier circuit 4 is in the state shown in FIG. 7, the offset voltage 3 and the circuit voltage of the inverting amplifier circuit 4 are switched higher by the switch 10 to increase the gradient of the linear voltage as shown in FIG. 7 Vc2. By doing so, the amount of feedback by the differential amplifier circuit 5 can be increased.

【発明の効果】【Effect of the invention】

本発明は上述したように構成したから、フィードバック
量を可変にできて低中速域でのフィードバック量を大き
くでき、低速でのトルクを確保できるとともに、低中速
域中を巾広くできるという効果を奏するものである。
Since the present invention is configured as described above, the feedback amount can be made variable, the feedback amount can be increased in the low and medium speed range, the torque at low speed can be secured, and the low and medium speed range can be widened. It is something that plays.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック回路図、第2図は
同上の特性図、第3図は同上の動作タイムチャート、第
4図乃至第7図は同上の特性図、第8図は従来例の特性
図である。 1は速度信号、2はF/Vコンバータ、3はオフセット
回路、4は反転増幅回路、9は制御回路である。 代理人 弁理士 石 1)艮 七 1g鳩1ml ごQoA”−wG肌5−日
FIG. 1 is a block circuit diagram of an embodiment of the present invention, FIG. 2 is a characteristic diagram of the same as above, FIG. 3 is an operation time chart of the same as above, FIGS. 4 to 7 are characteristic diagrams of same as above, and FIG. is a characteristic diagram of a conventional example. 1 is a speed signal, 2 is an F/V converter, 3 is an offset circuit, 4 is an inverting amplifier circuit, and 9 is a control circuit. Agent Patent Attorney Ishi 1) Ai Seven 1g Hato 1ml QoA”-wGhada 5-day

Claims (1)

【特許請求の範囲】[Claims] (1)負荷変動による速度低下等の速度信号を制御回路
へフィードバックして制御する如くした速度制御回路に
おいて、速度信号を電圧変換するF/Vコンバータと、
前記F/Vコンバータの出力が一定電圧に達するまで出
力しないオフセット回路と、前記F/Vコンバータの出
力を基準に前記オフセット回路の出力を反転する反転増
幅回路とを具備し、前記反転増幅回路の折れ線状の出力
をフィードバックしてフィードバック量を変える如くし
て成ることを特徴とする速度制御回路。
(1) In a speed control circuit configured to feed back speed signals such as speed reduction due to load fluctuations to the control circuit for control, an F/V converter that converts the speed signal into voltage;
an offset circuit that does not output an output until the output of the F/V converter reaches a certain voltage; and an inverting amplifier circuit that inverts the output of the offset circuit based on the output of the F/V converter, A speed control circuit characterized in that it is configured to feed back a polygonal output and change the amount of feedback.
JP63148891A 1988-06-15 1988-06-15 Speed control circuit Expired - Fee Related JP2894563B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63148891A JP2894563B2 (en) 1988-06-15 1988-06-15 Speed control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63148891A JP2894563B2 (en) 1988-06-15 1988-06-15 Speed control circuit

Publications (2)

Publication Number Publication Date
JPH01318569A true JPH01318569A (en) 1989-12-25
JP2894563B2 JP2894563B2 (en) 1999-05-24

Family

ID=15463008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63148891A Expired - Fee Related JP2894563B2 (en) 1988-06-15 1988-06-15 Speed control circuit

Country Status (1)

Country Link
JP (1) JP2894563B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6160108A (en) * 1984-08-31 1986-03-27 Akai Electric Co Ltd Control circuit for response speed of servo mechanism

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6160108A (en) * 1984-08-31 1986-03-27 Akai Electric Co Ltd Control circuit for response speed of servo mechanism

Also Published As

Publication number Publication date
JP2894563B2 (en) 1999-05-24

Similar Documents

Publication Publication Date Title
US4364109A (en) Control device of inverters
US4415862A (en) Pulse width modulation amplifier
JPH05110456A (en) Output power control circuit
US4296367A (en) Speed control method for AC motors and an apparatus for the control
JPS5915407B2 (en) lamp signal generator
JPH01318569A (en) Speed control circuit
JPS6094513A (en) Sound volume adjusting device
JPS60156285A (en) Rotating speed regulator for dc motor
JP3078858B2 (en) VCA circuit
JPS59194686A (en) Drive device for motor
JPH0534855B2 (en)
US5014020A (en) Amplifier for outputting motor controlling signal in motor controlling circuit
JP2544746B2 (en) Pulse width modulated wave generator
JP3411752B2 (en) Current limiting structure for motor control by DC chopper circuit
JPH05161391A (en) Drive circuit of motor
JP3291741B2 (en) Gain control device
KR0148917B1 (en) Speed compensating circuit of dc motor
JPS593214A (en) Rotary encoder
SU635586A1 (en) Dc drive with subordinate control of parameters
JPH06309046A (en) Current type output circuit
JPH10135802A (en) Pulse width modulation system driver
KR860003235Y1 (en) Voltage interface circuit
JPS62144584A (en) Speed controller for dc motor
JPH03163913A (en) Power source fluctuation detecting circuit
JPH0116114B2 (en)

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees