KR860003235Y1 - Voltage interface circuit - Google Patents

Abstract

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Description

Voltage interface circuit

1 is a specific circuit diagram of the present invention.

2 is a waveform diagram of each part according to FIG. 1.

* Explanation of symbols for main parts of the drawings

1: microcomputer 2: buffer circuit

3: low pass filter 4: OP AMP

5: amplification circuit CO: control signal stage of one-chip microcomputer (1)

VR ₁ : Variable resistor for gain control

The present invention relates to a voltage interface circuit that converts, for example, a 5V _PP pulse width modulated (PWM) signal output from a one-chip microcomputer to a control voltage required by other peripheral devices.

One-chip microcomputers, which are widely used today, are mostly used to supply and supply circuit parts with an applied voltage of 5 Volts to operate and control electronic devices. Therefore, if a peripheral device, such as a memory device or an input / output device under the control of the microcomputer, operates in the voltage range of 5 Volt, the peripheral device operated by the control voltage of the microcomputer has no problem in operating voltage. If it is intended to operate in a voltage range larger than 5 Volt, the peripheral device cannot be normally controlled by the uniform level control voltage transmitted from the microcomputer.

Recently, many models have been introduced to provide compatibility between one-chip microcomputers and their peripheral components. In this case, various one-chip microcomputers that are widely used can be used unless the operating voltages of the components are matched. It will not be possible to achieve the desired results.

Therefore, the present invention is designed to solve the problems caused by the above operating voltage, and because it is not possible to directly supply a constant control signal output from the one-chip microcomputer to the peripheral device to increase the voltage to the required size, thus increasing By adjusting the magnitude of the voltage to be the same as the operating voltage of the target peripheral device, it is designed to eliminate the problems caused between the one-chip microcomputer and the peripheral due to the difference in the operating voltage.

Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.

According to the present invention, a buffer circuit ₂ having transistors Q ₁ and Q ₂ is connected to a control signal terminal CO of the one-chip microcomputer ₁ , and a low pass is output to the output terminal of the buffer circuit 2. The filter 3 is connected, and the output of the low pass filter 3 is connected to the amplifier AMP 4 having an OP AMP 4 and a variable resistor VR _{1 for} gain control.

1 is a circuit diagram of the present invention configured as described above, wherein the one-chip microcomputer 1 that performs the operation and control of the electronic device is a peripheral device connected to the output terminal (Vout) The control voltage is different from that of the microcomputer 1) to supply a pulse width modulated (PWM) signal of 5V _PP , but the voltage level for the peripheral device cannot be achieved. The voltage is controlled by the control voltage of the one chip microcomputer 1 as it is increased to the required voltage level through the buffer circuit 2, the low pass filter 3, and the amplification circuit 5, and supplied to the peripheral device (not shown). You can control peripherals with different levels.

In other words the resistance of the one-chip microcomputer pulse width modulation (PWM) signal of the control voltage of 5V _PP (1) is output from the 2 (a) only (CO) into a signal such as help control signal buffer circuit (2) (R ₂ ), The buffer circuit 2 not only amplifies the pulse width modulated signal of 5V _PP to Vcc appropriately but also buffers the devices in the subsequent stage (where the control signal << Vcc). That is, since the pulse width modulated signal of FIG. 2 (a) passing through the resistor R ₂ is supplied to the base of the transistor Q ₁ , the signal of FIG. 2 (b) shown to the collector side is the transistor Q ₂ . The transistor Q ₂ is turned on / off according to the pulse signal as shown in FIG. do.

Therefore, the pulse amplitude of the second (b) diagram inverted by the transistor Q ₁ of the buffer circuit 2 is changed in the pulse width modulation (PWM) signal of 5V _PP , the second (a) diagram, to be almost equal to Vcc. .

Since the inverted pulse of FIG. 2 (b) is reversed with respect to the original signal (FIG. 2 (a)), the phase of the original signal (FIG. 2 (a)) is restored by being inverted again by the transistor Q ₂ . The second (c) also becomes a signal.

Therefore, the pulse signal (figure 2 (c)) whose amplitude is increased by the buffer circuit 2 is subjected to direct current through a low pass filter 3 composed of a resistor R ₄ and a capacitor C ₁ . The second (d) is also converted into a signal, and the Vcc voltage thus DC is applied to the non-inverting input terminal (+) side of the OP AMP 4 through the resistor R ₅ of the amplifier circuit 5. In this case, since the value of the resistor R ₄ is set much larger than that of the resistor R ₃ , the charging voltage of the capacitor C ₁ is prevented from being discharged to the resistor R ₃ , and the one-chip microcomputer 1 The bias voltage (Vdd) for adjusting the pulse width modulated signal of 5V _PP outputted from the voltage to the lowest voltage of the output voltage is on the non-inverting input terminal (+) side of the OP AMP (4) through the resistor (R ₆ ). do.

On the other hand, the amplifying circuit 5 is for adjusting the range of the output voltage, and first, the output terminal (R ₆ ) according to the ratio of the resistors R ₅ (R ₆ ) provided on the non-inverting input terminal (+) side of the OP AMP 4. Vout) determines the minimum and maximum values of the output voltage output, and the resistor R ₇ and the variable resistor VR ₁ provided on the inverting terminal (-) side of the OP AMP 4 are connected to the OP AMP 4. You will adjust the gain. That is, the output voltage sent to the output terminal Vout is supplied with the control signal of the one-chip microcomputer 1 and the bias voltages Vcc and Vdd and the resistors R ₇ ; VR ₁ , R ₅ ; By adjusting R ₆ , the voltage width and range can be adjusted.

However, the output voltage of the output terminal Vout is implemented based on the following equation.

Amplification gain Ao of OP AMP (4)

ego,

The voltage Vo of the non-inverting terminal is

to be. Where V ₁ represents the second (d) diagram which is the output voltage of the low pass filter 3.

Therefore, the output voltage Vout appearing on the output side of the amplifier circuit 5 is

It becomes

In the above Equation (3), V ₁ becomes the value up to OV-Vcc according to the pulse width of the pulse width modulation (PWM) signal sent from the one-chip microcomputer 1, and Vdd is the lowest level of the output voltage. Can be determined. therefore The final output voltage Vout is determined by the gain of OP AMP 4, and the minimum level and the magnitude of the output voltage can be adjusted by the size of the resistors R ₅ and R ₆ . However, if the required output voltage Vout is set to a rough setting, only the variable resistor VR _{1 can be} easily changed without having to change Vdd or resistors R ₅ , R ₆ , and R ₇ . It is possible to limit the range of the output voltage Vout.

As described above, the present invention compensates the voltage difference between the one-chip microcomputer 1 and the peripheral devices connected to the output voltage terminal Vout having different magnitudes of the control voltage, thereby making the one-chip microcomputer 1 compatible with the peripheral devices. It has the advantage that it can be used.

Claims (1)

A buffer circuit ₂ having transistors Q ₁ and Q ₂ is connected to a control signal stage CO of the microcomputer 1, and a low pass filter 3 is output to an output terminal of the buffer circuit 2. And a low pass filter (3) connected to an amplifier circuit (5) having an OP AMP (4) and a variable resistor (VR ₁ ) for controlling output gain.