JPH01316965A - Package for semiconductor device - Google Patents
Package for semiconductor deviceInfo
- Publication number
- JPH01316965A JPH01316965A JP14951388A JP14951388A JPH01316965A JP H01316965 A JPH01316965 A JP H01316965A JP 14951388 A JP14951388 A JP 14951388A JP 14951388 A JP14951388 A JP 14951388A JP H01316965 A JPH01316965 A JP H01316965A
- Authority
- JP
- Japan
- Prior art keywords
- terminals
- package
- terminal
- semiconductor device
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims 1
- 238000003780 insertion Methods 0.000 abstract description 11
- 230000037431 insertion Effects 0.000 abstract description 11
- 238000000034 method Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
- H05K3/308—Adaptations of leads
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置用パッケージに関し、特に、基板
、ソケット等への誤挿入の防止を図った半導体装置用パ
ッケージに間する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a package for a semiconductor device, and particularly to a package for a semiconductor device that is designed to prevent incorrect insertion into a board, socket, or the like.
従来の技術
従来、この種の半導体装置用パッケージにおいて、ボデ
ィ側部から突出している外部端子は、すべて同じ形状を
有し、しかも点対称に配置されていた。2. Description of the Related Art Conventionally, in this type of semiconductor device package, all external terminals protruding from the side of the body have the same shape and are arranged point-symmetrically.
発明が解決しようとする課題
上述した従来のパッケージは、同一形状の外部端子が点
対称に配置されているために、方向を見分けにくいのに
加えて、１８０゛又は９０°回転させても基板、ソケッ
ト等に挿入できる欠めに、方向を誤って挿入し、内部の
半導体装置あるいは外部回路を損傷させる可能性がある
という欠点がある。Problems to be Solved by the Invention In the conventional package described above, the external terminals of the same shape are arranged point-symmetrically, so it is difficult to distinguish the direction. The recess, which can be inserted into a socket or the like, has the disadvantage that if it is inserted in the wrong direction, it may damage the internal semiconductor device or the external circuit.
本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記欠点
を解消することを可能とした新規な半導体装置用パッケ
ージを提供することにある発明の従来技術に対する相違
点
上述した従来の半導体装置用パッケージに対し、本発明
は、外部端子を形状を含めて考えた時に点対称にならな
いように配置されているという相違点を有する。The present invention has been made in view of the above-mentioned conventional situation,
Therefore, an object of the present invention is to provide a novel package for a semiconductor device that makes it possible to eliminate the above-mentioned drawbacks inherent in the prior art. On the other hand, the present invention has a difference in that the external terminals are arranged so as not to be point symmetrical when considering the shape thereof.
課題を解決するための手段
上記目的を達成する為に、本発明に係る半導体装置用パ
ッケージは、端子の一部に他の端子とは形状の違うもの
を有し、点対称にならないよう配置されて構成されてい
る。具体的には、１本の端子を他の端子に対応する基板
のリード挿入孔、ソケットの端子接続部等に挿入できな
いような形状、例えば、端子幅を太くする端子自体を取
り去り、基板、ソケット等の対応する部分には孔を形成
しない、等の構造である。Means for Solving the Problems In order to achieve the above object, a package for a semiconductor device according to the present invention has some terminals having a different shape from other terminals, and is arranged so as not to be point symmetrical. It is composed of Specifically, the shape of one terminal is such that it cannot be inserted into the lead insertion hole of the board corresponding to another terminal, the terminal connection part of the socket, etc., for example, the terminal itself is removed to increase the width of the terminal, and the board, socket, etc. The structure is such that no holes are formed in the corresponding portions.
実施例
次に本発明をその好ましい各実施例について図面を参照
しながら具体的に説明する。Embodiments Next, preferred embodiments of the present invention will be specifically explained with reference to the drawings.
第１図は本発明による第１の実施例として本発明をＤＩ
Ｐに適用した場合の斜視図である。第１図を参照するに
、参照番号１は樹脂製のボディを示し、該ボディ１の側
部から金属製の端子が１０本（参照番号２〜１１）突出
している場合を示している。FIG. 1 shows a first embodiment of the present invention using DI.
It is a perspective view when applied to P. Referring to FIG. 1, reference number 1 indicates a resin body, and ten metal terminals (reference numbers 2 to 11) protrude from the side of the body 1.
端子（３〜１１）は従来構造のパッケージと同じ形状に
形成されている。端子２は端子３〜１１とは異なり、−
例として長方形の板を曲げた様な形状に形成され、容易
にＩＣの方向が見分けられるようになっている。また、
端子２の幅Ｗ′を端子３〜１１の幅Ｗよりも大きくし、
端子２をリード挿入孔１２にしか挿入できなくし、誤挿
入を防いでいる。The terminals (3 to 11) are formed in the same shape as a conventional package. Terminal 2 is different from terminals 3 to 11, and -
For example, it is formed in the shape of a bent rectangular plate, so that the direction of the IC can be easily distinguished. Also,
The width W' of terminal 2 is made larger than the width W of terminals 3 to 11,
The terminal 2 can only be inserted into the lead insertion hole 12 to prevent incorrect insertion.
第２図は、本発明による第２の実施例として本発明をＤ
ＴＰに適用した場合を示し、樹脂製のボディ１の側部か
ら金属製の端子が９本（参照番号３′〜１１′）突出し
ている場合を示している。FIG. 2 shows the present invention as a second embodiment according to the present invention.
The case is shown in which nine metal terminals (reference numbers 3' to 11') protrude from the side of the resin body 1.
本第２の実施例では、従来構造のパッケージの１番端子
を切り取った様な構造に形成されていて、方向を見分け
るのが容易になり、汎用基板、ソケット等に実装する場
合誤挿入が少なくなる。また、本パッケージの端子構造
に合わせた専用の基板あるいはソケット等を用いると、
本第２図に示すように端子とリード挿入孔を対応させな
いとＩＣを挿入出来ないために、誤挿入を完全に防ぐ事
が出来る。This second embodiment has a structure similar to that of the conventional package with the first terminal cut out, making it easier to distinguish the direction and reducing the possibility of incorrect insertion when mounted on a general-purpose board, socket, etc. Become. In addition, if you use a special board or socket that matches the terminal structure of this package,
As shown in FIG. 2, since the IC cannot be inserted unless the terminals and lead insertion holes are matched, incorrect insertion can be completely prevented.
発明の詳細
な説明した様に、本発明によれば、半導体装置用パッケ
ージの端子の一部を他の端子と違った形状にし、又は一
部の端子を取り去った上で点対称にならないように配置
することにより、方向を見分けることが容易になる効果
が得られる。As described in detail, according to the present invention, some of the terminals of a semiconductor device package are shaped differently from other terminals, or some of the terminals are removed so that they are not point symmetrical. By arranging them, it is possible to obtain the effect that the direction can be easily distinguished.
また、本発明によれば、端子の形状に合わせた基板又は
ソケットを用いた場合に一定の方向にしか挿入すること
ができず、誤挿入を防止できる効果が得られる。Furthermore, according to the present invention, when a board or socket that matches the shape of the terminal is used, the terminal can be inserted only in a certain direction, and erroneous insertion can be prevented.
第１図は、本発明による第１の実施例を示す斜視図、第
２図は本発明による第２の実施例を示す斜視図である。
１０．ボディ、２１．端子、３〜１１．、、端子、１２
．。FIG. 1 is a perspective view showing a first embodiment of the invention, and FIG. 2 is a perspective view showing a second embodiment of the invention. 10. Body, 21. Terminals, 3-11. ,,terminal,12
．． .
Claims (1)
電気的に接続するための金属性外部端子を有する半導体
装置用パッケージにおいて、前記外部端子を形状まで考
慮に入れた上で点対称にならないように配置したことを
特徴とする半導体装置用パッケージ。In a semiconductor device package that has a metallic external terminal for electrical connection to an external circuit on the outside of a resin or ceramic body, the shape of the external terminal should be taken into consideration so that it is not point symmetrical. A semiconductor device package characterized by the following arrangement.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14951388A JPH01316965A (en) | 1988-06-17 | 1988-06-17 | Package for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14951388A JPH01316965A (en) | 1988-06-17 | 1988-06-17 | Package for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01316965A true JPH01316965A (en) | 1989-12-21 |
Family
ID=15476785
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14951388A Pending JPH01316965A (en) | 1988-06-17 | 1988-06-17 | Package for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01316965A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009247113A (en) * | 2008-03-31 | 2009-10-22 | Tamagawa Seiki Co Ltd | Resolver structure |
-
1988
- 1988-06-17 JP JP14951388A patent/JPH01316965A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009247113A (en) * | 2008-03-31 | 2009-10-22 | Tamagawa Seiki Co Ltd | Resolver structure |
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