JPH01314069A - Picture memory device - Google Patents

Abstract

PURPOSE:To minimize the data processing time by switching plural line buffers so as to control data flow. CONSTITUTION:A data inputted from a serial write port 45 is stored serially in a line buffer 47. The line buffer 47 consists of two buffers, and other line buffer is taken over after one line buffer is occupied, and data are stored sequentially similarly and the data in the line buffer to be occupied in this case is stored in a hard disk 48. The series of operations is repeated and the serial write is finished at a point of time of storage by one page. The serial read through a serial port 46 is similar to the serial write except the opposite data transfer direction. Thus, the processing time is minimized.

Description

[Detailed description of the invention] 〔Technical field〕 The present invention relates to an image processing device (printer controller).

The present invention relates to an image memory device in a scanner controller, system, etc. in a broad sense.

[Prior art]

Figures 7 and 8 show conventional examples of page printer controllers. Figure 7 shows a case where a semiconductor memory is used;
The figure shows a case where a hard disk device (hereinafter referred to as HDD) is used. The effects of these components will be briefly explained below.

First, in Fig. 7, l is the host computer, and the printer controller (block inside the broken line in the figure) is I/F2.
connected via. The data transferred from the host computer 1 via this I/F 2 are two types: command/status for controlling the printer controller and image data output to the printer engine. CPU3
interprets and executes commands transferred from host 1,
It transmits the status to the host 1, controls the operation of the printer engine 7, transfers data to the image memory 5, and controls it, and operates from the ROM/RAM 4. ROM/
The RAM 4 is used to store programs, and the RAM is used as a working register.The image memory 5 holds image data for one page or more. The DMA 6 is used to transfer print data from the image memory 5 to the printer engine 7 at high speed.

Here, the printer engine 7 is considered to be a color thermal or color laser engine that cannot operate intermittently. Briefly explaining the flow of image data in this case, image data transferred from the host 1 via the I/F 2 is stored in the image memory 5. Data for one page is stored in the image memory 5, and when a print command is output from the host 1, the image data is sent to the printer engine 7 through the DMA 6.
and printout is obtained.

Incidentally, in order to reduce the cost of image memories that have increased in capacity due to high resolution and halftone processing, it is being considered to use magnetic disk devices (hard disks) as an alternative to semiconductor memories.

Figure 8 is an example of this, where host 21.1/F22, CP
U23. ROM/RAM24. printer engine 2
The basic operation of 7 is the same, and the image memory 5 and DMA
6, a hard disk controller I/F (hereinafter referred to as HDCI/F) 25 and an HDD 26 are provided. To explain the flow of image data, host 2
The data transferred from 1 through I/F 22 is transferred to CPU 2.
3, the RAM 24 is first blocked.

After that, this data is sent to the HDC via HDCI/F25.
26. When storage for one page is completed in this way and a print command is output from the host 21, the image data read out from the HDD 26 is stored in the RAM 24.
The data is divided into blocks within the printer engine 27 and transferred to the printer engine 27 to obtain print output.

Figure 9 (al, (b), (C1) shows an image of the data structure of the image memory in the printer controller. The image memory generally has a two-dimensional structure, and the image data consists of this two-dimensional data. It is a scanned image and is transferred from the host.Therefore, as shown in the figure, the source image data in the host shown in ial and (
The data array in the image memory shown in bl is transparent;
Even when writing, random access is not performed, but serial access is performed. Furthermore, since the dot drawing of the printer engine shown in (C) is based on rask scanning, serial access is also required when reading.

Generally, as the number of head movements of an HDD increases, the average data transfer time becomes slower. This means that even though it is a random access file device, the number of head movements is reduced and the average data transfer time is faster with serial access.

Therefore, in the case of an HDD, there is a problem that the data processing time increases compared to a semiconductor memory because the image data passes through the path and because the HDD accesses the block unit instead of the byte unit. However, even if an HDD is used as the image memory, a significant speed reduction can be avoided.

〔the purpose〕

The present invention is based on an apparatus that uses a magnetic disk as an image memory, and an object of the present invention is to perform optimal control to minimize processing time.

〔composition〕

To achieve this goal, the present invention provides a frequency line buffer, a timing controller for controlling switching of this line buffer, and 1. It is equipped with a serial write port for writing data to the in-buffer indicated by F, a serial read port for reading data from the in-buffer mentioned above, and a data selector group for controlling 1AEj of data. It is characterized by

An embodiment of the present invention will be described below based on the drawings. 1st
This figure is a basic configuration diagram of a page printer controller, and FIG. 2 is a diagram showing a specific example thereof. First, in FIG. 1, image data transferred from the host 41 is read into the CI'''U 43 via the l/F 42, and is sequentially input to the serial write boat 45 from the bus. Data is stored in series in the line buffer 7.The line buffer 47 is composed of two buffers and is designed to perform toggle spinning.On the other hand, when the buffer becomes full, The data is stored in the other line buffer sequentially in the same way.The data in the line buffer that has become full at this time is stored in 110048.This series of operations is repeated until 1 The serial read operation ends when one page has been stored.The serial read operation using the serial read port 46 is the same as the serial write operation except that the data transfer direction is reversed. Detailed explanation is omitted.Also,
ROM/RΔM44. The printer engine 49 is the same as the conventional example.

Next, the specific configuration will be explained based on FIG. 2.

51 is a bus from the CPU 43 shown in FIG.
52 is a serial write port, 53 is a serial read port, 54, 55, and 58 are selectors;
．． 67 and output, and the selector 55 outputs the line buffer 5.
Switch signal 70.71 from 6°57 to data 69
It is output to the serial read port 53 as . The selector 58 also connects the signal 68 to the line buffers 56 and 57.
．． 72, a timing controller 61
Are there signals such as SIN start, ready, SO start, set condition, etc.? 9, 80, 81.82 are input, buffer select signal 75 is input to selector 54.55, and buffer control signal 76 is input to line buffer 56.57. On the other hand, selector 5
The output signal 73 from the HDD controller 59 is inputted to the HDD controller 59, and the HDD 60 is controlled by the output signal 74 thereof. 62 is a printer engine which sends a print start signal 83. It operates by inputting a data signal 77 from the serial read port 53 and at the same time sends a synchronization signal 78 to the serial read port 53.

In line with this specific example, based on the flowchart in Figure 3,
Explain the operation. In addition, in FIG. 3, S 1 ,
S2----- indicates a step.

First, the number of l line tods (x) and the number of lines per page (y) are set in the timing controller 61 through the set condition signal line 81 from the CPU (Sl
). Next, assert the SIN start 79 to start the timing controller 61 (32), and if it is ready (YES at S3), the serial write board 5
Data is written to 2 (S4). If no, this judgment step is repeated until it becomes ready. When one line of the line buffer 56 becomes full (YES in S5), the line counter is incremented by 1 (S6).

If S5 is NO, this judgment step is repeated until YES. Next, when the line counter becomes full (S7
(Yes), the line counter is cleared and the line buffer 57 is switched (S8).

If the answer is no in S7, this judgment step is repeated until the answer is yes. When the output for one page is completed (YES in S9), the process ends. If the output has not been completed (No in S9), the process returns to before S3 and the above operation is repeated again.

A ready signal 80 in the figure is an acknowledge signal to the CPU and indicates that preparation for writing to the serial write boat 52 is complete. Line buffer #l.

#2 (56, 57) has an n-line configuration, and it is optimal that the value of n is the same as the number of heads of the HDD 60. This is because the line buffer is switched, and the line buffer that has finished writing moves to read, and at this time, the HDD 6
This is to write data to each disk surface of HDD 6 and complete the seek before the next buffer switch.
This is because head switching of 0 normally completes in a few IO seconds, but the seek time takes several ms to several IQms. Therefore, l-trough seek is executed every time the buffer is switched (see timing chart in Figure 5).
. The line counter is located in the timing controller 61 and indicates whether the n line buffer is full. Although not shown in the flowchart, the line counter is incremented by an overflow of the count value (set by the set condition) of the dot counter also in the timing controller 61. In addition, the synchronization signal 78 is FGA
It consists of three lines: TE, LGATE, and IPCK.

FIGS. 4 and 5 are timing diagrams for the above-mentioned operation.

In addition, in FIG. 4, [1dleJ is standby, rWri-t
el means a write from the serial write port 52. rReadJ means read from the HDD controller 59. Further, in FIG. 5, during the operation of the HDD, W means write and S means seek.

FIG. 6 is a serial read processing flowchart.

To explain this operation, first, the CPU sets the number of lines per page (X) and the number of lines per page (y) in the timing controller 61 through the set condition signal line 81 (311).

Next, the SO start 82 is asserted to start the timing controller 61 (312).

Next, the print start signal 83 is asserted from the CPU to the printer engine 62 (313).

Then, a synchronization signal (one page synchronization signal, line synchronization signal, dot synchronization signal) 78 is output from the printer engine 62. Next, in synchronization with the IPC, the line buffer 56.
Read dot data 77 from serial port 53
(S15). Next, determine whether LGATE has been asserted (316), and if yes, S17
Go to and increment the line counter by 1. If no, S15
Go back to before. In step 318, it is determined whether the line counter is full, and if YES, the process advances to step S19, where the line counter is cleared and the line buffer is switched.

If no, the process returns to before S15. In S20, it is determined whether the output for one page has been completed, and if YES, the process ends, and if NO, the process returns to before 315.

〔effect〕

As described above, according to the present invention, data processing time can be minimized in an image processing apparatus that uses a magnetic disk as an image memory.

[Brief explanation of the drawing]

FIG. 1 is a basic configuration diagram of a page printer controller according to an embodiment of the present invention, FIG. 2 is a block diagram showing a specific example thereof, FIG. 3 is a flowchart of serial write control operation, and FIGS. 4 and 5 is the timing chart of each part, No. 6
The figure is a flowchart of serial read control operation, Figures 7 and 8 are block diagrams showing conventional examples of page printer controllers using semiconductor memory and magnetic disks, and Figure 9 [al, ibl, (cl is page It is a diagram for explaining the image of the data structure of the image memory in the controller. 52... Serial write port, 53... Serial read port, 54.55.58... Data selector, 56.57... ...Line buffer, 59...HD
D controller, 60...HDD. Figure 9(a) (
b) (C) Inno ttsu U self power

Claims (1)

[Claims] An image memory device using a hard disk device controlled by a hard disk controller includes a plurality of line buffers, a timing controller for controlling switching of the line buffers, a serial write port for writing data to the line buffers, and a serial write port for writing data to the line buffers. An image memory device comprising a serial read port for reading data from a buffer and a data selector group for controlling the flow of data.