JPH01305477A - Method for inspecting appearance defect - Google Patents

Abstract

PURPOSE:To also qualify the location and the kind of a defect by executing the comparison of one location so as to be overlapped by changing an opponent in case of detecting a noncoincident part by comparing two locations having the identity of pattern, and deciding the presence of a defective candidate when the noncoincident part is detected at the same location even when the opponent is different. CONSTITUTION:The image of a first small area a1 in a first chip pattern (a) is image-picked up continuously, and is stored as a first storage image D1 by a storage part 15. Next, the image of a first small area b1 in a second chip pattern (b) is image-picked up continuously, and is stored as a second storage image D2, and is inputted to the input terminal 16 on one side of a defect decision part 18 as a first inspection image E2. To the input terminal 17 on the other side of the defect decision part 18, the first storage image D1 of the small area a1 in the first chip pattern (a) is inputted as a reference image signal. At the defect decision part 18, the light-and-shade images of the first inspection image E2 and the first storage image D1 are compared. When difference between them exists, it is decided that comparison exists.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a visual defect inspection technique, in particular a visual defect inspection technique for photomasks, for example, photomasks used in lithography processing in the manufacturing process of semiconductor devices. This invention relates to an effective technique that can be used to inspect appearance defects in patterns.

[Conventional technology]

In the manufacturing process of semiconductor devices, as an external defect inspection method for inspecting defects in reticle patterns, the reticle is illuminated, the light reflected by the reticle pattern is detected by a light receiver, and two chimps on the reticle are detected based on the signal from the light receiver. Some devices are configured to inspect for defects by comparing identical portions of patterns and detecting mismatched portions.

In addition, as another visual defect inspection method, the pattern of the reticle is detected by an optical method, and the same parts of this pattern and the design data for this pattern are compared to detect undefeated parts. Some are configured to inspect for defects.

An example of mask inspection technology that describes mask inspection technology is "INSPEC 1987 Autumn Issue (No. 13)" published by Kogyo Gijutsusha.
J pages 43-48 (Paper: Pattern inspection of wafers using CCD and how to utilize the data), and “Electronic Materials November 1986 special issue” published by Kogyo Research Association Co., Ltd., November 18, 1986, page 221- There is P229.

[Problem to be solved by the invention]

However, in the former case, where defect inspection is performed by comparing the same locations of two chip patterns on the reticle, the presence or absence of a defect can be determined, but the location of the defect, the type of defect [all-chip common defects, There is a problem in that it is not possible to identify random defects (adhesion of foreign matter, etc.), and in the latter case, where defect inspection is performed by comparing the pattern and design data, the location of the defect can be identified. However, there is a problem that the inspection time is very long.

SUMMARY OF THE INVENTION An object of the present invention is to provide an external defect inspection method that can identify the location and type of defects using a two-chip comparison method.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for resolving the ode]

A typical overview of the inventions disclosed in this application is as follows.

That is, in an external defect inspection method that detects a defect by comparing two locations having the same pattern and detecting a mismatched portion, the comparison is performed so that each location is different from the other and overlapped. In addition, even if the parts are different, it is determined that there is a defect candidate when the mismatched part is detected at the same location.

[Effect]

According to the above-mentioned means, by comparing two locations having the same pattern, and determining that there is a defect when a mismatched portion is detected in the same location even if the partners are different, the two-chip comparison method is performed. Even with this visual defect inspection method, the location of defects can be determined.

〔Example〕

1 and 2 are explanatory diagrams for explaining an external defect inspection method which is an embodiment of the present invention, FIG. 3 is a plan view showing a reticle to be inspected, and FIG. 4 is an external view of the reticle. FIG. 2 is a schematic diagram showing a two-chip comparative visual defect inspection device used in the defect inspection method.

In this embodiment, the visual defect inspection method according to the present invention performs visual defect inspection on a reticle as shown in FIG. 3 using a single-lens two-chip comparison method as shown in FIG. The method is configured to be executed using a defect inspection device.

A reticle 1 as an object to be inspected shown in FIG. 3 has six patterns for relatively large chips arranged approximately in the center of an exposure area 2 in an exposure device (not shown). These six chip patterns a
A memory cell section, a peripheral circuit section, etc. (not shown) are formed in -r. The memory cell portion is made up of repeating patterns, but the peripheral circuit portions are different from each other and made up of non-repeating patterns.

When a visual defect inspection is performed on the reticle 1 configured in this way, a plurality of patterns formed on the reticle 1 are printed on the dummy wafer 9 by an exposure device (not shown) as shown in FIG. transcribed. That is, the first
In the figure, a dummy wafer 9 has a first transfer pattern I formed by exposing the pattern of the reticle 1 by reduction projection.
A, second transfer pattern IB and third transfer pattern IC
are formed, and each transfer pattern IA, IB
, each chip pattern is formed on each IC.

Next, using the dummy wafer 9 onto which the pattern of the reticle 1 has been transferred in this manner, a defect inspection is performed on the reticle 1 using the external defect inspection apparatus shown in FIG.

The external defect inspection apparatus 10 shown in FIG. 4 includes a moving table 11 for holding the dummy wafer 9 produced as described above as an object to be inspected. and the θ direction. A light source 23 made of a Xe lamp or the like is installed on the outside of the moving table 11, and this light source 23 illuminates the pattern on the dummy wafer 9 as a spot through the first microink mirror 13 and the objective lens 12. It is configured.

A second macroscopic mirror 13' is disposed on the optical axis of the objective lens 12, and the second mirror 13' is configured to split incident light into two optical paths. Second
An autofocus circuit section 19 is located on the optical axis on the reflection side of the mirror 13'.
This circuit section 19 is connected to a central processing unit 21 and configured to automatically adjust the focus.

Further, a TV camera 14 as a pattern detection device is installed directly above the moving table 11, and the TV camera 14 is configured to be able to image the spot-illuminated pattern of the dummy wafer 9.

The output terminal of the TV camera 14 is connected to one human power @ 16 of the defect determination section 18 , and the other input terminal 17 of the defect determination section 18 is connected to the storage section 15 . The output end of the defect determination section 1 is connected to a central processing unit 21, and a result display section 22 and a table control section 20 are connected to the central processing unit 21, and defects are detected by the operation described below. It is configured as follows.

Next, an embodiment of the visual defect inspection method according to the present invention will be described using the visual defect inspection apparatus having the above configuration.

When the dummy wafer 9 is illuminated by the light source 23 through the first optical mirror 13 and the objective lens 12,
First, as a first step, as shown in FIG. , objective lens 12, and T via the first and second dichroic ink mirrors 13.13'.
Images are continuously captured for each field of view of the V camera 14, and these images are stored in the storage unit I5. This stored image is referred to as a first stored image D+.

Next, the XY child table 1 is moved, and images of the first sub-area I of the second chip pattern b in the first transfer pattern IA are similarly continuously captured by the TV camera 14. This image signal is stored in the storage unit 15 as the second storage image Dt, and the first inspection image E!
The signal is inputted to one input terminal 16 of the defect determination section 18 as a signal.

When this inspection image Ex is input, the defect determination unit 1
The first stored image D1 of the small area a of the first chip pattern a previously stored in the storage section 15 is input to the other input end 17 of the chip 8 as a reference image signal. Then, in the defect determination section 1st, the first inspection image E
t and the first stored image are compared in terms of density. If there is a difference between the two, it is determined that there is a defect.

Thereafter, such an inspection method is continuously performed over the entire area of the first transfer pattern IA in the order shown by the arrow 24 in FIG. 1, and an example of the inspection results is given at the end of this specification. It is recorded as shown in Table 1 published in . This first table is virtually created in the central processing unit 21, and can be outputted by the result display section 22 as needed.

In Table 1, the O mark means that it was determined that there was a defect in the above inspection method, and in this example, if the same small SJI area is determined to be defective multiple times, Recognized as a common defect candidate. That is, for example, in the case of the first small area a in the first chip pattern a, the first stored image and the first inspection image E! It is determined that there is a defect by comparison with the sixth memory image, and
When it is determined that there is a defect by comparing the chip and the seventh inspection image E, L2 is determined as a defect candidate common to all chips, and the location of this candidate is specified by appropriate means such as XY coordinates and stored. .

When the extraction of all chip defect candidates is completed in this way, the second step is to determine defects common to all chips.

For example, as shown in FIG. 2, the first small gl area a in the first chip pattern a of the first transfer pattern IA is
1, when the defect candidate G common to all chips is recognized, the second transfer pattern I is transferred by operating the moving table 11.
The entire inspection system, including the objective lens 12, is moved relative to the candidate corresponding value Wg in the first chip pattern B. At this point, in 'Ig, the above-mentioned comparison test was performed on G and g.
If it is determined that there is a defect, it is determined that the defect is common to all chips.

Furthermore, in order to improve the accuracy of determining defects common to all chips, as shown in FIG.
1, the entire inspection system including the objective lens 12 is moved relative to the candidate corresponding value Wg' in the first chip pattern of the third transfer pattern IC. And this position g
The above-mentioned comparative inspection is performed in step ', and if it is determined that there is a defect, it is finally determined that the defect is common to all chips.

Alternatively, the defect candidate corresponding position g in the first chip pattern of the second transfer pattern IB and the second transfer pattern IB
A method may be adopted in which g'' at the same position in the second chip pattern is compared.

Of course, the defect candidate corresponding position g of the third transfer pattern IC
' and the same position g'' in the second chip pattern may be compared.

According to the embodiment described above, the following effects can be obtained.

(1) The task of comparing two locations with the same pattern was performed in such a way that the other locations were different for each location and overlapped, and even if the other locations were different, mismatched portions were detected for the same location. In some cases, by determining that there is a defect candidate, the location of the defect can be determined even with a two-chip comparison type external defect inspection method, so inspection time and equipment costs can be kept to a minimum, reducing production costs. You can increase your sexuality.

(2) The same reticle pattern is transferred to a dummy wafer in advance, and the first transfer pattern is
), when it is determined that there is a defect candidate, by performing the comparative inspection of (1) above on the defect candidate corresponding location of the second transfer pattern, it is possible to identify a defect common to all chips. By using the chip comparison method 2, defects common to all chips and their positions can be identified, and a significant drop in productivity due to the mixing of defects common to all chips can be avoided.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, the material for transferring the reticle pattern is not limited to a dummy wafer, but may also be a glass, quartz substrate, or the like.

In the above explanation, the invention made by the present inventor was mainly applied to the field of application, which is the field of application, which is the field of application, which is the field of application, which is the visual defect inspection method technology for reticles. It can be applied to all visual defect inspection methods.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

The work of comparing two locations with the same pattern is performed so that the other locations are different for one location so that they overlap, and even if the other locations are different, a defect is detected when a mismatched portion is detected for the same location. By determining that there is a candidate, it is possible to determine the location of the defect even with a two-chip comparison type visual defect inspection method, so inspection time and equipment costs can be kept to a minimum, increasing productivity. be able to.

[Brief explanation of the drawing]

FIGS. 1 and 2 are explanatory diagrams for explaining an external defect inspection method that is an embodiment of the present invention, FIG. 3 is a plan view showing a reticle to be inspected, and FIG. 4 is its external appearance. 1 is a schematic diagram showing a two-chip comparative visual defect inspection device used in the defect inspection method. 1... Reticle (photomask), 2... Exposure area, 3... Chip pattern, 9... Dummy wafer, I
A. IB, IC...Transfer pattern, a-f...Chip pattern, a, ~[,,...Small area, 10...1-eye, 2-chip comparative visual defect inspection device, 11...XY Sub-table 12...Objective lens, 13.13'...Gicroic mirror, 14...TV camera, 15...
Storage unit, 16... Inspection image signal input terminal, 17...
Reference image signal input terminal, 18...defect determination section, 19.
...Auto focus circuit section, 20...Table control section, 21
...Central processing unit, 22...Result display section, 23
...Light source, 24...Inspection order. Agent Patent Attorney Tatsuya Kajihara Table 1) Koo IC Kai Naka Figure 4

Claims (1)

[Claims] 1. A visual defect inspection method for detecting defects by comparing two locations having the same pattern and detecting a mismatched portion, wherein the comparison is performed by comparing one location with the other. 1. A visual defect inspection method characterized in that the inspection method is executed in different and overlapping manners, and that it is determined that a defect candidate exists when the mismatched portion is detected in the same location even if the inspection targets are different. 2. Transfer multiple copies of the same pattern to be inspected onto the board,
Claim 1, characterized in that when it is determined that there is a defect candidate in the first transfer pattern, a comparative inspection is performed on a location corresponding to the defect candidate in the second transfer pattern.
Appearance defect inspection method described in section. 3. A patent claim characterized in that the comparison between two locations having the same pattern is performed by comparing a memory image captured and stored in the past with a currently captured inspection image. Appearance defect inspection method according to scope 1.