JPH01297755A - Peripheral device selecting system - Google Patents
Peripheral device selecting systemInfo
- Publication number
- JPH01297755A JPH01297755A JP12976488A JP12976488A JPH01297755A JP H01297755 A JPH01297755 A JP H01297755A JP 12976488 A JP12976488 A JP 12976488A JP 12976488 A JP12976488 A JP 12976488A JP H01297755 A JPH01297755 A JP H01297755A
- Authority
- JP
- Japan
- Prior art keywords
- address information
- peripheral
- peripheral device
- processing unit
- central processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002093 peripheral effect Effects 0.000 title claims abstract description 40
- 238000001514 detection method Methods 0.000 claims abstract description 22
- 238000010187 selection method Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、情報処理装置に於ける中央処理装置が接続し
た複数９周辺装置を選択する周辺装置の選択方式に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a peripheral device selection method for selecting a plurality of nine peripheral devices connected to a central processing unit in an information processing device.
従来、この種の周辺装置の選択方式は中央処理装置から
構成される装置選択アドレス情報と中央処理装置に接続
された複数の周辺装置に個別に設定された装置番号の一
致検出により装置選択を判別するようになっていた。Conventionally, this type of peripheral device selection method determines device selection by detecting a match between device selection address information composed of the central processing unit and device numbers individually set for multiple peripheral devices connected to the central processing unit. I was supposed to.
上述した俤来の装置選択方式は、中央処理装置に接続さ
れた複数の周辺装置に対して予め装置番号を個別に設定
することとなっているので、設定のための労力を必要と
することと誤設定の危険があるという欠点がある。In the conventional device selection method described above, device numbers are individually set in advance for multiple peripheral devices connected to the central processing unit, so it does not require much effort for setting. The disadvantage is that there is a risk of incorrect settings.
本発明は、中央処理装置が複数の周辺装置のいずれかを
選択する周辺装置の選択方式において、前記周辺装置の
それぞれに一致検出回路とアドレス減算器を設け、複数
の前記周辺装置を直夕′りに接続して先頭の前記周辺装
置に前記中央処理装置が装置選択アドレス情報を送出し
、前記中央処理装置丈たは前の前記周辺装置の選択アド
レス減算器が出力した前記装置選択アドレス情報を前記
一致検出回路に入力するとともに前記アドレス減算器で
減算して次の前記周辺装置に送出し、すべての前記一致
検出回路に設定する装置番号を同一とし、前記一致検出
回路か入力する前記装置選択アドレス情報と前記装置番
号か一致する前記周辺装置を選択することを特徴とする
。The present invention provides a peripheral device selection method in which a central processing unit selects one of a plurality of peripheral devices, in which each of the peripheral devices is provided with a coincidence detection circuit and an address subtractor, and the plurality of peripheral devices are directly controlled. The central processing unit sends device selection address information to the leading peripheral device by connecting to the first peripheral device, and the device selection address information output by the central processing unit length or the selection address subtracter of the previous peripheral device is The device selection is input to the coincidence detection circuit, subtracted by the address subtracter, and sent to the next peripheral device, and the device number set in all the coincidence detection circuits is the same, and the device selection is inputted to the coincidence detection circuit. The present invention is characterized in that the peripheral device whose address information and the device number match is selected.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
中央処理装置１・１と周辺装置２・１〜２・ｎがあり、
周辺装置２・１〜２・ｎは一致検出回路３・１〜３・ｎ
及びアドレス減算器４・１〜４・ｎをもち、信号線５・
１〜５・ｎにより順次直列に接続されている。一致検出
回路３・１〜３・ｎは装置選択アドレス情報と装置番号
の一致検出を行い、アドレス減算器４１〜４・ｎは装置
選択アドレス情報を減算して出力する。There is a central processing unit 1.1 and peripheral devices 2.1 to 2.n,
Peripheral devices 2.1 to 2.n are coincidence detection circuits 3.1 to 3.n
and address subtractors 4.1 to 4.n, and signal lines 5.
1 to 5·n are sequentially connected in series. Match detection circuits 3.1 to 3.n detect a match between the device selection address information and the device number, and address subtractors 41 to 4.n subtract the device selection address information and output the result.
中央処理装置１・１から構成される装置選択アドレス情
報”Ｎ”′は信号線５・１により周辺装置２１の一致検
出回路３・１とアドレス減算器４・１に入力され、アド
レス減算器４・１で減算された装置選択アドレス情報“
’ Ｎ−１”は信号線５・２により周辺装置２・２の一
致検出回路３・２とアドレス減算器４２に入力される。The device selection address information "N"' constituted by the central processing unit 1.1 is input to the coincidence detection circuit 3.1 and address subtractor 4.1 of the peripheral device 21 via the signal line 5.1, and the address subtractor 4・Device selection address information subtracted by 1 “
'N-1' is inputted to the coincidence detection circuit 3.2 of the peripheral device 2.2 and the address subtractor 42 via the signal line 5.2.
以後同様にして、装置選択アドレス情報が順次減算され
て伝達し、Ｎ番目の装置選択アドレス情報“］°゛は信
号梓５・ｎにより周辺装置２・ｎの一致検出回路３・ｎ
とアドレス減算器４・ｎに入力される。Thereafter, in the same manner, the device selection address information is sequentially subtracted and transmitted, and the Nth device selection address information "]°" is detected by the coincidence detection circuit 3.n of the peripheral device 2.n by the signal 5.n.
is input to the address subtractor 4.n.
ここで一致検出回路３・１〜３・ｎが選択を判別するた
めに一致検出を行う同一に設定された装置番号を１とす
ると、中央処理装置１１が出力する装置選択アドレス情
報が°′１″の場合は一致検出回路３・１に装置選択ア
ドレス情報” １ ”が入力されて周辺装置２・１か選
択され、装置選択アドレス情報が“２”の場合は一致検
出回路３・２に装置選択アドレス情報” １ ”’が入
力されて周辺装置２・２が選択される。以後同様にして
、装しス減□算器群により一致検出回路３′・ｎに装置
選択アト１／″夏情報” １ ” ’が入万されて周辺
装置長・ｎが選択される。Here, if the identically set device number on which the coincidence detection circuits 3.1 to 3.n perform coincidence detection to determine selection is 1, then the device selection address information output by the central processing unit 11 is °'1. '', the device selection address information ``1'' is input to the match detection circuit 3.1 and the peripheral device 2.1 is selected, and if the device selection address information is ``2'', the device selection address information ``1'' is input to the match detection circuit 3.2. The selection address information "1" is input and the peripheral devices 2 and 2 are selected. Thereafter, the device selection address 1/" is sent to the match detection circuits 3' and n by the device subtracter group in the same manner. The information "1" is entered and the peripheral device length n is selected.
以上説明したように本発明は、中央処理装置から構成さ
れる装置選択アドレス情報を接続”された複数の周辺装
置にて順次減算毛ソ伝達することにより、予め装置番号
を個別に設定することなく周辺装置を選択することがで
きる゛効果がある□。As explained above, the present invention eliminates the need to individually set device numbers in advance by sequentially transmitting device selection address information constituted by a central processing unit to a plurality of connected peripheral devices. There is an effect of being able to select peripheral devices□.
屯 第１図は本発明の一実施例のフロリフ図である。tun FIG. 1 is a flow diagram of one embodiment of the present invention.
１・１・・・中央処理装置、２・１〜２・ｎ・・・周辺
装置、３・１〜３・ｎ・・・一致検出回路、４・１〜４
・ｎ・・アドレス減算器、５・１〜５・ｎ・・・信号線
、Ｎ〜］・・・装置選択アドレス情報。1.1... Central processing unit, 2.1-2.n... Peripheral device, 3.1-3.n... Coincidence detection circuit, 4.1-4
・n...Address subtractor, 5.1 to 5.n...Signal line, N~]...Device selection address information.
Claims (1)
辺装置の選択方式において、前記周辺装置のそれぞれに
一致検出回路とアドレス減算器を設け、複数の前記周辺
装置を直列に接続して先頭の前記周辺装置に前記中央処
理装置が装置選択アドレス情報を送出し、前記中央処理
装置または前の前記周辺装置の選択アドレス減算器が出
力した前記装置選択アドレス情報を前記一致検出回路に
入力するとともに前記アドレス減算器で減算して次の前
記周辺装置に送出し、すべての前記一致検出回路に設定
する装置番号を同一とし、前記一致検出回路が入力する
前記装置選択アドレス情報と前記装置番号が一致する前
記周辺装置を選択することを特徴とする周辺装置の選択
方式。In a peripheral device selection method in which a central processing unit selects one of a plurality of peripheral devices, each of the peripheral devices is provided with a match detection circuit and an address subtracter, and the plurality of peripheral devices are connected in series to select the first one. The central processing unit sends device selection address information to the peripheral device, inputs the device selection address information output by the selection address subtracter of the central processing unit or the previous peripheral device to the coincidence detection circuit, and The address subtracter subtracts the result and sends it to the next peripheral device, so that the device numbers set in all the coincidence detection circuits are the same, and the device selection address information input by the coincidence detection circuit matches the device number. A peripheral device selection method, characterized in that the peripheral device is selected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12976488A JPH01297755A (en) | 1988-05-26 | 1988-05-26 | Peripheral device selecting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12976488A JPH01297755A (en) | 1988-05-26 | 1988-05-26 | Peripheral device selecting system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01297755A true JPH01297755A (en) | 1989-11-30 |
Family
ID=15017625
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12976488A Pending JPH01297755A (en) | 1988-05-26 | 1988-05-26 | Peripheral device selecting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01297755A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009194731A (en) * | 2008-02-15 | 2009-08-27 | Fujitsu Ltd | Slave device, and system and method for data transmission |
| JP2009294772A (en) * | 2008-06-03 | 2009-12-17 | Fujitsu Ltd | Switch device, storage system, and routing method |
| JP2014134866A (en) * | 2013-01-08 | 2014-07-24 | New Japan Radio Co Ltd | Communication system |
| JP2016149679A (en) * | 2015-02-13 | 2016-08-18 | 新日本無線株式会社 | Communication method and communication system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61275953A (en) * | 1985-05-30 | 1986-12-06 | Casio Comput Co Ltd | Device selecting system |
-
1988
- 1988-05-26 JP JP12976488A patent/JPH01297755A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61275953A (en) * | 1985-05-30 | 1986-12-06 | Casio Comput Co Ltd | Device selecting system |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009194731A (en) * | 2008-02-15 | 2009-08-27 | Fujitsu Ltd | Slave device, and system and method for data transmission |
| JP2009294772A (en) * | 2008-06-03 | 2009-12-17 | Fujitsu Ltd | Switch device, storage system, and routing method |
| JP4712069B2 (en) * | 2008-06-03 | 2011-06-29 | 富士通株式会社 | Switch device, storage system, and routing method |
| US8130779B2 (en) | 2008-06-03 | 2012-03-06 | Fujitsu Limited | Switch device, storage system, and routing method determining output port for a frame based on hop count |
| JP2014134866A (en) * | 2013-01-08 | 2014-07-24 | New Japan Radio Co Ltd | Communication system |
| JP2016149679A (en) * | 2015-02-13 | 2016-08-18 | 新日本無線株式会社 | Communication method and communication system |
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