JPH01296680A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To dispense with an externally fixed resistor which limits an output voltage characteristic by a method wherein a variable resistance element function is provided inside an output transistor of a complementary type MOS integrated circuit and the variable resistance element is trimmed. CONSTITUTION:Inner resistance element sections 8a-8c capable of being trimmed are provided with terminal functions by providing N<+> diffusion regions into a P<->well and the inner resistance elements themselves are made to consists of the island resistors inside the P<->well, and terminals extending from the inner resistance elements 8a-8c are connected with a bulk section of an N channel output transistor 2. And, an N channel MOS transistor 9 is provided to shut off the path of a current which flows from a power source 6 to a GND 7 via ladder resistors 8a-8c passing through the intermediary of a parasitic diode generated between a source and a bulk when the P channel output transistor 2 is turned OFF, and the source section and a drain section of the MOS transistor 9 are connected with the ground 7 and the terminal of the inner resistance element 8c respectively. By these processes, an externally fixed resistor, which limits an output voltage characteristic of an output power, can be dispersed with.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention provides stable brightness by adjusting within the integrated circuit the variations in brightness that occur when a complementary MOS (MOS) transistor circuit is used to drive a light emitting element. The present invention relates to a semiconductor integrated circuit device which is capable of realizing a variable current source and supplying a variable and highly accurate current source to external elements.

[Conventional technology]

FIG. 3 is a circuit configuration diagram of a conventional MOS transistor circuit, a cathode common LED, and an external resistor.

In the figure, (1) is a gate portion into which an input signal for driving a P-channel type output transistor is input, and is connected to a drain portion of a pre-output transistor of an internal logic circuit. (2) is a P-channel type output transistor, the drain portion of which is connected to the N side of a PN junction diode and an external resistor. (3) is a PN junction diode configured between the drain part of the output transistor (2) and the GND part (7), and (4) is the connection between the output transistor (2) and the P side of the light emitting diode (5). The external device connected between them is a resistor, and (5) is a light emitting diode that is turned on by the operation of the P-channel type output transistor (2).

Next, the operation will be explained. SS is connected from the internal logic circuit to the gate part (1) of the P-channel MOS output transistor.
When a voltage of L// is applied, the P-channel output transistor (2) turns on and its drain becomes “H
The potential becomes II. Therefore, GND (
Current flows in the direction of 71. In this way, by using the current flowing from the power supply (6) to GND (7), while the P-channel MOS output transistor (2) is in the ON state, the IC
A light emitting diode (5) attached externally can be turned on.

Conversely, when a voltage of "H" is applied from the internal logic circuit to the gate part (1) of the P-channel output transistor (2), the P-channel output transistor (2) is in the OFF state and the current path is configured. The light-emitting diode (5) that was removed is in an off state because it is not lit.

The above is the basic operation for driving the light emitting diode 5). At this time, the characteristics of the output current (IoM) and output voltage (VoI) of the P-channel output transistor (2) are as shown in the curve of FIG. 4(a).

However, when actually used for driving LEDs, it is necessary to take into account variations in output voltage characteristics due to wafer processing, etc.
An external resistor (
By adding 4), it can be used in the triode region, and the
Variations in LED brightness due to variations in output characteristics of the LEDs are suppressed to a small level.

[Problem to be solved by the invention]

Conventional semiconductor integrated circuit devices have different output voltage Bl characteristics from lot to lot due to variations in copying technology and ion implantation amount during the wafer process. When used for driving purposes, there is a problem in that the brightness of the light emitting elements inevitably varies. Furthermore, in order to suppress such variations in brightness of light emitting elements, the output voltage characteristics can only be used in the triode region. Furthermore, when used in the triode region, an external resistor is always required, which poses a problem for the user in that the mounting area of the board becomes large, leading to high costs.

This invention was developed to solve the above-mentioned problems, and it is possible to adjust the variations in brightness of light-emitting elements caused by variations in process time inside a semiconductor device, and it is also possible to adjust the variations in brightness of light-emitting elements caused by variations in process time. The purpose of the external dimensions for limiting the output voltage characteristics is to obtain a semiconductor integrated circuit device in which a resistor can be omitted, and by applying a back gate bias to the output transistor element, it is possible to easily drive the light emitting element. The object of the present invention is to obtain a semiconductor integrated circuit device that functions as an efficient and highly accurate current source by suppressing the output chamber EE characteristics of the pentode region, which has not been directly used.

[Means to solve the problem]

The semiconductor integrated circuit device according to the present invention adds a variable resistance element function to the inside of the output transistor element of the complementary MOS integrated circuit, and eliminates the external resistance that has been considered indispensable when used in the triode region. In addition to making it possible to omit it, variations in the brightness of the light emitting elements, which until now were thought to be impossible to adjust inside the integrated circuit, can now be adjusted by trimming the variable resistance element added to the internal output transistor element. This makes it possible to supply a stable current source to the element. Further, by applying a bank gate bias to the output transistor element itself, stable and efficient output transistor characteristics for driving a light emitting element can be obtained.

[Effect]

According to the output transistor element configuration in this invention,
Since the manufacturer can trim the variable resistance element, I
Variations in output characteristics for each C can be suppressed to a small level,
A highly accurate current source element can be realized externally. Additionally, this allows the elimination of external resistors that limit the output voltage characteristics of the output transistor.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the circuit configuration diagram of the output section shown in the figure, (1) is a gate section into which an input signal for driving the P-channel output transistor is input, and is connected to the drain section of the output pre-stage transistor of the internal logic circuit. (2) is a P-channel output transistor, the drain portion of which is connected to the N side of the PN junction diode and the light emitting diode element (5). (3) is a P-channel output transistor (2)
A PN junction diode (5) is constructed between the drain of the P-channel output transistor (2) and GND (71), and is turned on in response to the output transistor. It is a light emitting diode.

Further, (8a) to (8C)Fi are internal resistance elements that can be trimmed, which is a feature of the present invention, and are structured so that the resistance component can be trimmed freely. The terminal from this internal resistance element is always connected to the bulk part of the P-channel output transistor (2). (9
) is provided to cut off the current path from the t11 source to GND via the parasitic diode when the P-channel output transistor (2) is turned off (N-channel MOS)
A transistor whose gate portion is connected to the gate portion (1) of a P-channel output transistor (2) via one stage of inverter. αl is P when implementing this circuit configuration
This is a parasitic diode that occurs between the source part and the bulk of the channel output transistor (2).

FIG. 2 is a structural sectional view showing a specific circuit configuration of an embodiment of the present invention. In FIG. 2, an N-substrate is used as the substrate. In the figure, (8a) to (8C) are trimmable internal resistance element parts, which can be said to be a feature of this invention.
-The terminal function is created by injecting N+ diffusion into the well, and the internal resistance element itself is composed of an island resistor in the p"■all. (9) takes the circuit configuration as shown in Figure 1. Especially P-channel output transistor (2)
When the ladder resistor (8a to 8c
) is an N-channel MOS transistor for cutting off the path of through current to GND (71), and the source part is connected to GND (71).
The drain part of N D (7) is connected to the terminal part of the resistor (8C). ◇α[ is a parasitic diode generated between the source part and the bulk of the P-channel output transistor (2). (B) is a field oxide film. The operation and effect of the present invention will be explained below. Using a circuit configuration as shown in FIG. As shown in Figure 5, when the gate bias voltage is increased, the V? of the P-channel output transistor increases. It is possible to increase ilO. Also ■? By varying flo, the output current can be controlled as shown in curve (1) in Figure 4.Using these characteristics,
Considering the drain current in the tube region, the equation for the drain current ID8 is expressed as follows: 0 At this time, υPβ varies somewhat due to variations in photolithography technology and ion implantation amount during the Ueno 1 process for each lot. Variations are a direct cause of fluctuations in output characteristics. Also, Vos is P
Which of the channel and N-channel output transistors is C?
A fixed value determined depending on whether it is in the AM state (V cc or G
ND). As a result, in order to adjust the drain current In to a constant value and obtain stable output characteristics, the in-line υ
For lots with large Pβ, (Vas −V?IIO)
By trimming to set the value of `` to a small value), connect any one terminal of the ladder resistor to the bulk part of the P-channel output transistor, and conversely, if the inline υPβ is small, set the value of (Vos - Vtwo )2. This can be achieved by trimming the ladder resistance so that it is set to a large value and varying the back gate bias voltage.In this way, by trimming the ladder resistance, the variation in the output voltage characteristics can be suppressed, and the voltage can be stabilized against external elements. By realizing a current source, a resistor can be omitted from the outside dimensions.

In addition, when the present invention is implemented as shown in the first cause, FIG. 2, a parasitic diode is created in the source and bulk parts of the P-channel output transistor due to the device structure, and this occurs even when the P-channel output transistor is in the OFF state. The parasitic diode creates a path for current to flow from the power supply to GND via the Shiradder resistor. This is blocked by an N-channel transistor configured between the end of the ladder resistor and GND,
The P-channel output transistor suppresses power consumption inside the IC when it is off.

Note that in the above embodiment, only the cathode common LED drive using the P-channel output transistor was explained.
This may be an anode common LEE drive using an N-channel output transistor, and the basic concept may be the same as that for a P-channel output transistor if the structure of the output section is changed to an N-channel output transistor. Also, LED
The present invention can be applied not only to driving but also to any semiconductor integrated circuit device in which stable output characteristics are desired.

In addition, in the case of the above embodiment, the output characteristics were suppressed by trimming the resistor element composed of islands for applying back gate bias, and the external resistor could be omitted. It can also be implemented with a resistor element.0 Also, by adding a resistor element between the bulk part of the P-channel output transistor and one end of the ladder resistor, the output O
It is also possible to suppress the power consumption inside the IC during N-time.

〔Effect of the invention〕

As described above, according to the present invention, by configuring a trimmable resistance element component in the bulk part of the P-channel output transistor and heating it at °C, it is possible to omit one external resistor for each output transistor. This has the effect of significantly reducing board mounting area and cost.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram showing a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a cross-sectional structural diagram showing a semiconductor integrated circuit device according to an embodiment of the invention, and FIG. 3 is a conventional LED drive FIG. 3 is a circuit configuration diagram of a semiconductor integrated circuit device for use in the semiconductor integrated circuit device. In addition, Fig. 4 is a graph showing the difference between the output characteristic 0) according to the present invention and the conventional output characteristic (a), and Fig. 5 shows the VV when changing the back gate bias applied to the bulk part of the output transistor. ? ! It is a graph showing changes in 10. In the figure, (1) is the gate part of a P-channel output transistor, (2) is a P-channel MOS) transistor structure output transistor, (3) is a PN junction diode, (
5) is a light emitting diode, (8a) to (8C) are trimmable resistive elements configured as islands, and (9) is an N-channel MOS transistor. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] In a semiconductor integrated circuit device in which a P-channel MOS transistor and an N-channel MOS transistor are formed in a single semiconductor substrate and these transistors are connected in series to form a complementary MOS integrated circuit, this semiconductor integrated circuit device emits light. When used as a diode driver, connect the bulk part of the output P-channel transistor in the common cathode type, or the bulk part of the output N-channel transistor in the common anode type, in series between the highest potential in the circuit and the lowest potential in the circuit. Connect one end of the ladder resistor to the highest potential in the circuit, the other end to the drain of the N-channel MOS transistor, and connect the source of the N-channel MOS transistor to the lowest potential in the circuit. A semiconductor integrated circuit device characterized in that a potential in a direction opposite to that of the gate portion of the output P-channel transistor is applied to the gate portion of the N-channel MOS transistor.