JPH01296458A - Video signal processing unit - Google Patents

Abstract

PURPOSE:To reproduce a clear luminance signal by generating a pseudo-signal from the output of a circuit, which decides the level of a clip part in the luminance signal, adding the pseudo-signal to a luminance reproducing signal, correcting the signal of the clip part and passing this signal through a de- emphasis circuit. CONSTITUTION:When the luminance reproducing signal is inputted to a level deciding circuit 6 and a delay circuit 7 and a part, for which white peak clip is executed, is inputted, a deciding output signal S is outputted. The signal S is inputted to a linear phase-shaped filter circuit 8 of a pseudo-signal generating circuit, which equips plural 1 clock delay circuits 8a, plural coefficient devices 8b and an adder 10, and a step-shaped output signal is generated only in the time of the clip. This signal is delayed only by the number of the circuits 8a and goes to be a level signal which is determined by coefficient values K1-Kn of the coefficient devices 8b. The luminance reproducing signal through the delay circuit 7 and the signal to be made in the filter circuit are synthesized and the clear luminance signal can be reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention can be applied to a reproduction signal processing circuit of a video signal processing device.

[Prior Art] The electrical block diagram of the recording system of a conventional video tape recorder is constructed as shown in FIG.

Let me explain this.

The incoming video signal VIN is applied to a low pass filter 12 and a band pass filter 18. The low-pass filter 12 converts the applied video signal VIN into a luminance recording signal Y.
and send the separated luminance recording signal Y to the AGC circuit 13.
After converting the signal into a signal having a predetermined level through the emphasizing circuit 14, it is given a standardized emphasis characteristic. After that, in the clip circuit 15,
It is clipped to a certain value by a certain white clip level and a certain dark clip level, and the FM modulation circuit 1
6, the signal is FM modulated and applied to a bypass filter 17, where a band on which the chroma recording signal C can be superimposed is created and applied to a synthesis circuit 22.

On the other hand, the bandpass filter 18 receives the applied video signal V
The chroma recording signal C is separated from IN, the separated chroma recording signal C is given to the ACC circuit 1.9, and after the color burst signal level is made constant, the color signal processing circuit 20
After the signal is changed to a low frequency by , it passes through a low-pass filter 21 to create a band on which the luminance recording signal Y can be superimposed and is applied to a synthesis circuit 22 .

In this way, the luminance recording signal Y and the chroma recording signal C are superimposed in the synthesis circuit 22 to form a recording signal RFC, which is amplified via the recording amplifier circuit 23 and then recorded on the magnetic tape 25 by the recording head 24. Ru.

On the other hand, the electrical block diagram of the reproduction system is constructed as shown in FIG. Let me explain this.

The reproduction signal PB picked up by the reproduction head 27 from the magnetic tape is amplified via the reproduction amplification circuit 28 and then passed through the bypass filter 29 and the low-pass filter 33.
given to.

The brightness reproduction signal separated through the bypass filter 29 is FM demodulated in the FM demodulation circuit 30 and given to the de-emphasis circuit 31, where it is given the inverse characteristic of the emphasis circuit 14, and then passed through the low-pass filter 32 to eliminate unnecessary signals. The band is cut and applied to the synthesis circuit 37. Further, the chroma reproduction signal separated through the low-pass filter 33 is level-adjusted through the ACC circuit 34 and then supplied to the color signal processing circuit 35 . Color signal processing circuit 3
The signal whose frequency has been converted in step 5 is passed through a bandpass filter 36 to have unnecessary components cut off, and is then given to a synthesis circuit 37 .

In this manner, the luminance reproduction signal and the chroma reproduction signal are combined in the synthesis circuit 37 and output as an output video signal VOUT.

[Problems to be Solved by the Invention] Conventionally, in a luminance signal processing system, the de-emphasis circuit 31 has been configured to provide an inverse characteristic to the emphasis circuit 14. To explain this in detail using a diagram, in the recording system, the emphasis circuit 14 inputs the luminance recording signal as shown in Figure 2 and multiplies it with emphasis. A spike occurs on the decline. This brightness recording signal with spikes is clipped by a clip circuit 15 at a certain white peak clip level and a certain dark clip level as shown in FIG.

If a clip is not inserted here, an overmodulation state will occur when recording and reproducing FM modulated data on the magnetic tape 25, resulting in a so-called inversion phenomenon. Further, even if the inversion phenomenon does not occur, the S/N ratio deteriorates in the portion corresponding to the sharp tip of the spike.

Therefore, I decided to clip spikes that exceed a certain level.

During reproduction, this clipped luminance recording signal is input as a luminance reproduction signal to a de-emphasis circuit 31 having characteristics opposite to those of the emphasis circuit 14, and the signal is restored. However, the luminance reproduction signal restored by the de-emphasis circuit 31 is not restored as shown in FIG. 2 before emphasis is applied, but is actually restored in a partially distorted form. This occurs because a white peak clip and a dark clip are applied during recording, and this is reproduced by the de-emphasis circuit 31 having the opposite characteristics to the emphasis circuit 14.

This distortion of the luminance signal makes it impossible to obtain satisfactory signal characteristics, and is one of the causes of deterioration of the reproduced screen.

[Means for Solving the Problems] In order to solve the problems, the present invention provides a level determination circuit that determines the signal level of a clipped portion of a luminance signal, and a pseudo signal generated by the output of this level determination circuit. The present invention is configured to correct the signal of the clipped portion by using a pseudo signal generating circuit that generates a signal, and an adder that adds the output of the pseudo signal generating circuit and the luminance reproduction signal, and passes the signal to a de-emphasis circuit.

[Operation] According to the present invention configured as described above, by correcting the signal of the clipped portion of the brightness reproduction signal and passing it through the de-emphasis circuit, appropriate de-emphasis is applied, and beautiful brightness is obtained. The signal can be reproduced with satisfactory characteristics and a beautiful reproduction screen.

[Example] An example in which the present invention is applied to a white peak clip will be described with reference to FIG.

In the reproduction system electrical block diagram, when the signal processing system is configured with a digital circuit, the input luminance reproduction signal is A.
/D conversion converter valve, converts the analog signal into a digital signal, and FM demodulator 2 configured with a digital circuit.
is input. The brightness reproduction signal demodulated by the FM demodulator 2 corrects the clipped portion in the correction circuit 3 and is input to the de-emphasis circuit 4, where it is converted from a digital signal to an analog signal via the D/A converter 5. is output.

Next, the correction circuit 3 will be explained according to FIG.

In FIG. 1, the FM demodulated luminance reproduction signal is input to a level determination circuit 6 and a delay circuit 7. The level determination circuit 6 outputs a determination output signal S when the white peak clipped portion of the input signal is input. The output judgment output signal S is
A clock delay circuit 8a, a plurality of coefficient units 8b, and an adder 10
It is input to a linear phase type filter circuit 8 (or an IIR filter is also possible) which is a pseudo signal generation circuit equipped with
A step-like output signal shown in FIG. 8(d) is generated only during the clipped period. This output signal is delayed by the number of one-clock delay circuits 8a, and becomes a signal at a level determined by the coefficient values Kl, 2, 3, . . ., Kn of the coefficient multiplier 8b. By combining the luminance reproduction signal delayed through the delay circuit 7 delayed by the delay time of the filter circuit 8 and the signal generated by the filter circuit using the adder 1-1 and outputting the result,
By pseudo-adding the clipped signal component portion in the recording system electrical block, a circuit configuration that can perform clip time adaptive correction by detecting the signal of the clipped portion can be realized.

Here, the output waveforms from each circuit in FIG. 1 will be explained according to FIG. 8.

A part of the luminance reproduction signal input to the level determination circuit 6 and the delay circuit 7 is clipped by a clip circuit as shown in FIG. 8(a). An enlarged view of (a) is shown in (b). Output S from level judgment circuit 6 (c)
Shown below. Outputs a signal of 1 only to the clipped part.

The output of the filter circuit 8 is a plurality of outputs (n
) is delayed by n clocks by the clock delay circuit 8a, and the coefficient value Kl of the coefficient multiplier 8b is delayed by n clocks.

K, , 3...The signal has a level determined by Kn.

The output of the delay circuit 7 is a luminance reproduction signal delayed by the delay time of the filter circuit 8 as shown in (e).

The output from the adder circuit 1 is (d) as shown in (f).
This is the sum of the waveform of (e) and the waveform of (e).

Next, the level determination circuit 6 will be explained. This level determination circuit 6 is composed of a gate circuit, and is set at a certain clip level (the clip level applied during recording). If this circuit receives a signal that is less than the clip level, it emits a "Low" signal,
If a signal at clip level or above is input
Outputs a signal of "Hj".

The video signal processing device applied to white peak clips has been described above, and next, the case where it is applied to white peak clips and dark clips will be described with reference to FIG. 9.

In FIG. 9, the FM demodulated luminance reproduction signal is input to a white peak clip level determination circuit 96W, a dark clip level determination circuit 96D, and a delay circuit 97, respectively. The characteristics of this white peak clip level determination circuit 96W are the same as those of the level determination circuit 6 described above, but for convenience of explanation, different symbols are used, and this white peak clip level determination circuit 96W The judgment output signal from is assumed to be SW, which is equivalent to the judgment output signal S as a signal. Further, the characteristic of the dark clip level determination circuit 96D is that it outputs a determination output signal SD when a dark clipped portion of the input signal is reached.

These determination output signals Sw and SD are input to a white peak clip pseudo signal generation circuit 98W and a dark clip pseudo signal generation circuit 98D, respectively. The characteristics of this pseudo signal generation circuit 98W for white peak clipping are the same as those of the pseudo signal generation circuit 8 described above, and include a plurality (n) of 1-clock delay circuits, the same number of coefficient units, and one adder. It consists of As a result, when the determination output signal SW is input, a signal as shown in FIG. 8(d) is generated. The characteristics of the dark clip pseudo signal generation circuit 98D include the same number (n) of 1-clock delay circuits as the white peak clip pseudo signal generation circuit 98W, the same number of coefficient units, and one adder. Furthermore, this output signal is a signal obtained by inverting the step-like output signal shown in FIG. 8(d).

These white peak clip pseudo signal generation circuits 98
The output signals of W and the dark clip pseudo signal generation circuit 98D are added, and then added to the output signal from the delay circuit 97 in an adder 911. This delay circuit 97 is a circuit that delays the white peak clip pseudo signal generation circuit 98W and the dark clip pseudo signal generation circuit 98D by the same amount of time, so in this case, it outputs a signal obtained by delaying the luminance reproduction signal by n clocks. .

In this way, it is possible to correct the signals of the white peak clipped and dark clipped portions during recording, eliminate signal distortion when applying de-emphasis, obtain good signal characteristics, and prevent screen deterioration.

[Effects of the Invention] With the above configuration, the portion of the brightness signal that was clipped during recording is corrected during playback, thereby eliminating the distortion of the playback signal due to clipping that occurred in the conventional brightness signal, and providing good signal characteristics. This reduces screen deterioration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a video signal processing device of the present invention. FIG. 2 is a waveform diagram of the luminance recording signal. FIG. 3 is a waveform diagram of the luminance recording signal after passing through the emphasis circuit 14. FIG. 4 is a waveform diagram of the luminance recording signal after passing through the clipping circuit 15. FIG. 5 is a block diagram of a reproduction system luminance signal processing circuit in which the video signal processing device of the present invention is applied to a white peak clip. FIG. 6 is a block diagram of a conventional recording system. FIG. 7 is a block diagram of a conventional reproduction system. FIG. 8(a) is a waveform diagram of a clipped luminance signal. (b) is an enlarged view of (a). (c) is the output signal of the level determination circuit 6. (d) is the output signal of the linear phase type filter circuit 8. (e) is the output signal of the delay circuit 7, and (f) is the output signal of the adder circuit 11. FIG. 9 is a block diagram of a reproduction system luminance signal processing circuit in which the video signal processing device of the present invention is applied to a white peak clip and a dark clip. 3... Correction circuit 4... De-emphasis circuit 6... Level determination circuit 7... Delay circuit 8... Linear phase filter circuit 8a... 1 clock delay circuit 8b... Coefficient unit 10... Addition circuit 11...Addition circuit 96W...Level judgment circuit for white peak clip 96D...Level judgment circuit for dark clip 97...
Delay circuit 98W...Pseudo signal generation circuit for white peak clip 98D...Pseudo signal generation circuit for dark clip 911.
・Adder

Claims (1)

[Scope of Claims] A level determination circuit that determines the level of an input signal that is input; a pseudo signal generation circuit that generates a pseudo signal from an output signal of the level determination circuit; an output signal of the pseudo signal generation circuit; A video signal processing device comprising: an adder that adds input signals.