JPH01295297A - Digital control display monitor - Google Patents

Abstract

PURPOSE:To enable the stabilization and automatic regulation of the operations following up various input conditions by using control circuits of a microcomputer, non-volatile memory, etc., to store the operation state at the time of a control data change into the non-volatile memory. CONSTITUTION:The microcomputer 44 in the control circuit has a means of measuring the frequencies of synchronizing signals of input video signals and accessing the non-volatile memory 55 corresponding to the results of the analysis and a means of accessing the data corresponding to inputted data by using input means such as rotary switches 49, 50. The microcomputer outputs the data for control judged by the external data input and input signal frequencies and makes communication with an external measurement controller. The automatic frequency follow up is thereby executed without using a variable resistor and the monitor can be connected even to an automatic regulator by a simple interface. The stable control is executed even in the neighborhood of the threshold of the input signal frequencies; in addition, the prepn. of the different operation conditions at the same frequency and the selection of the contents thereof are possible.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a digitally controlled display monitor that automatically follows the frequency of an input video signal and other input conditions, and particularly relates to a digitally controlled display monitor that automatically follows the frequency of an input video signal and other input conditions. It concerns what is being followed.

[Prior Art] Fig. 11 is a circuit diagram showing a control circuit of a conventional frequency automatic tracking type display monitor.
is the FV conversion circuit, (2) and (3) are the FV conversion circuit (1
) are connected to the comparator IC1 (4) and (5) are feedback resistors, (6), (7) and (8) are the reference voltage setting resistors, and (9) and (10) are the comparator ICs (2) and A transistor for current amplification is connected to the output of (3), (11), (12), (13) and (14) are voltage dividing resistors, and (15) is a transistor for switching the base potential of transistor (9). , (16) and (17) are voltage dividing resistors that determine the base potential of transistor (15), (18) and (19) are pull-up resistors, (20) is a transistor, and (21) is a transistor (20). Load resistance, (22
) and (23) are voltage dividing resistors that determine the base potential of the transistor (20), and one end of (22) is a diode (
Transistors (9) and (24) and (25)
10). (26) is a current amplification transistor, and (27) is its emitter resistance. In addition, (28) and (29) are transistors (9),
Analog switch IC driven by (10) and (26), (30), (31), (32), (33)
, (34) and (35) are analog switch ICs (28
) and (29) are connected to variable resistors, and (36) and (37) are voltage dividing resistors with each variable resistor.

FIG. 12 is a configuration diagram of a conventional frequency automatic tracking type display monitor, in which (3g) is a CRT, (39
) is a video circuit including a sync separation circuit, (40) is a deflection circuit, (41) is a high voltage circuit, (42) is a power supply circuit, (43) is a
) is the control circuit.

Next, the operation will be explained. A horizontal or vertical synchronizing signal is applied to the input terminal (2) of the FV conversion circuit (1). In this circuit, a case will be described in which a horizontal synchronizing signal is applied, but the same applies to a case in which a vertical synchronizing signal is applied. F
From the output terminal O of the V conversion circuit (1), the horizontal synchronizing signal frequency applied to the input terminal I is converted into a voltage 1 and is output, and is input to the comparators (2) and (3). Furthermore, one of the input terminals of the comparators (2) and (3) has a voltage V divided by the resistors (6), (7), and (8).
and V3 are applied. Here, the divided voltage is V2>V3
It is.

If the voltage is 1 or 2 or V3, comparator 3
= The output voltage of (3) becomes “H” and the comparator (3)
The emitter voltage of the transistor (10) connected to the output terminal of increases. Therefore, resistors (1B) and (17)
The midpoint potential of the transistor (15) also rises, turning on the transistor (15), thereby lowering the base voltage of the transistor (9) and lowering the emitter voltage. This transistor (1
The emitter voltage of 0) is applied to the resistors (22) and (23) via the diode (25), and the midpoint voltage increases,
Transistor (20) turns on. This lowers the base voltage of the transistor (26) and also lowers the emitter voltage. Therefore, in this case, transistors (9), (1
0) and (26), the transistor (
10) Since only the emitter voltage becomes “H”,
The midpoint voltage of resistors (13) and (14) is applied to the input terminals of analog switch ICs (2B) and (29).

This allows the corresponding variable resistors (31) and (34) to
are connected to resistors (36) and (37), respectively, and output terminals A and B are connected to variable resistors (3
1) and resistor (3B), variable resistor (34) and resistor (37
) is output.

Also, if the voltage is ■3 × ■1 × ■2, the comparator (
Since the output voltage of 3) becomes "L", the emitter voltage of the transistor (10) decreases, and the output voltage of the transistor (15) decreases.
) is turned off. Also, the output of the comparator (2) is “H”
”, the emitter voltage of the transistor (9) also rises, and this voltage is applied to the resistor (2) through the diode (24).
2) and (23), the transistor (20) turns on, and the emitter voltage of the transistor (26) also decreases. Therefore, in this case, transistors (9), (10)
and (26) of the emitter voltage of transistor (9)
Since only the emitter voltage of is “H”, resistor (11)
The midpoint voltage of (12) is the analog switch IC (28
) and (29). As a result, the corresponding variable resistors (30) and (33) will be connected to the resistors (36) and (37), respectively, and the variable resistors (30) and the resistors (33) will be connected to the output terminals A and B, respectively.
6) A voltage determined by the variable resistor (33) and the resistor (37) is output.

On the other hand, when the voltage is 3 x 2 x 1, the outputs of regulators (2) and (3) both become "L", and the emitter voltages of transistors (9) and (10) become "L". At the same time, the transistor (20) is turned off, and the base voltage and emitter voltage of the transistor (26) rise. Therefore, in this case transistors (9), (10)
Among the emitter voltages of and (26), transistor (2
Since only the emitter voltage of 6) becomes "H", this voltage is applied to the input terminals of analog switch ICs (28) and (29). This allows the corresponding variable resistor (32
) and (35) are connected to resistors (36) and (37), respectively, and output terminals A and B are connected to variable resistor (32), resistor (36), and variable resistor (35), respectively.
A voltage determined by the resistor (37) is output.

The outputs of output terminals A and B are connected to the video circuit (39).
It is used to control circuits such as a deflection circuit (40), a high voltage circuit (41), and a power supply circuit (42) through the circuit. That is, variable resistors (30) to (35) classify horizontal synchronizing signal frequencies according to frequency thresholds determined by resistors (6), (7), and (8), and are switched in accordance with the classified frequency ranges. By adjusting in advance, each controlled circuit can perform optimal operation in each frequency domain.

[Problem to be solved by the invention] Since the conventional automatic frequency tracking type display monitor is configured as described above, in order to increase the number of control objects and control items of the control circuit, it is necessary to increase the number of variable resistors. Moreover, since it is necessary to mechanically adjust each variable resistor, the adjustment time becomes longer, which is disadvantageous in terms of production efficiency. Also,
The interface of the automatic adjustment device becomes a big deal,
There were problems in that the operation near the frequency discrimination threshold became unstable, and it was difficult to prepare different operating conditions for the same frequency.

Therefore, there was a problem that the problems mentioned in section 2 had to be solved.

This invention was made to solve these problems, and it is possible to perform automatic frequency tracking without using a variable resistor, connect to an automatic adjustment device with a simple interface, and input signal The purpose of the present invention is to provide a digital control display monitor that performs stable control even near a frequency threshold, allows preparation of different operating conditions at the same frequency, and allows selection of the contents.

[Means for Solving the Problems] A digital control display monitor according to the present invention includes a control circuit including a nonvolatile memory for storing control data, a counting means for counting synchronizing signal frequencies, and a built-in RAM for storing control data. , a means for changing control data in the built-in RAM, a means for writing control data into a non-volatile memory, a means for outputting to an external output IC, and a means for communicating with an external weighing 11 control device. It is something.

[Function] The digital control display monitor according to the present invention includes means and means for the microcomputer in the control circuit to measure the frequency of the synchronization signal of the input video signal, classify the results, and access the nonvolatile memory corresponding to the classification results. It has means for accessing data corresponding to data input from an input port using an input means such as a rotary switch into a nonvolatile memory, and outputs control data determined by external data input and input signal frequency, Communicate with external measurement control equipment.

[Embodiments of the invention] An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, (44) is a microcomputer in the control circuit, and (45) is a microcomputer (44).
), (46) is the connector (45)
The connector (47) is paired with the connector (45
) and (46) to the microcomputer (44)
input terminal.

The connected light emitting diode (48) is the connected light emitting diode (48).
5) and (46) to the microcomputer (44).
), (49) is a rotary switch connected to input terminals R01 to Ro4 of microcomputer (44) via connectors (45) and (46), and (50) is a rotary switch connected to input terminal D1 of microcomputer (44). 45) and (
A rotary switch connected to the input terminals R''1 to R14 of the microcomputer (44) via
51), (52), (53) and (54) are connectors (
Microcomputer (45) and (46)
(4) is a tact switch connected to the input terminals R2□ to R24, and (55) is a non-volatile switch connected to the output terminals D and D of the microcomputer (44) and input terminals D98 and input/output terminals R5□ to R54. Memory, (56) is a D15 6A converter IC connected to the output terminals DD and D7 of the microcomputer (44), (57) is the microcomputer (
44) output terminals R41 to R4n, the latch IC connected to D4, (58) is the microcomputer (44)
Latch I connected to output terminals R41 to R4n, D3 of
It is C. Further, the microcomputer (44) includes a ROM in which a control program is written, a RAM, an external event counter, an internal timer, etc.

Next, the function and operation of the embodiment will be explained according to the flowcharts of FIGS. 2A and M2R.

After power is turned on, the microcomputer (44) operates according to a control program written in internal memory. first,
Initializes the I10 port I, RAM, various timers, interrupt control flags, masks, etc., and connects the D/A converter (56
), performs initial settings for peripheral output devices such as latch ICs (57) and (58).

Next, the nonvolatile memory (55) is accessed to read basic data such as screen brightness and a horizontal synchronization signal frequency determination flag, which will be described later, into the built-in RAM. Next, using the built-in external event counter and built-in timer, the signal frequency F11 of the horizontal synchronization signal input to the EXCT terminal (external event counter input terminal) and the vertical synchronization signal (signal frequency fv of No. 'A' input to the INTO terminal) are , count using the method shown below.

That is, FIGS. 3(a), 3(b), and 3(C) are schematic diagrams showing the counting method. Specifically, the vertical synchronizing signal shown in FIG. 3(a) or the input I of the microcomputer (44)
The horizontal synchronizing signal shown in FIG. 2(c) is input to the NTO terminal and the input EXCT terminal of the microcomputer (44), respectively.

Inside the microcomputer (44), the frequencies fH1fv of the vertical synchronizing signal and the horizontal synchronizing signal are counted, respectively, using the internal pulses shown in FIG. 3(b) that depend on the system clock serving as its operating reference. That is, by counting the number of internal pulses of the microcomputer (44), the frequency fv of the vertical synchronizing signal is counted, and a certain period T in one period of the vertical synchronizing signal is determined by the internal pulses of the microcomputer (44). The frequency fH of the horizontal synchronizing signal is counted by specifying the specified period and counting the number of pulses of the horizontal synchronizing signal input to the human-powered EXCT terminal during that period. Here, the stability of the signal is determined by counting the horizontal synchronizing signal frequency fIf and vertical synchronizing signal frequency fv for a certain period of time and confirming that the fluctuations thereof are within a certain value.

Next, count the horizontal synchronization signal frequency fII and the vertical synchronization signal frequency fv again using the above method, and determine whether the values are within a preset frequency range,
Determine whether the count result is normal or abnormal. Here, if the result is determined to be normal, proceed to the next step, and if the result is abnormal, return to checking the stability of the signal again.

Next, the HMODEI is determined by classifying the count results of the horizontal synchronizing signal frequency fI-1 in order of magnitude, and the determined HM
Shift the ODEI data to the right by a certain number of bits and convert it to MSU
Determine B. Figure 4 shows the horizontal synchronizing signal frequency fH
This is a flowchart showing a means for obtaining MODEL, and FIG. 5 is a schematic diagram thereof. That is, a table showing the correspondence between the frequency count result of the horizontal synchronization signal and HMODEI is prepared in advance in the memory inside the microcomputer, and the count result is stored in the address modification register X.
, Y, and store the corresponding memory contents in HMODEI. Similarly, VMODEI is obtained from the frequency count result of the vertical synchronization signal, and then the rotary switch (
49) or the contents of the input terminals Ro1 to RO4 of the connected microcomputer (44), the channel for selecting the control operation state is determined. Here, channel 0 is called a lower channel, and channels 1 to n are called upper channels. n is an arbitrary constant whose upper limit is determined by the number of output bits of the rotary switch (49).

Here, if the content of the input terminal is 0 channel, it is determined that it is a lower channel, and the HMODEI is corrected according to the procedure described below. FIG. 6 is a schematic diagram showing the relationship between HMODEI, MSUB, and control data. In the figure, memory A is part of the non-volatile memory (55) and is part of the HMOD
There is a one-to-one correspondence with EL. Memory B and memory C are also part of the external nonvolatile memory (55), and memory B has a one-to-one correspondence with HMODEI, and memory C corresponds to multiple HMODEIs and has one-to-one correspondence with MSUB. handle. Memory A is a horizontal synchronization signal frequency determination flag to prevent screen control data from changing due to the external environment or variations in input signal frequency when switching control operations, including when the power is turned on. Control data is stored in . The contents of memory A are all read from the nonvolatile memory (55) to the built-in RAM of the microcomputer (44) when the power is turned on, and when the control data is changed by an external device or the user, it is modified by the method described below. Later, the non-volatile memory (55) was transferred from the built-in RAM of the microcomputer (44).
) is written to. Here, ±m of the part of memory A where 1'' stands, (m is a constant, and in the case of Figure 6, m
The range (a) of =2) becomes the forced pull-in range, and fluctuations in HMODEI due to minute changes in the horizontal synchronizing signal frequency fII are corrected. In the case of Fig. 6, HMODE1=
4, the contents of the corresponding memory A or "1'"
°, it is corrected to HMODE1=4 in the range of HMODE1=2 to 6. After HMODEI is modified, MSUB is obtained by shifting the contents of HMODEl to the right (in the case of Figure 6, shift 2 bits to the right).
.

When MSUB is determined, screen control data is transferred from the corresponding memory B and memory C to the microcomputer (44
) into the built-in RAM. The memory C stores the VMODEI when the screen control data is changed, and the VMODEI read out here is compared with the determined VMODEI based on the count result of the vertical synchronization signal frequency f, and the difference is determined to be within a certain range. , the contents of memory C are set to VMODEl.

Also, the contents of the input terminals Ro1 to Ro4 of the microcomputer (44) connected to the rotary switch (49) are determined to be the upper channel, and when the channel is "1", horizontal (H) and vertical (V) synchronization is performed. The signal polarity is determined by the synchronization signal polarity determination signal input to the D port and the D12 port. Further, in FIG. 7, memory D is a part of the nonvolatile memory (55), and stores screen control data. Memory D is classified according to the combination of H and V synchronization signal polarities, and the memory contents corresponding to the combination of H and V synchronization signals or the microcomputer (4
4) is read into the built-in RAM.

On the other hand, in the case of an upper channel other than "1", the memory E corresponding to the channel on a one-to-one basis is accessed as shown in FIG. Memory E is also a part of the non-volatile memory (55) and stores screen control data, and the data in the area specified by the channel is transferred to the microcomputer (44).
) is loaded into the built-in RAM.

The memory D and memory E contain HMODElo and VMODEI when changing screen control data.

is memorized, and the HM determined by this HMODElo and the count result of the horizontal synchronizing signal frequency f1□
The ODEI values are compared, and if the difference is within a certain range, it is treated as a negative channel, and if the difference exceeds a certain range, it is processed as a lower channel. Here, if it is determined that it is a negative channel, HMODEL' is set to HMODEL,
Furthermore, vertical synchronization (VMODEI determined by the count result of No. 4 frequency fv and V in memory D or memory E)
MODEI' is compared, and if the difference is within a certain range, VMODEI' is set as VMODEI.

After the screen control data is read into the built-in RAM of the microcomputer (44) in the above steps, the output terminals R41 to R4n, D3 to D of the microcomputer (44) are
D/A converter (56) and latch I connected to 7
Control data is output to C (57) and (58).

In the next step, it is determined whether or not to write data to the nonvolatile memory (55) by looking at the data write request flag in the built-in RAM of the microcomputer (44) and the inputs to the D1 and D9 ports. That is, the data write request flag is “1” and the input of the D1 port is “L”.
", and data is written only when the BUSY output of the nonvolatile memory (55) is "H" at the connected D9 port.

Here, the data write request flag is set during data change processing, which will be described later, and is reset when a predetermined data write process is completed.

Next, the input terminal Ro1 of the microcomputer (44)
Read the contents of Ro4 to determine whether the channel has changed, and if a change is detected, return to the signal stability check again. Furthermore, the synchronization signal polarity determination signal is Dll, Dl. Read from the port and return to signal stability check if a change is detected. Next, based on the results of the horizontal synchronizing signal frequency fH and vertical synchronizing signal frequency fv, HMODEI' and VM
ODE1' and the HMO determined in the previous stage.
When DE1 and VMODEI are compared and their difference exceeds a certain range, the process returns to the signal stability check.

Next, input terminal R21 of the microcomputer (44)
The contents of ~R24 are read and a key human power determination is performed, and if it is determined that a key is pressed, data change processing is performed. The procedure for this data change process is shown in Figure 49A and 9B.
This is shown in the flowchart in Figure.

In the figure, when the content of the DI port is H'', that is, when the switch (48) is off, the switches (51) to (5)
4) is a switch for contrast control and brightness control. That is, when the switch (51) is on, the contrast data in the control data output RAM of the built-in RAM is incremented, and the switch (51) is turned on.
When 2) is on, the same data is decremented. Similarly, when the switch (53) is on, the control data output R
Increment the AM bright data and press the switch (
54) is on, the same data is decremented.

Further, when the content of the input terminal D1 of the microcomputer (44) is "L", that is, when the switch (48) is on, the switches (51) to (54) function as control data increase/decrease and storage switches. .

Further, in this case, the switch (50) serves as a selection switch for the type of control data. That is, when the switch (51) is turned on, the control data on the built-in RAM specified by the switch (50) is incremented, and when the switch (52) is turned on, the same data is decremented. When the switch (54) is turned on, the rotary switch (49)
When the channel specified by is "O", a horizontal synchronizing signal frequency discrimination flag setting process is performed. The processing means in this case is shown in the flowchart of FIG. First, the HMODEI is determined based on the count result of the horizontal synchronizing signal frequency fH, and then the horizontal synchronizing signal frequency discrimination flag (in the built-in RAM) corresponding to the range of this HMODEI ±2 m is checked. If either of them is set to "1", it means that the corresponding memory area is occupied by control data other than the intended operating state, so check the LED blinking flag in built-in RAMJ2 to see if the flag is "1". If it is 0'', it is set to 1, the light emitting diode (47) blinks to issue a warning, and the process ends. If the LED flashing flag is already set,
All horizontal synchronizing signal frequency discrimination flags corresponding to the range of HMODEI±2m are set to "0". And HMOD
The horizontal synchronizing signal frequency flag corresponding to EI is set to "1", the LED blinking flag is set to "0", and the process ends.

The flowchart in FIG. 9 will be explained again.

After completing the horizontal synchronization signal frequency discrimination flag setting process for channel “0”, the non-volatile memory (55
) in memory C and sets the pig write request flag. When the channel is "1", the address in the memory D determined by the channel and horizontal and vertical synchronizing signal polarities is determined, and a data write request flag is set. At this time, memory D contains HMODEl and vMOD at the time of writing.
El is written as HMODE1' and VMODE1', respectively. If the channel is "2" or more, determine the address in memory E by the specified channel,
Set data write request flag. At this time also the channel “
1", HMODEI and VMODEI are written to memory E.

Note that when the switch (48) is on, HMODE1 determined by the count result of the horizontal synchronizing signal frequency fu
VMODEI determined by the horizontal synchronization signal frequency fvO count result is positive, and HMODEI, VMODEI
No modifications shall be made. At the time the switch (48) is turned on, "1. HMODEI, VMODEI"
The built-in RA stores control data for the memory area of the non-volatile memory (55) determined by the channel specified by the rotary switch (49) and the synchronization signal polarity.
Read to M.

The explanation will be given by returning to FIG. 2 again. After the second data change process is completed, the screen control data is transferred to the latch IC (57),
(58) and output to the D/A converter (56). Then, if the LED blinking flag is "1", the light emitting diode (47) is blinked, and if the data write request flag is "1", the light emitting diode (47) is lit. In this case, the connector (45
), automatic adjustment can be performed by removing the connector (46) and connecting an external measurement control device instead.
The next step is to perform communication processing for this purpose. and,
Return to the previous step and start processing by checking the data write request flag.

Control operations are performed in the following steps.

In the two-legged embodiment, only channel "1" is used for determining the synchronizing signal polarity and switching the control state, but other channels may be similarly processed.

[Effects of the Invention] As explained above, this invention can be applied to a microcomputer, a non-volatile memory, a D/A converter, a latch IC,
By using a control circuit such as a control operation selection switch to store the operating state when changing control data in non-volatile memory, operations that follow various human input conditions can be performed stably and automatically adjusted. can also be done.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a control circuit of a digital control display monitor according to an embodiment of the present invention, FIGS. 2A and 2B are flowcharts showing the overall flow of a control program of a microcomputer in this invention,
Fig. 3 is a timing chart showing the relationship between the vertical synchronizing signal, the horizontal synchronizing signal, and the pulses used for counting them; Fig. 4 is a flowchart showing the procedure for calculating HMODEI from the horizontal synchronizing signal frequency in the control program; Fig. 5 is an explanatory diagram of the table used at that time, Figure 6 is a schematic diagram showing the nonvolatile memory corresponding to the lower channel, and Figure 7 is an explanatory diagram of the table used at that time.
Figure 8 is a schematic diagram showing the nonvolatile memory corresponding to the upper channel, Figure 9 is a flowchart diagram showing the procedure of data change processing, and Figure 10 is a diagram showing the procedure of setting the horizontal synchronization signal frequency discrimination flag. Flow chart diagram, 11th
The figure is a control circuit diagram of a conventional automatic frequency tracking display monitor, and Figure 12 is a configuration diagram of a conventional automatic frequency tracking display monitor. In the figure, (44) is a microcomputer, (45
), (46) is a connector, (47) is a light emitting diode,
(48) is a switch, (49) and (50) are rotary switches, (51) to (54) are switches, (55)
is non-volatile memory, (56) is D/A converter IC1
(57) and (58) are latch ICs. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Patent attorney Masuo Oiwa (and 2 others) ○ Partial flowchart of control program Figure 4 HMODEI table Figure 5 DEI Memory A Memory B M
SUB Memory C Schematic diagram of non-volatile memory of lower channel Figure 6

Claims (1)

[Claims] A digital control display monitor having a control circuit that automatically follows the synchronization signal frequency of an input video signal and other input conditions to control each circuit such as a horizontal deflection circuit, a high voltage generation circuit, a video circuit, a power supply circuit, etc. The control circuit includes a nonvolatile memory for storing control data for each circuit, and a D for outputting the control data.
/A converter IC and latch IC, and is connected via a connector to a switch for selecting a control operation state, an LED for displaying internal status, etc., and a switch used for changing the control data. counting means for counting horizontal and vertical synchronizing signal frequencies, and classifying the results counted by the counting means, and corresponding to the results and the state of the control operation selection switch stored in the nonvolatile memory. reading means for reading the control data into the built-in RAM; changing means for changing the control data in the built-in RAM; writing means for writing the control data from the built-in RAM into the nonvolatile memory;
A digital control display monitor comprising an output means for outputting control data in the built-in RAM to an external output IC, and a communication means for communicating with an external measurement control device.