JPH01293414A - Initializing system for register - Google Patents

Abstract

PURPOSE:To shorten the time necessary to execute the initial setting of a register in a CPU or in a peripheral LSI by storing the initial set value of a register group into a non-volatile storing means beforehand and transferring the contents of the non-volatile storing means to a corresponding register at the time of inputting a power source. CONSTITUTION:An EEPROM 4 and the writing reading control circuit of the EEPROM 4 are built in a semiconductor device having a register group 1 like a CPU and a peripheral LSI, the initial set value of respective registers is written and preserved in the EEPROM 4 and the memory contents of the EEPROM 4 are written to the register of the semiconductor device at the time of inputting the supply voltage. Thus, by writing the initial value into the EEPROM 4, when the power source is inputted and the system rises, the initial setting is executed only by shifting the initial value to the register from the EEPROM 4. Thus, the time necessary for the initial setting is shortened.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a system initialization technique and a technique that is particularly effective when applied to an initial value setting method for a register in a semiconductor device, for example, in a microcomputer system. This article relates to a technique that is effective for use in initializing registers when power is turned on.

[Prior Art] A CPU chip and peripheral LSI that constitute a microcomputer system have a large number of registers inside.
If some of these registers do not contain a predetermined value when the system is started up, the system may not operate correctly. Therefore, when the power is turned on, initial values are set for the register group as described above, but in conventional systems, the initial setting of the registers is such that the CPU writes the initial values in the ROM to the registers one by one using a program. (For example, ■
Published by Hitachi, Ltd. in 1985, ``Hitachi Microcomputer Data Book 8/16-bit Microcomputer Peripheral LSIj'' (see pages 39 to 86).

[Problems to be Solved by the Invention] However, as CPUs and peripheral LSIs have become more sophisticated in recent years, the number of internal registers has increased, and the number of initial setting items has tended to increase. Furthermore, the larger the system is configured, the greater the number of registers that must be initialized. As a result, it takes a long time for the system to fully start up after the power is turned on, which increases the user's waiting time and irritates the operator. When the system starts up, external inputs may not be accepted for a while, or the inputs and outputs may conflict with each other, which may cause the system to fall into an undesirable operating state.

An object of the present invention is to shorten the time required to initialize registers in the CPU or peripheral LSI in a microcomputer system, thereby reducing user waiting time, and to make the input/output board available for use immediately after power-on reset. The purpose is to avoid undesirable operating conditions of the system by assigning them to corresponding functions.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this volume are summarized as follows.6 Namely, EEP
A write/read control circuit for ROM and EEPROM is built into a semiconductor device having a group of registers such as a CPU or peripheral LSI, and the initial setting value of each register is set in advance by EEP.
Write it to ROM and save it, and when the power supply voltage is turned on, E E
The contents of the PROM are written into the register of the semiconductor device.

In addition, a power cutoff detection circuit is installed along with the EEPROM.
When a drop in the power supply voltage is detected, the contents of the register in operation can be written and saved in the EEPROM.

[Operation] According to the above-mentioned means, if the initial values are written in the EEPROM in advance, initial settings can be made by simply transferring the initial values from the EEPROM to the registers when the power is turned on and the system is started up. , the time required for initial settings is reduced.

In addition, if the power cutoff detection circuit detects a power outage and stores the contents of the registers in operation in the EEPROM, the contents of the registers can be restored when the power is turned on or turned on again, allowing system recovery. becomes easier.

[Embodiment] FIG. 1 shows an embodiment of a main part of a semiconductor device to which the present invention is applied. Here, the semiconductor device refers to a microcomputer, microprocessor, and its peripheral devices.
It is a device containing a group of registers, such as an SI, and includes various registers, arithmetic units, and their control units. In the drawing, a register group 1 and a main bus 3 for connecting the register group to an external bus 2 are shown, and the arithmetic unit and control section are omitted.

In the semiconductor device of this embodiment, corresponding to the register group 1, there is an EEPROM 4 of the same capacity as that of the register group 1, and a
Newly provided are an EEPROM control unit 5 that performs read control, a power cutoff detection circuit 6, a flag set 7, and a backup bus 8 that connects these to each other. The power cutoff detection circuit 6 monitors the power supply voltage Vcc and outputs a power cutoff detection signal SEMS when it becomes below a predetermined level.
The EEPROM control section 5 can be activated by outputting the following. Note that among the above circuits, flag set 7 and EE
PROM control section 5 is also connected to main bus 6.

Further, the flag set 7 includes a written flag 7a indicating whether writing to the EEPROM 4 has been completed.
and a busy flag 7b indicating that writing to the EEPROM 4 is in progress, of which the written flag 7a is EE.
It is composed of the same memory element as the nonvolatile memory element that constitutes PROM4.

Furthermore, although not particularly limited, in this example, the EEPR
A mode setting register is provided in the OM control unit 5, and either fixed mode or backup mode can be set by writing to this mode setting register by a program or by the main processor of the system via an external bus. It can be set as desired.

Here, the fixed mode is a mode in which the contents of register group 1, which are initialized when the power is turned on, is saved in the EEPROM 4, and the backup mode is a mode in which the contents of register group 1 are saved for the first time when the power is turned off. EEPR
This is a mode in which the register is saved to the OM4, and the EEPROM control unit 5 saves the register only when a power cutoff is detected while this mode is set.

Note that the above mode setting register has a written flag 7a.
Similarly, it may be constructed from a non-volatile memory element.

Next, the operation of the system using the semiconductor device of the above embodiment will be explained using the flowchart of FIG. 2 and the system flowchart of FIG. 3.

When the power is turned on, the CPU first sets the written flag 7.
Check whether "1" is set in a (step SL)
. Here, if it is determined that the written flag 7a is set to "1", the CPU moves to step Sll and executes the EEP.
The ROM control unit 5 is activated. The EEPROM control unit 5 sets the busy flag 7b to "1" and then outputs the EEPR.
Read the data (initial value) already written in OM4 and transfer it to the corresponding register in advance (Figure 3 (A)
.

(Refer to (B)) and set the busy flag 7b to rQ after the transfer is completed.
Clear to J. While the busy flag 7b is set to "1", access to the EEPROM 4 by the CPU is prohibited.

On the other hand, in the determination in step S1, the flag 7a is "0".
”, the CPU writes the initial setting value into register group 1 (step S2).

Then, in step S3, the operation mode is set by writing to the mode setting register. Then E E
The PROM control unit 5 determines the operating mode (step S4).

Here, if it is determined that it is the fixed mode, the initial setting value in the register is transferred as is to the EEPROM 4 and stored therein, and after setting the written flag 7a, the original functional operation of the semiconductor device is started (steps 321 to 523).

On the other hand, if the backup mode is determined in step S4, the process proceeds to step S5, where the detection signal from the power cutoff detection circuit 6 is checked to determine whether or not the power cutoff has occurred. Then, if the power is not cut off, the semiconductor device starts its original functional operation as it is (step S6), and if the power is cut off, the EEPROM control unit 5 is activated and uses a power source such as a backup battery. As shown in FIGS. 4(A) and 4(B), before the power is completely turned off, the contents are read from the register group 1, transferred to the EEPROM 4, and stored, and the written flag is set (step S31). ，
532).

As explained above, in the above embodiment, the EEPROM 4 and the EEPROM write/read control circuit 5 are built into a semiconductor device having a register such as a CPU or a peripheral LSI.
The initial settings of the registers are written and saved in the EEPROM in advance, and when the power supply voltage is turned on, the contents of the EEFROM are written to the registers of the semiconductor device, so when the power is turned on and the system is started up, the EEPROM
Initial settings can be made by simply transferring the initial values from M to the registers, which shortens the time required for initial settings, reduces user waiting time, and allows input/output ports to immediately become functional for the intended purpose from a power-on reset. Assign it to
The system can be prevented from falling into an undesirable operating state.

In addition, a power cutoff detection circuit is provided along with the EEPROM, and if a drop in the power supply voltage is detected, the contents of the operating register can be written to and saved in the EEPROM, so even in the event of a power outage, the power cutoff detection circuit remains If the system detects this and stores the contents of the registers in operation in the EEPROM, the contents of the registers can be restored when the power is turned on or turned on again, making it easy to restore the system.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, in the above embodiment, the contents of the register group are stored in the EEPROM, but the
It is also possible to use battery-backed RAM instead of EPROM (71).

In the above description, the invention made by the present inventor was mainly applied to the CPU chip and peripheral LSI that constitute a microcomputer system, which is the background field of application, but this invention is not limited thereto. Instead, it can be used in general semiconductor devices having registers that require initial settings.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, in a microcomputer system, C
Shorten the time required to initialize registers in the PU or peripheral LSI, thereby reducing user waiting time, and assigning input/output ports to functions corresponding to the intended use immediately from power-on reset, eliminating undesirable problems in the system. operating conditions can be avoided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a main part of a semiconductor device to which the present invention is applied. FIG. 2 is a flowchart showing the operating procedure in the semiconductor device. Figures 3(A) and 3(B) are system flowcharts showing how to transfer data from the EEPROM to the register group, and Figures 4(A) and 4(B) are system flowcharts showing how to transfer data from the register group. EEPR
2 is a system flowchart illustrating how data is transferred to OM. 1...Register group, 3...Main bus, 4...
...Nonvolatile storage means (EEPROM), 5...E
EPROM control unit, 6...Power cutoff detection circuit, 7.
...Flag set, 7a...Written flag, 7
b: Busy flag, 8: Backup bus. Figure 1 ■ Figure 2 Figure 3 (B

Claims (1)

[Scope of Claims] 1. A semiconductor device incorporating a plurality of registers is provided with non-volatile storage means and its writing/reading control means, and initial setting values of the register group are stored in advance in the non-volatile storage means. A register initialization method characterized in that the contents of the nonvolatile storage means are transferred to a corresponding register when power is turned on. 2. A power cutoff detection means is provided, the contents of the register group are saved to the nonvolatile storage means when the power is turned off, and the contents of the nonvolatile storage means are restored to the corresponding registers when the power is turned on again. 2. The register initialization method according to claim 1. 3. A written flag is provided, and the flag is set when the initial setting value of the register or the contents of the register in operation is stored in the nonvolatile storage means. The register initialization method described.