JPH01284005A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To keep the operating state of transistors(TR) being components of the current mirror circuit in the saturation region even if a power voltage and a threshold voltage are fluctuated and to apply mirror operation of current with fidelity by providing a bias voltage generating circuit where the ratio of the size of TRs is limited. CONSTITUTION:A ratio of a size (where size is referred to as a ratio of a channel length to a channel width) S3 of a TR M3 being a component of a bias voltage generating circuit 2 and a size S4 of a TR M4 is limited within a range given by the inequality shown. In the inequality, V1 is a gate voltage of TRs M1a, M1b, M3, V+h1 is a threshold voltage of the TRs M1a, M1b, M3, M4, V+h2 is a threshold voltage of the TR M2a and a function of a source voltage V4 of the TR, the TRs M1a-M2b are of the same side and the TRs M5a, M5b are also of the same size. Even in the presence of a flucturation of the power voltage, if the amplitude of the current flowing to the current mirror circuit 1 is unchanged, the gate voltage V1, that is, the current flowing to the bias voltage generating circuit 2 is also unchanged and the gate voltage V2 of the TR M4 is unchanged, then the TRs being the components of the current mirror circuit 1 is kept in the saturation region.

Description

[Detailed Description of the Invention] [Industrial Field of Application J] This invention provides reliable performance even when there are fluctuations in power supply voltage and threshold value.
This relates to a current mirror circuit that mirrors a current to a current.

[Prior Art J] An example in which a current/two circuit equipped with a conventional bias voltage generation circuit is applied to a differential amplifier will be described. In Figure 3, α) is a current mirror circuit, (2) is a bias voltage generation circuit, (3) is a differential amplifier, (Mla) ~
(M2b), (%14) and (Mian are co-channel transistors, (M5b) is a p-channel transistor,
9. vi and vl are inputs, Vo is output, VRI ~ VR3
is the bias voltage, Vl is the gate voltage of the transistor (Mia), v2 is the gate voltage of the transistor (MZa), and v3 is the source voltage of the transistor (MZa).

Next, the operation will be explained. Current mirror circuit (1)
If mirrors the current faithfully, then the differential amplification n (3)
(D input, dEVi>Vi (when D,) Won vs P
(Mlb) flows only the same current as the transistor (Mla), so the output Vo is high because the current flows into the output, and when the input is Vi (Vi O, the transistor (Mib)
) flows the same amount of current as the transistor (Mla), so the rounding output Vo that draws current from the output decreases. If the mirror ratio is bad, when the input is vf'>vi, the transistor (mlb) will flow a stain current as compared to the transistor (mia), so the current flowing into the output will decrease, so the output vO will not rise as much as above, and the input will become vr< When vr, the transistor (ulb) does not allow current to flow through the transistor (mia), so the current drawn from the output decreases, so the output Vo does not drop as much as above.In other words, the voltage gain decreases. - In order to obtain
It is necessary to operate all of them in the saturation region, so a bias voltage V2 that satisfies this condition is determined and generated in the bias voltage generation circuit (2).

Consider the case where there is a fluctuation in the power supply voltage.

In the differential amplifier (3), the normal bias voltage VRI,
It is assumed that VH2 is applied so that a constant current flows, and the magnitude of the current flowing through the VH circuit does not change. Since the magnitude of the current flowing through the current mirror circuit a) does not change, the gate voltage v1 of the transistor (Mla) does not change, but the bias voltage v which becomes the output of the bias generation circuit (2)
2 changes with fluctuations in the power supply voltage.

Since the drain voltage v1 of the transistor (MZa) does not change and the gate voltage v2 changes, when this value increases beyond a certain value, the transistor (MZa) deviates from the saturation region.

Also, consider the case where there is a change in the threshold value. n
The threshold value of the f-y transistor is not changed to ffi, but pf
Suppose that the threshold value of the Yanel transistor changes. Since the magnitude of the current flowing through the current mirror circuit α) does not change, the gate voltage Vl of the transistor (Mla) does not change, but the bias voltage v2, which is the output of the bias generation circuit (2), is the threshold value of the transistor (Pf). If the threshold value becomes large, the lower value becomes ``high'', and if the threshold value becomes small, the upper value becomes ``high'', and when the threshold value exceeds a certain value, the transistor (&1za) goes out of the saturation region.

[Problem to be solved by the invention J] In conventional current mirror circuits, if there are fluctuations in the source voltage and threshold value, the transistors that make up the current will move out of the saturation region, so the mirror efficiency is poor. There was a problem that the performance of

This invention was made in order to solve the above-mentioned problems, and provides a current mirror circuit that keeps the transistor in the saturation region and faithfully mirrors the current even if there are fluctuations in the power supply voltage and threshold value. With the goal.

[Means for Solving the Problems J] A current mirror circuit comprising a first conductor type transistor according to the present invention uses the same L transistor as a bias voltage generating circuit.
Inside the SI, the second conductor is connected to another current mirror circuit consisting of type transistors, and the transistor size ratio is V+hz(73) P l + .
〈 2 +7+h(vli −'q+hxVl−V+
The two first conductors limited by hl Vl-■+111 are arranged as type transistors.

C effect j Since the current mirror circuit in this invention regulates the size ratio of the transistors constituting the bias voltage generation circuit, the bias voltage is 2v1-2V'-1-hl+V
+h2(Vi) <V2 <V1+V+h2(Vi)
Within the range of , the transistor of the current mirror circuit is operated in the saturation region and the transistor is maintained in the saturation region even if the power supply voltage and threshold value fluctuate. An example of application will be explained. In FIG. 1, (M3) is an n-channel transistor, and (M5a) is a p? It's Yane~Towonjista.

The transistor size is defined as the ratio of the t-yen μ length and the t-yen lv@, and the ratio between the size S3 of the transistor (M3) and the size S4 of the transistor (M4) is limited within the range given by.

However, “il” is a transistor (1!la) s (Ml
b), (M3), V+hl is the threshold voltage of transistors (Mla), (Mlb), (M3), (M4), and V+112 is the transistor (vz
The source voltage v of this transistor at the threshold voltage of a)
As a function of 3, transistor (Mla) ~ (M
2b) are the same size, transistors (M5a),
(M5b) is also the same size.

Next, the operation will be explained. In the current circuit α), the conditions for saturation of transistors (Mla) and (M2a) are Mla2V1-V+hx<Vs
−(p
M2a:V2-Vs-v+hz(Vs)<V
l-Vl-■, and the transistor (M
The threshold at pressure v+qs in 2a) is given by the following equation taking into account the substrate effect.

V + h 2 (Vsu = V + h1 + T (170-
vza) -■Here, T is the substrate effect coefficient and -F is the Fermi potential.

The saturation currents flowing through transistors (Mla) and (M2a) are equal, so if these transistor sizes are made the same, the left side of equation 0 will be equal to the left side of equation 0, and the range of bias voltage v2 will be 2vs-2v+hx +v+hz( vs) < vz
< v1+y+hz (limited to v Lee ■.

In the bias voltage generation circuit (2), a transistor (M
5a) and (M5b) constitute a normal current transistor, and the current flowing on both sides of the transistor (M3) and (M5b) constitute a normal current transistor.
4) The saturation currents are the same, so 8m(Vl-V+hl)"=i94(V2-V+hl)
becomes. Therefore, the bias voltage v2 is determined as shown in the following equation.

■ According to formula and formula 0, the ratio of sizes S3 and 84 of transistors (M3) and (M4) is regulated within the range of 〇 The transistor (l
If i13) and (M4) are designed to satisfy the range of formula 0, the bias voltage V2 is determined by formula 0.

If this value satisfies the range of formula ■, the four transistors of the same size (v
ia) to (M2b) operate in the saturation region.

Even if the power supply voltage fluctuates, if the magnitude of the current flowing through the current circuit α) does not change, the transistor (M
Since the gate voltage v1 of the bias voltage generating circuit (2) does not change, the magnitude of the current flowing through the bias voltage generating circuit (2) also does not change.

Therefore, since the gate voltage v2 of the transistor (M4) does not change, the transistor constituting the current mirror circuit Q) is kept in the saturation region.

Consider the case where the threshold value fluctuates. Even if there is a variation in the threshold value of the pf transistor, the transistor is kept in the saturation region in the same manner as described above. rJf, if there is a change in the threshold value V + hl of the Jane μ transistor, V
1 * V 3 , changes with via 1.

At this time, the bias voltage v2 also changes according to the equation 0, so even after the change, the @si transistor that satisfies the equation (2) is maintained in the saturation region.

Also, if the magnitude of the current flowing through the current circuit changes, Vl, V3. V+h! changes, but vz also changes according to equation 0, so as long as equation (2) is satisfied, the transistor is kept in the saturation region.

Further, an example in which the present invention is applied to a band gap reference reference voltage source will be described.

A band gap reference reference voltage source obtains a constant output against fluctuations in power supply voltage and temperature, and is used as a reference voltage source for a differential amplifier. In Figure 2, (4) is a band gap reference reference voltage source, (M6a) to (MIO) are pf transistors, (Mlla) to (M12d) are n-channel transistors, (Bl) to (B3) is pnp) Funjista. V4. V5 is each transistor (v7a)
, (M8a) gate voltage, v6 is the transistor (1
The source voltages of 8a), V7 to V12, are transistors (Mla), (Mlb), (M3), (M4), respectively.
This is the source voltage of (Mlla) and (Mllb). In a normal Wilson-type current Mif, the transistor operates in the saturation region without the need to apply a bias voltage, but in a band gap reference reference voltage source, M
Since the four OS transistors and the Paibov transistor for temperature compensation are connected in series, the threshold value increases and the transistors do not operate at a power supply voltage of 5V. The current circuit q) can operate the transistor in the saturation region even at a power supply voltage of 5 V if an appropriate bias voltage is applied.

The current mirror constituted by the pf cylinder transistors (M7a) to (M8b) is the same as in the above embodiment! This is a replacement of the lIf transistor with a pf'' Yanel transistor.rJf Yanel transistor (Mla)
~ (M2b), the sources of the transistors (Mla) and (Mlb) are not connected to the GND power supply, and a constant voltage V7. V8 becomes the source voltage, and since the sizes of these two transistors are equal, V7 and v8 have the same potential. In the bias voltage generation circuit (2), transistors (M12a) to (M12
d) becomes a current mirror, υ, and if it is made into four transistors, their drain voltage v9 ~
V12 has the same potential, so if you choose the transistor size so that it is equal to V7, you can create a transistor (MIJl).
), (uxb), (M3), (M4) source voltage V
7 to v10 are at the same potential, producing the same effect as the above embodiment. [Effects of the Invention] As described above, according to the present invention, a bias voltage generation circuit with a limited transistor size ratio is provided. Therefore, even if there are fluctuations in the power supply voltage and threshold voltage, the transistors constituting the current mirror circuit can be kept in the saturation region, resulting in the effect of faithfully mirroring the current.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a differential amplifier according to one embodiment of the present invention, Fig. 2 is a circuit diagram of a band gap reference reference voltage source showing another embodiment of the invention, and Fig. 3 is a circuit diagram of a conventional differential amplifier. FIG. 2 is a circuit diagram of a differential amplifier. (1) Current mirror circuit, c2) is bias voltage generation circuit, <3) is differential amplifier, (4) is band gap reference reference voltage source, (Mla) to (M4) and (
Mlla) ~ (Mla) is r1f yane ρtotsunzista,
(M5a) - (MIO are p-channel transistors, (B1) - (B3) are pnp) fungistors. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa

J procedural amendment (voluntary) Showa year, month, day 2, name of the invention Current mirror circuit 3, relationship to the case of the person making the amendment Patent applicant address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Mitsubishi Electric Corporation Representative: Moriya Shiki 4, Agent Address: 2-2-3-5 Marunouchi, Chiyoda-ku, Tokyo
, the scope of claims, detailed description of the invention, and drawings of the specification to be amended. 6. Contents of amendment (1) The scope of claims is amended as shown in the attached sheet. (2) On page 6, line 9 of the specification, the following is corrected to: (3) On page 7, line 8 of the specification, the following is corrected to: (4) On page 7, line 20 of the specification, Mla:Vr-Vlht<Vs
-■ means old, a :V 1-Vklil (Vl
−Correct to ■■. (5) In the first line of page 8 of the specification, 142a: V2-V3-Vlh2(V
l) < V r−V 3
-■, M2R:V2-v3-vth2(v3)<vl-Vl
−Correct to ■■. . (6) In the second line of page 8 of the specification, [Shiki(monovoltage ゛v・
1・It2 is corrected to [threshold voltage vzhz]. (7) On page 8, line 4 of the specification, vlh2(v:+)=vnu+Ding (νl)5[Ding7"
1r co-v'ri7) -(,3), vbz(v3)=vch++r(lri7vr-V fortune u)
- Correct (3). (8) On page 8, line 11 of the specification, 2V knee 2V-14u toy+11z (V:+)<
Vz < Vl4-Vlh2(Vl) (a
It says, 2V1-2V ・hl +Vthz (v3) < V2
< Correct to Vt4-VD112 (V:5)-QD. (On page 8, line 17 of the 9th specification, S s (V r-V-1(1s2=S'(v2-V4
hl)2, S3(Vl-Vht)2=S4 (V2-vt11
+) Correct to 2. On page 8, line 20 of the OQ specification, V 2 ;■W old” 5 (V r V + k
1') -〇, V 2 =vt h' +5 (V'Vt1i'
) −Correct to ■■. On page 9, line 3 of the θp specification, the following is corrected to: (2) Vl, Vl, V on page 10, line 2 of the specification
Vl, Vl, V
tbz is corrected to 'Itt It 1'. Figure @2 in the 01 drawing is corrected as shown in the attached sheet. 7. List of attached documents (1) One document stating the corrected claims (2) One or more corrected drawings (Figure 2) Claims First first conductive device with constant source voltage As a circuit for generating a bias voltage to be applied to the gate of a second transistor in a current mirror circuit in which the gate of the first transistor is connected to the drain of a second transistor of the first conductivity type connected in series with the transistor. , the same LS
The gate of a third transistor of the first conductivity type connected to the side mirrors the current of another current mirror consisting of two transistors of the second conductivity type, the source of which is connected to the power supply, the gate and drain of a fourth first conductivity type transistor connected to the side where the current is mirrored; the gate and drain of a fourth transistor of the first conductivity type connected to the gate of the second transistor; A current mirror circuit comprising a bias voltage generating circuit, the source of which is at the same potential as the source of the first transistor, and the size ratio of the third and fourth transistors is limited within the following range. Transistor size is the ratio of channel length to channel width, and assuming the size of the third transistor is 83 and the size of the fourth transistor is 84, V+b+(Vs) V+
hz (Vl,)-V+h+1+-<<2+□ v, -v ten, vl-v+h
. However, ■ is the gate voltage of the first transistor, v+
h, is the threshold voltage of the first, third, and fourth transistors, and v+h2 is the threshold voltage of the second transistor, which is a function of the source voltage v3 of this transistor,
The first and second transistors are the same size, and the two transistors of the second conductivity type are also the same size.

Claims (1)

[Scope of Claims] A current mirror in which the gate of the first transistor is connected to the drain of a second first conductivity type transistor connected in series to the first first conductivity type transistor whose source voltage is constant. In the circuit, the same LS is used as a bias voltage generation circuit to be applied to the gate of the second transistor.
I, the gate of a third transistor of the first conductivity type connected to the side that mirrors the current of another current mirror consisting of two transistors of the second conductivity type, the source of which is connected to the power supply; connected to the gate of the transistor,
The gate and drain of a fourth first conductive voltage transistor connected to the side on which the current is mirrored are connected to the gate of said second transistor, and the sources of the third and fourth transistors are connected to said first transistor. A current mirror circuit including a bias voltage generating circuit that has the same potential as the source of the transistor and limits the size ratio of the third and fourth transistors to within the following range. Transistor size is the ratio of channel length to channel width, and the size of the third transistor is S3 and the size of the fourth transistor is S4. ▲There are mathematical formulas, chemical formulas, tables, etc.▼ However, V1 is the ratio of the first transistor. Gate voltage, V+
h1 is the threshold voltage of the first, third, and fourth transistors, and V+h2 is the threshold voltage of the second transistor, which is a function of the source voltage V3 of this transistor. are the same size, and the two transistors of the second conductivity type are also the same size.