TWI484316B - Voltage generator and bandgap reference circuit - Google Patents
Voltage generator and bandgap reference circuit Download PDFInfo
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Description
本發明係指一種電壓產生器及能帶隙參考(bandgap reference)電路,尤指一種具有較小佈局面積並適於實現高精確度參考電壓的電壓產生器及能帶隙參考電路。The present invention relates to a voltage generator and a bandgap reference circuit, and more particularly to a voltage generator and a bandgap reference circuit having a small layout area and suitable for implementing a high-accuracy reference voltage.
類比電路應用中常使用不受溫度變化影響的穩定參考電壓源或電流源,來提供一參考電壓或參考電流,以利監督電源或是其他電路之操作正確性,而能帶隙參考電路(Bandgap Reference Circuit)即為此類電路。簡單來說,能帶隙參考電路係將一正溫度係數(proportional to absolute temperature,PTAT)的電流/電壓與一負溫度係數(complementary to absolute temperature,CTAT)的電流/電壓以適當比例混合相加,將正溫度係數與負溫度係數相互抵銷後,產生一零溫度係數的電流/電壓。Analogous circuit applications often use a stable reference voltage source or current source that is unaffected by temperature changes to provide a reference or reference current to monitor the correct operation of the power supply or other circuits, and a bandgap reference circuit (Bandgap Reference) Circuit) is such a circuit. Briefly, the bandgap reference circuit mixes a positive to absolute temperature (PTAT) current/voltage with a negative to absolute temperature (CTAT) current/voltage in an appropriate ratio. After the positive temperature coefficient and the negative temperature coefficient are offset each other, a zero temperature coefficient current/voltage is generated.
詳細來說,請參考第1圖,第1圖為習知技術中一能帶隙參考電路10之示意圖。能帶隙參考電路10包含有一運算放大器100、雙載子電晶體Q1、Q2及電阻R1~R3。如第1圖所示,在能帶隙參考電路10中,運算放大器100之正負輸入端輸入電壓VX與VY相等(VX=VY=VEB1,VEB1為雙載子電晶體Q1的基射極電壓),透過電壓VY與VZ(即VEB2)的電壓差(即VY-VZ)及電阻R3,
可產生一正溫度係數電流Iptat,如式(1)所示:
由於雙載子電晶體Q2的基射極電壓VEB2具有負溫度係數,Vout代表能帶隙參考電路10於其輸出端所輸出之能帶隙參考電壓,如式(2)所示:
然而,習知能帶隙參考電路係使用雙載子電晶體來做溫度補償,通常需使用較高的電源電壓且所產生的參考電壓亦較大,因而導致較高的靜態功率損耗而無法有效應用於較低供應電壓的環境中,同時,使用雙載子電晶體的電路也大大的增加佈局面積。因此, 業者提出以互補式金氧半電晶體(complementary metal oxide semiconductor,CMOS)做溫度補償的能帶隙參考電路,然而此電路所產生之負溫度係數電壓隨製程變化較大,所產生的零溫度係數電壓精確度也會隨之變低,如此一來,亦不利於使用。有鑑於此,習知技術實有改進之必要。However, the conventional bandgap reference circuit uses a bipolar transistor for temperature compensation, usually requires a higher power supply voltage and a larger reference voltage, resulting in higher static power loss and cannot be effectively applied. In a lower supply voltage environment, at the same time, the circuit using the dual carrier transistor also greatly increases the layout area. therefore, The industry proposes a complementary band gap reference circuit with a complementary metal oxide semiconductor (CMOS) for temperature compensation. However, the negative temperature coefficient voltage generated by this circuit varies greatly with the process, and the zero temperature coefficient is generated. The voltage accuracy will also become lower, which is not conducive to use. In view of this, the prior art has been improved.
因此,本發明之主要目的即在於提供一種電壓產生器及能帶隙參考電路。Accordingly, it is a primary object of the present invention to provide a voltage generator and a bandgap reference circuit.
本發明揭露一種電壓產生器,包含有一第一電晶體、一第二電晶體、一運算放大器、一電容、一第三電晶體、一第四電晶體及一第一電阻。該第一電晶體包含有一第一端耦接於一電壓源,及一第二端耦接於一第三端;該第二電晶體包含有一第一端耦接於該電壓源,及一第二端耦接於一第三端;該運算放大器包含有一第一輸入端耦接於該第一電晶體之該第二端及該第三端,一第二輸入端耦接於該第二電晶體之該第二端及該第三端,及一輸出端;該電容包含有一第一端耦接於該運算放大器之該輸出端,以及一第二端耦接於一地端;該第三電晶體包含有一第一端耦接於該第一電晶體之該第三端,一第二端耦接於該運算放大器之該輸出端與該電容之該第一端,及一第三端;該第四電晶體包含有一第一端耦接於該第二電晶體之該第三端,一第二端耦接於該運算放大器之該輸出端與該電容之該第一端,及一第三端耦接於該地端;以及該第一電阻耦接於該 第三電晶體之該第三端與該地端之間,用來根據該第三電晶體之閘源極電壓及該第四電晶體之閘源極電壓之電壓差,產生一負溫度係數電壓。The invention discloses a voltage generator comprising a first transistor, a second transistor, an operational amplifier, a capacitor, a third transistor, a fourth transistor and a first resistor. The first transistor includes a first end coupled to a voltage source, and a second end coupled to the third end; the second transistor includes a first end coupled to the voltage source, and a first The second end is coupled to the third end; the operational amplifier includes a first input coupled to the second end and the third end of the first transistor, and a second input coupled to the second The second end of the crystal and the third end, and an output end; the capacitor includes a first end coupled to the output end of the operational amplifier, and a second end coupled to a ground end; the third end The transistor includes a first end coupled to the third end of the first transistor, a second end coupled to the output end of the operational amplifier and the first end of the capacitor, and a third end; The fourth transistor includes a first end coupled to the third end of the second transistor, a second end coupled to the output end of the operational amplifier and the first end of the capacitor, and a first end The three ends are coupled to the ground end; and the first resistor is coupled to the ground Between the third end of the third transistor and the ground end, a negative temperature coefficient voltage is generated according to a voltage difference between a gate source voltage of the third transistor and a gate source voltage of the fourth transistor .
本發明另揭露一種能帶隙參考電路,包含有一正溫度係數電流源、一負溫度係數電壓產生器及一零溫度係數電壓產生器。該正溫度係數電流源用來產生一正溫度係數電流;該負溫度係數電壓產生器包含有一第一電晶體、一第二電晶體、一運算放大器、一電容、一第三電晶體、一第四電晶體及一第一電阻。該第一電晶體包含有一第一端耦接於一電壓源,及一第二端耦接於一第三端;該第二電晶體包含有一第一端耦接於該電壓源,及一第二端耦接於一第三端;該運算放大器包含有一第一輸入端耦接於該第一電晶體之該第二端及該第三端,一第二輸入端耦接於該第二電晶體之該第二端及該第三端,及一輸出端;該電容包含有一第一端耦接於該運算放大器之該輸出端,以及一第二端耦接於一地端;該第三電晶體包含有一第一端耦接於該第一電晶體之該第三端,一第二端耦接於該運算放大器之該輸出端與該電容之該第一端,及一第三端;該第四電晶體包含有一第一端耦接於該第二電晶體之該第三端,一第二端耦接於該運算放大器之該輸出端與該電容之該第一端,及一第三端耦接於該地端;以及該第一電阻耦接於該第三電晶體之該第三端與該地端之間,用來根據該第三電晶體之閘源極電壓及該第四電晶體之閘源極電壓之電壓差,產生一負溫度係數電壓;以及該零溫度係數電壓產生器耦接於該正溫度係數電流源與該負溫度係數電壓產生器之 間,用來加總一正溫度係數電壓及一負溫度係數電壓,以產生一零溫度係數電壓。The invention further discloses an energy bandgap reference circuit comprising a positive temperature coefficient current source, a negative temperature coefficient voltage generator and a zero temperature coefficient voltage generator. The positive temperature coefficient current source is used to generate a positive temperature coefficient current; the negative temperature coefficient voltage generator comprises a first transistor, a second transistor, an operational amplifier, a capacitor, a third transistor, and a first Four transistors and a first resistor. The first transistor includes a first end coupled to a voltage source, and a second end coupled to the third end; the second transistor includes a first end coupled to the voltage source, and a first The second end is coupled to the third end; the operational amplifier includes a first input coupled to the second end and the third end of the first transistor, and a second input coupled to the second The second end of the crystal and the third end, and an output end; the capacitor includes a first end coupled to the output end of the operational amplifier, and a second end coupled to a ground end; the third end The transistor includes a first end coupled to the third end of the first transistor, a second end coupled to the output end of the operational amplifier and the first end of the capacitor, and a third end; The fourth transistor includes a first end coupled to the third end of the second transistor, a second end coupled to the output end of the operational amplifier and the first end of the capacitor, and a first end The third end is coupled to the ground end; and the first resistor is coupled between the third end of the third transistor and the ground end, and is used Generating a negative temperature coefficient voltage according to a voltage difference between a gate source voltage of the third transistor and a gate source voltage of the fourth transistor; and the zero temperature coefficient voltage generator is coupled to the positive temperature coefficient current source With the negative temperature coefficient voltage generator In between, it is used to add a positive temperature coefficient voltage and a negative temperature coefficient voltage to generate a zero temperature coefficient voltage.
請參考第2A圖,第2A圖為本發明實施例一負溫度係數(complementary to absolute temperature,CTAT)電壓產生器20之示意圖。負溫度係數電壓產生器20包含有電晶體M1~M4、一運算放大器200、一電容C及一電阻R4。如第2A圖所示,運算放大器200包含有一輸入端耦接於電晶體M1及另一輸入端耦接於電晶體M2。運算放大器200用來根據其輸入端所接收的訊號,產生一控制訊號,以控制電晶體M3、M4的操作。電容C耦接於運算放大器200之輸出端及一地端之間。電晶體M3耦接於電晶體M1及運算放大器200之輸出端,電晶體M4耦接於電晶體M2、運算放大器200之輸出端及地端。其中,電晶體M3、M4為N型金氧半場效電晶體。電阻R4耦接於電晶體M3與地端之間,用來根據電晶體M3、M4之閘源極電壓的電壓差,產生負溫度係數電壓。舉例來說,如第2A圖所示,電阻R4之兩端電壓差VR4 等於電晶體M3之閘源極電壓及電晶體M4之閘源極電壓的電壓差。電阻R4之兩端電壓差VR4 即為負溫度係數電壓。Please refer to FIG. 2A. FIG. 2A is a schematic diagram of a complementary to absolute temperature (CTAT) voltage generator 20 according to an embodiment of the present invention. The negative temperature coefficient voltage generator 20 includes transistors M1 to M4, an operational amplifier 200, a capacitor C, and a resistor R4. As shown in FIG. 2A, the operational amplifier 200 includes an input coupled to the transistor M1 and another input coupled to the transistor M2. The operational amplifier 200 is configured to generate a control signal based on the signal received at its input to control the operation of the transistors M3, M4. The capacitor C is coupled between the output end of the operational amplifier 200 and a ground terminal. The transistor M3 is coupled to the output of the transistor M1 and the operational amplifier 200. The transistor M4 is coupled to the output of the transistor M2 and the operational amplifier 200 and the ground. Among them, the transistors M3 and M4 are N-type gold oxide half field effect transistors. The resistor R4 is coupled between the transistor M3 and the ground for generating a negative temperature coefficient voltage according to a voltage difference between the gate and source voltages of the transistors M3 and M4. For example, as shown in FIG. 2A, the voltage difference V R4 across the resistor R4 is equal to the voltage difference between the gate source voltage of the transistor M3 and the gate source voltage of the transistor M4. The voltage difference V R4 across the resistor R4 is the negative temperature coefficient voltage.
簡單來說,本發明之負溫度係數電壓產生器20可根據電晶體M3、M4的閘源極電壓差,來產生能帶隙參考電路所需的負溫度係數電壓。也就是說,負溫度係數電壓產生器20不需使用雙載子電晶 體,即可產生高精確度的負溫度係數電壓,同時使電路佈局面積大幅降低。Briefly, the negative temperature coefficient voltage generator 20 of the present invention can generate the negative temperature coefficient voltage required for the bandgap reference circuit based on the gate-to-source voltage difference of the transistors M3, M4. That is to say, the negative temperature coefficient voltage generator 20 does not need to use the double carrier electron crystal The body can produce a high-precision negative temperature coefficient voltage while greatly reducing the circuit layout area.
詳細來說,電晶體M1耦接於運算放大器200之一輸入端,而電晶體M2耦接於運算放大器200之另一輸入端,藉此,運算放大器200可根據電晶體M1、M2所輸入的訊號,產生控制訊號,以控制電晶體M3、M4操作於次臨界區。較佳地,電晶體M3、M4係不同類型的金氧半場效電晶體,如此一來,電晶體M3的臨界電壓不同於電晶體M4的臨界電壓。進一步說明,當電晶體M3、M4具不同臨界電壓且同時操作於次臨界區時,根據電晶體的電流-電壓(I-V)特性可知,此時電晶體M3、M4的閘源極電壓差實質上會等於電晶體M3、M4的臨界電壓差。以下將藉由運算式(3)、(4)逐步說明。當電晶體M3、M4操作於次臨界區且電晶體M3、M4的汲源極電壓大於四倍的熱電壓VT
時,電晶體M3、M4的電流-電壓特性分別如式(3)所示:
其中,ID_M3
、ID_M4
分別為電晶體M3、M4的汲極電流,μ為溝槽電子遷移率,VGS_M3
、VGS_M4
分別為電晶體M3、M4的閘源極電壓,Vth_M3
、Vth_M4
分別為電晶體M3、M4的臨界電壓,m為次臨
界區斜率因數,W/L為電晶體的寬長比。當ID_M3
=ID_M4
,且(W/L)3
=(W/L)4
時,運算式(3)可表示為下列運算式(4):
換言之,由式(4)可知,在電晶體M3、M4操作於次臨界區且電晶體M3、M4的汲源極電壓大於四倍的熱電壓VT 的情況下,電晶體M3的閘源極電壓與電晶體M4的閘源極電壓的電壓差會等於電晶體M3的臨界電壓與電晶體M4的臨界電壓的電壓差。In other words, it can be seen from equation (4) that in the case where the transistors M3, M4 operate in the subcritical region and the threshold voltage of the transistors M3, M4 is greater than four times the thermal voltage V T , the gate source of the transistor M3 The voltage difference between the voltage and the gate-to-source voltage of the transistor M4 may be equal to the voltage difference between the threshold voltage of the transistor M3 and the threshold voltage of the transistor M4.
再者,如第2A圖所示,電阻R4之兩端電壓差VR4 為電晶體M3之閘源極電壓及電晶體M4之閘源極電壓之電壓差。因此結合式(4)的關係可知,電阻R4之兩端電壓差VR4 即等於電晶體M3的臨界電壓與電晶體M4的臨界電壓的電壓差。電晶體M3、M4的臨界電壓為負溫度係數電壓,因此電阻R4之兩端電壓差VR4 亦為負溫度係數電壓,進而通過電阻R4的電流為負溫度係數電流Ictat’。簡言之,在相同環境下,不同類型的電晶體會有不同的臨界電壓與溫度係數。本發明利用了不同類型的電晶體來實現電晶體M3、M4,進而能產生隨製程變化較小的負溫度係數電壓。也就是說,本發明之負溫度係數電壓產生器20根據操作於次臨界區之電晶體M3、M4的臨界電壓差,將可產生高精確度的負溫度係數電壓。Furthermore, as shown in FIG. 2A, the voltage difference V R4 across the resistor R4 is the voltage difference between the gate-source voltage of the transistor M3 and the gate-source voltage of the transistor M4. Therefore, it can be seen from the relationship of the formula (4) that the voltage difference V R4 across the resistor R4 is equal to the voltage difference between the threshold voltage of the transistor M3 and the threshold voltage of the transistor M4. The threshold voltage of the transistors M3 and M4 is a negative temperature coefficient voltage. Therefore, the voltage difference V R4 across the resistor R4 is also a negative temperature coefficient voltage, and the current passing through the resistor R4 is a negative temperature coefficient current Ictat'. In short, different types of transistors have different threshold voltages and temperature coefficients in the same environment. The present invention utilizes different types of transistors to implement the transistors M3, M4, which in turn produces a negative temperature coefficient voltage that varies less with process. That is, the negative temperature coefficient voltage generator 20 of the present invention will produce a high accuracy negative temperature coefficient voltage based on the threshold voltage difference of the transistors M3, M4 operating in the subcritical region.
請參考第2B圖,第2B圖為本發明實施例第2A圖中負溫度係數電壓產生器20於不同溫度及製程之負溫度係數電壓比較圖。其中,TT、FF及SS為本領域具通常知識者所熟知之不同製程環境,於此不贅述。由第2B圖可知,根據操作於次臨界區之電晶體M3、M4的臨界電壓差,產生負溫度係數電壓,負溫度係數電壓產生器20確實可達到高精確度要求,更重要的是,可滿足電路應用的空間限制。Please refer to FIG. 2B. FIG. 2B is a comparison diagram of negative temperature coefficient voltages of the negative temperature coefficient voltage generator 20 at different temperatures and processes according to the second embodiment of the present invention. Among them, TT, FF and SS are different process environments well known to those skilled in the art, and will not be described here. It can be seen from FIG. 2B that the negative temperature coefficient voltage is generated according to the threshold voltage difference of the transistors M3 and M4 operating in the subcritical region, and the negative temperature coefficient voltage generator 20 can indeed achieve high accuracy requirements, and more importantly, Meet the space constraints of circuit applications.
值得注意的是,本發明之主要精神在於利用電晶體M3、M4的臨界電壓差產生負溫度係數電壓,以達到高精確度要求。其中,電晶體M3、M4係不同類型的N型金氧半場效電晶體,舉例來說,電晶體M4的臨界電壓(如442 mV)高於電晶體M3的臨界電壓(如340 mV),且電晶體M3、M4具有不同的溫度係數。此外,電晶體M1、M2為P型金氧半場效電晶體,而運算放大器200可由不同電晶體組合而成。舉例來說,運算放大器200可包含P型金氧半場效電晶體及N型金氧半場效電晶體。由上述可知,本發明之負溫度係數電壓產生器之電路結構主要係由金氧半場效電晶體及電阻所組成而且電晶體M3、M4是操作在次臨界區,藉此,負溫度係數電壓產生器所需電源電壓VCC較低(可低至1V),進而能有效降低功率損耗。It is worth noting that the main spirit of the present invention is to generate a negative temperature coefficient voltage by using the threshold voltage difference of the transistors M3 and M4 to achieve high accuracy requirements. Among them, the transistors M3 and M4 are different types of N-type gold oxide half field effect transistors, for example, the threshold voltage of the transistor M4 (such as 442 mV) is higher than the threshold voltage of the transistor M3 (such as 340 mV), and The transistors M3, M4 have different temperature coefficients. Further, the transistors M1, M2 are P-type gold oxide half field effect transistors, and the operational amplifier 200 can be composed of different transistors. For example, the operational amplifier 200 can include a P-type MOS field effect transistor and an N-type MOS field effect transistor. It can be seen from the above that the circuit structure of the negative temperature coefficient voltage generator of the present invention is mainly composed of a gold oxide half field effect transistor and a resistor and the transistors M3 and M4 are operated in the subcritical region, whereby the negative temperature coefficient voltage is generated. The required supply voltage VCC is low (down to 1V), which in turn reduces power loss.
另一方面,本發明之負溫度係數電壓產生器20可適用於產生零溫度係數(zero temperature correlated,zero-TC)電壓的電路。舉例 來說,請參考第3A圖,第3A圖為本發明實施例一能帶隙參考(bandgap reference)電路30之示意圖。能帶隙參考電路30包含有一正溫度係數電流源300、一負溫度係數電壓產生器302及一零溫度係數電壓產生器304。正溫度係數電流源300用來產生正溫度係數電流Iptat’。負溫度係數電壓產生器302用來產生負溫度係數電壓,並根據負溫度係數電壓,產生負溫度係數電流Ictat’。其中,負溫度係數電壓產生器302產生負溫度係數電壓之方法與負溫度係數電壓產生器20大致相似,於此不再贅述。此外,負溫度係數電壓產生器302之架構與負溫度係數電壓產生器20相似,故相同元件沿用相同符號。負溫度係數電壓產生器302與負溫度係數電壓產生器20不同之處在於負溫度係數電壓產生器302以一運算放大器306取代運算放大器200。運算放大器306為運算放大器200之一實施例結構圖,但不限於此。零溫度係數電壓產生器304耦接於正溫度係數電流源304與負溫度係數電壓產生器302之間,用來根據正溫度係數電流Iptat’及負溫度係數電壓,以產生一零溫度係數參考電壓Vref。在此情況下,能帶隙參考電路30根據正溫度係數電流源304所產生之正溫度係數電流Iptat’及負溫度係數電壓產生器302所產生之負溫度係數電流Ictat’,即可產生高精確度的零溫度係數電壓,相較於習知技術使用雙載子電晶體來做溫度補償的能帶隙參考電路,本發明可使佈局面積有效減小,同時降低電源電壓VCC,達到低功率損耗。值得注意的是,第3A圖之能帶隙參考電路30僅為本發明之一舉例說明,本領域具通常知識者當可依本發明之精神加以修飾或變化,而不限於此。On the other hand, the negative temperature coefficient voltage generator 20 of the present invention can be applied to a circuit that generates a zero temperature (zero-temperature) voltage. Example For example, please refer to FIG. 3A. FIG. 3A is a schematic diagram of a bandgap reference circuit 30 according to an embodiment of the present invention. The bandgap reference circuit 30 includes a positive temperature coefficient current source 300, a negative temperature coefficient voltage generator 302, and a zero temperature coefficient voltage generator 304. The positive temperature coefficient current source 300 is used to generate a positive temperature coefficient current Iptat'. The negative temperature coefficient voltage generator 302 is used to generate a negative temperature coefficient voltage and generate a negative temperature coefficient current Ictat' based on the negative temperature coefficient voltage. The method in which the negative temperature coefficient voltage generator 302 generates the negative temperature coefficient voltage is substantially similar to the negative temperature coefficient voltage generator 20, and details are not described herein again. Further, the structure of the negative temperature coefficient voltage generator 302 is similar to that of the negative temperature coefficient voltage generator 20, so the same elements follow the same symbols. The negative temperature coefficient voltage generator 302 differs from the negative temperature coefficient voltage generator 20 in that the negative temperature coefficient voltage generator 302 replaces the operational amplifier 200 with an operational amplifier 306. The operational amplifier 306 is a structural diagram of an embodiment of the operational amplifier 200, but is not limited thereto. The zero temperature coefficient voltage generator 304 is coupled between the positive temperature coefficient current source 304 and the negative temperature coefficient voltage generator 302 for generating a zero temperature coefficient reference voltage according to the positive temperature coefficient current Iptat' and the negative temperature coefficient voltage. Vref. In this case, the bandgap reference circuit 30 can generate high accuracy based on the positive temperature coefficient current Iptat' generated by the positive temperature coefficient current source 304 and the negative temperature coefficient current Ictat' generated by the negative temperature coefficient voltage generator 302. The zero temperature coefficient voltage of the degree is compared with the conventional band gap reference circuit using the bipolar transistor for temperature compensation. The invention can effectively reduce the layout area and reduce the power supply voltage VCC to achieve low power loss. . It is to be noted that the band gap reference circuit 30 of FIG. 3A is merely illustrative of one of the present invention, and those skilled in the art can modify or change the present invention without departing from the scope of the present invention.
進一步地,以下將藉由電流、電壓分析以逐步說明能帶隙參考電路30的運作方式。零溫度係數電壓產生器304包含有一電流鏡M9及電阻R5、R6。如第3A圖所示,負溫度係數電壓產生器302之電阻R4的兩端電壓差為負溫度係數電壓,通過的電流為負溫度係數電流Ictat’。電流鏡M9用來複製負溫度係數電壓產生器302所產生的負溫度係數電流Ictat’。電阻R5耦接於電流鏡M9,而電阻R6耦接於電阻R5、正溫度係數電流源300及地端,用來產生正溫度係數電壓。如此一來,當零溫度係數電壓產生器304接收到電流鏡M9所複製的負溫度係數電流Ictat’及正溫度係數電流源300所產生的正溫度係數電流Iptat’時,可根據正溫度係數電流Iptat’所產生的正溫度係數電壓與根據負溫度係數電流Ictat’所產生的負溫度係數電壓,產生零溫度係數電壓Vref,如式(5)所示:
其中,KP 係正溫度係數電流Iptat’的正溫度係數,KN 係負溫度係數電流Ictat’的負溫度係數。因此,適當調整電阻R5、R6,來滿 足式(5),即可得到零溫度係數電壓Vref。因此,利用本發明之架構不需使用雙載子電晶體,即可產生高精確度的零溫度係數電壓,因而可有效減小佈局面積與降低功率損耗。此外,本發明藉由不同類型且同時操作於次臨界區的電晶體操作,更能實現不受溫度影響的高精確度電壓輸出。Among them, K P is the positive temperature coefficient of the positive temperature coefficient current Iptat', and the negative temperature coefficient of the K N system negative temperature coefficient current Ictat'. Therefore, by appropriately adjusting the resistors R5 and R6 to satisfy the equation (5), the zero temperature coefficient voltage Vref can be obtained. Therefore, the structure of the present invention can generate a high-accuracy zero temperature coefficient voltage without using a double carrier transistor, thereby effectively reducing the layout area and reducing the power loss. In addition, the present invention can achieve a high-accuracy voltage output that is not affected by temperature by different types of transistors operating simultaneously in the sub-critical region.
請參考第3B圖,第3B圖為本發明實施例第3A圖中能帶隙參考電路30於不同溫度及製程之零溫度係數電壓Vref比較圖。其中,TT、FF及SS為本領域具通常知識者所熟知之不同製程,於此不贅述。如第3B圖所示,當溫度由-40度上升至125度時,相同製程之零溫度係數電壓(如第3B圖所示之零溫度係數電壓曲線Vref_tt)隨溫度變化不大,而不同製程環境下之複數個零溫度係數電壓(如第3B圖所示之零溫度係數電壓曲線Vref_ff、Vref_tt及Vref_ff)彼此間變化亦不大,也就是說,零溫度係數電壓隨溫度變化及製程變化影響不大。因此,能帶隙參考電路30可於溫度變化及製程變化下,對零溫度係數電壓Vref進行穩壓,進而產生高精確度的零溫度係數電壓。Please refer to FIG. 3B. FIG. 3B is a comparison diagram of the zero temperature coefficient voltage Vref of the bandgap reference circuit 30 at different temperatures and processes according to the third embodiment of the present invention. Among them, TT, FF and SS are different processes well known to those skilled in the art, and will not be described here. As shown in Figure 3B, when the temperature rises from -40 degrees to 125 degrees, the zero temperature coefficient voltage of the same process (such as the zero temperature coefficient voltage curve Vref_tt shown in Figure 3B) does not change much with temperature, but different processes The multiple zero temperature coefficient voltages in the environment (such as the zero temperature coefficient voltage curves Vref_ff, Vref_tt and Vref_ff shown in Figure 3B) do not change much from each other, that is, the zero temperature coefficient voltage changes with temperature and process variation. Not big. Therefore, the bandgap reference circuit 30 can regulate the zero temperature coefficient voltage Vref under temperature variation and process variation, thereby generating a high-accuracy zero temperature coefficient voltage.
值得注意的是,第3A圖為本發明之一舉例說明,但不限於此,只要能達到其效果即可。舉例來說,電流鏡M9較佳地為P型金氧半場效電晶體,主要用以複製負溫度係數電流,但不限於此。正溫度係數電流源300也可由其他組件組合而成,以產生正溫度係數電流。除此之外,電阻R4、R5、R6的電阻值亦可依不同實施例加以 調整,以符合式(5)的條件,進而獲得所需的零溫度係數電壓。It is to be noted that FIG. 3A is an illustration of the present invention, but is not limited thereto as long as the effect can be achieved. For example, the current mirror M9 is preferably a P-type gold-oxygen half field effect transistor, mainly for replicating a negative temperature coefficient current, but is not limited thereto. The positive temperature coefficient current source 300 can also be combined with other components to produce a positive temperature coefficient current. In addition, the resistance values of the resistors R4, R5, and R6 can also be different according to different embodiments. Adjust to meet the conditions of equation (5) to obtain the desired zero temperature coefficient voltage.
綜上所述,習知使用雙載子電晶體的負溫度係數電壓產生器需使用較高的電源電壓,且所產生的參考電壓通常較大,導致無法有效應用於較低供應電壓的環境中,並且也必須耗費大量功率與佈局面積。相較之下,本發明之負溫度係數電壓產生器不需使用雙載子電晶體,而且藉由操作於次臨界區且類型不同的金氧半場效電晶體之臨界電壓差,即可產生高精確度的負溫度係數電壓,如此一來,可使佈局面積有效減小並大幅降低功率損耗。同時,更能實現不受溫度影響的高精確度電壓輸出。In summary, it is known that a negative temperature coefficient voltage generator using a bipolar transistor needs to use a higher power supply voltage, and the generated reference voltage is usually large, resulting in an ineffective application in a lower supply voltage environment. And must also consume a lot of power and layout area. In contrast, the negative temperature coefficient voltage generator of the present invention does not require the use of a bipolar transistor, and can be generated by a threshold voltage difference of a gold oxide half field effect transistor operating in a subcritical region and of a different type. The accuracy of the negative temperature coefficient voltage, in this way, can effectively reduce the layout area and greatly reduce power loss. At the same time, it is possible to achieve a high-accuracy voltage output that is immune to temperature.
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
10、30‧‧‧能帶隙參考電路10, 30‧‧‧ Bandgap reference circuit
100、200、306‧‧‧運算放大器100, 200, 306‧‧‧Operational Amplifier
20、302‧‧‧負溫度係數電壓產生器20, 302‧‧‧Negative temperature coefficient voltage generator
300‧‧‧正溫度係數電流源300‧‧‧ positive temperature coefficient current source
304‧‧‧零溫度係數電壓產生器304‧‧‧zero temperature coefficient voltage generator
R1~R6‧‧‧電阻R1~R6‧‧‧ resistor
Q1、Q2‧‧‧雙載子電晶體Q1, Q2‧‧‧ double carrier transistor
VCC‧‧‧電源電壓VCC‧‧‧Power supply voltage
VX、VY、VZ、VR4 ‧‧‧電壓VX, VY, VZ, V R4 ‧‧‧ voltage
Vout‧‧‧能帶隙參考電壓Vout‧‧‧ Bandgap reference voltage
M1~M4‧‧‧金氧半電晶體M1~M4‧‧‧Gold Oxygen Semiconductor
C‧‧‧電容C‧‧‧ capacitor
Ictat’‧‧‧負溫度係數電流Ictat’‧‧‧Negative temperature coefficient current
Iptat、Iptat’‧‧‧正溫度係數電流Iptat, Iptat’‧‧‧ positive temperature coefficient current
Vref‧‧‧零溫度係數參考電壓Vref‧‧‧ zero temperature coefficient reference voltage
M9‧‧‧電流鏡M9‧‧‧current mirror
V_ff、V_tt、V_ss‧‧‧負溫度係數電壓曲線V_ff, V_tt, V_ss‧‧‧negative temperature coefficient voltage curve
Vref_ff、Vref_tt、Vref_ss‧‧‧零溫度係數電壓曲線Vref_ff, Vref_tt, Vref_ss‧‧‧ zero temperature coefficient voltage curve
第1圖為習知一能帶隙參考電路之示意圖。Figure 1 is a schematic diagram of a conventional bandgap reference circuit.
第2A圖為本發明實施例一負溫度係數電壓產生器之示意圖。2A is a schematic diagram of a negative temperature coefficient voltage generator according to an embodiment of the present invention.
第2B圖為本發明實施例第2A圖中負溫度係數電壓產生器於不同溫度及製程之負溫度係數電壓比較圖。FIG. 2B is a comparison diagram of the negative temperature coefficient voltages of the negative temperature coefficient voltage generators at different temperatures and processes according to the second embodiment of the present invention.
第3A圖為本發明實施例一能帶隙參考電路之示意圖。FIG. 3A is a schematic diagram of an energy band gap reference circuit according to an embodiment of the present invention.
第3B圖為本發明實施例第3A圖中能帶隙參考電路於不同溫度及製程之零溫度係數電壓比較圖。FIG. 3B is a comparison diagram of zero temperature coefficient voltages of the bandgap reference circuit at different temperatures and processes according to the third embodiment of the present invention.
20‧‧‧負溫度係數電壓產生器20‧‧‧Negative temperature coefficient voltage generator
200‧‧‧運算放大器200‧‧‧Operational Amplifier
M1~M4‧‧‧金氧半電晶體M1~M4‧‧‧Gold Oxygen Semiconductor
VCC‧‧‧電源電壓VCC‧‧‧Power supply voltage
VR4 ‧‧‧電壓V R4 ‧‧‧ voltage
R4‧‧‧電阻R4‧‧‧ resistance
C‧‧‧電容C‧‧‧ capacitor
Ictat’‧‧‧負溫度係數電流Ictat’‧‧‧Negative temperature coefficient current
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EP0301184B1 (en) * | 1987-07-13 | 1993-01-13 | International Business Machines Corporation | Cmos reference voltage generating device |
WO2001007977A1 (en) * | 1999-07-22 | 2001-02-01 | Burr-Brown Corporation | Method of curvature compensation, offset compensation, and capacitance trimming of a switched capacitor band gap reference |
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TW200925824A (en) * | 2007-12-05 | 2009-06-16 | Ind Tech Res Inst | Voltage generating apparatus |
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EP0301184B1 (en) * | 1987-07-13 | 1993-01-13 | International Business Machines Corporation | Cmos reference voltage generating device |
WO2001007977A1 (en) * | 1999-07-22 | 2001-02-01 | Burr-Brown Corporation | Method of curvature compensation, offset compensation, and capacitance trimming of a switched capacitor band gap reference |
US7382305B1 (en) * | 2007-02-26 | 2008-06-03 | Analog Devices, Inc. | Reference generators for enhanced signal converter accuracy |
TW200925824A (en) * | 2007-12-05 | 2009-06-16 | Ind Tech Res Inst | Voltage generating apparatus |
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