JPH01282965A - Image forming device - Google Patents

Abstract

PURPOSE:To obtain the output picture of satisfactory output stability by sharing the output patterns of right-side putting and left-side putting when multi-value processing is executed by pulse width modulation. CONSTITUTION:Latches 2-4 latch the picture data of three picture elements, which are successive in a main scanning direction, with synchronizing to a picture element clock and right and left picture data are compared by a comparator 7. Then, the direction of density grade if detected in the main scanning direction of an attention picture element. The output of this comparator 7 is inputted to a quinarization processor 8. The input picture data are converted to quinary output data by this processor 8 and at such a time, the right-side putting pattern of left-side pattern is selected according to a density grade signal form the comparator 7. The output of the quinarization processor 8 is outputted to a printer 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an image forming apparatus such as a printer capable of multi-value output using a pulse width modulation method.

[Prior art]

First, the background of the present invention will be described.

Recently, advances in printers have made it possible to modulate images at several levels, such as not only binary values (white or black) but also 3-value, 4-value, etc. Among these, laser printers using an electrophotographic process realize multivalue writing for one pixel by pulse width modulation that changes the lighting time of an elliptical beam within one pixel.

FIG. 11(a) shows the main scanning of the elliptical beam. Further, FIG. 2B shows the exposure energy distribution when the elliptical beam shown in FIG.

In the negative-positive development method, the portion where the exposure energy is higher than the visualization level thr is visualized to form a dot.

Figure 12 (al, (bl, (C), (dl, (
el, the exposure time is 0°1/4.2/4.3/4,1.
This shows how dots are formed when . In reality, the beam spot has a light energy distribution approximated by a Gaussian distribution in the main scanning and sub-scanning directions, so it is not an ideal rectangle. However, in the present invention, the exposure energy in the main scanning direction is is a problem, consideration of the distribution in the sub-scanning direction will be omitted.

Although FIG. 12 shows the state of dot formation within one pixel, the state of dot formation will be explained next taking into consideration adjacent pixels.

In FIG. 13, (1) is the pixel clock, (21, (
3) shows an image signal. In the example shown in the figure, the beam is turned on when the signal level (2) is H.

In the example shown in the figure, output level 1.
Dots are formed in the order of 1/4, and dots are formed in the order of output level 1/4.1 at pixel number 4.5. (
4) shows the exposure energy distribution at that time, and normally the part above the visualization level thr1 is blackened, and (
The output image shown in 5) is obtained. In this case, pixel 1.
In the set of pixels 2 and 4 and 5, dots with the same area ratio are formed.

However, if the beam power changes or the conditions related to the development process change, the difference between pixel 1°2 and pixel 4.5
The effect on the blackened area differs depending on the group. Figure 13 (4
) is assumed to be a case in which the visualization level increases due to changes in the above-mentioned process conditions, etc. in this case(
As shown in 6), dots are formed. In this example, the blackened area decreases as the visualization level increases, but the blackened area fluctuates near the boundary where exposure is turned on and off.

Here, exposure is turned on and off twice for pixels 1 and 2, and four times for pixels 4.5, and it can be seen that the variation in the blackened area is larger in the case of pixels 4 and 5.

Here, an increase in the visualization level was considered, but when the visualization level decreases, the blackened area increases, but the variation in the blackened area is still larger for pixel 4.5. In other words, it can be seen that during image formation, the fewer isolated minute dots are, the less affected by fluctuations in process conditions, etc., and a more stable image output can be obtained. Based on the actual image,
In the case of character images, lines are likely to become too thick, crushed, or faded, and in the case of gradation images created by dithering or the like, fluctuations in γ characteristics are likely to occur. Furthermore, in full-color images,
Variations in γ characteristics lead to variations in reproduced colors, which greatly affects image quality.

〔the purpose〕

The present invention has been made based on the above-mentioned background,
It is an object of the present invention to provide an image forming apparatus that can reduce the isolation of minute dots and stably obtain an output image.

〔composition〕

In the present invention, in order to achieve the above-mentioned object, as shown in FIG.
~ Left-aligned mid-level dot 1/ as shown in fhl
4L 2/4β, 3/411 and right-aligned intermediate level dots 1/4 r, 2/4 r,
Use 3/4r.

If the present invention is applied to the set of pixels 4 and 5 in FIG. 13, by using 1/4r for pixel 4, a dot with the same shape as 1+1/41 for pixels 1 and 2 can be formed, and the output The stability of the time is improved. In other words, when the pixel of interest outputs an intermediate level, select dots aligned to the left (1/l! to 3/4 l) or right aligned (1/4r to 3/4r) depending on the input or output level of the adjacent pixel. output and reduce the frequency of beam on/off.

The present invention will be described in detail below. In this embodiment, the density (or reflectance, brightness, etc.) gradient of the input image is detected and the blackened portion is brought closer to the higher density side.

FIG. 9 is a timing diagram, (11 indicates the pixel number. Also, (2) is the analog image signal when reading the character image. (3) is the average of the analog signal of (2) for each pixel. This is a digital signal obtained by quantizing the value.This is a simple 5-digit signal using slice levels thrl to thr4.
When converted into values, the output level of each pixel becomes as shown in (4). (5) is an output image when only left-justified dots are used according to the conventional method. (6) is an output image according to the present invention,
This is the result of shifting the blackened portion toward the higher density side according to the density gradient of the input image. In (6), it can be seen that the number of times the beam is turned on and off is reduced. (7) is a pixel clock.

10(a) and 10(b) are diagrams showing the correspondence between the output dot pattern shown in FIG. 8 and the 3-bit output value signal. However, the correspondence with the output signal is shown in FIG. 10(a).

(It is not limited to the BLO example, and can be arbitrarily determined.

FIG. 1 is a block diagram of an image processing section of an image forming apparatus according to an embodiment of the present invention.

In the figure, 1 is a scanner, 2, 3.4.5 is a latch,
6 is a gate, 7 is a comparator, 8 is a quinarization processor, 9
is a printer.

The latch 2.3.4 latches image data of three consecutive pixels in the main scanning direction in synchronization with the pixel clock. The data of the pixel of interest is latched in latch 3, and the left and right pixel data are latched in latch 4. It is latched by latch 2. A comparator 7 serving as a detection means for detecting the direction of the density gradient compares left and right pixel data and detects the direction of the density gradient in the main scanning direction of the pixel of interest. That is, the larger left and right pixel data corresponds to the direction of the density gradient (the direction in which the density becomes higher). The data of the pixel of interest and the output of the comparator 7 indicating the direction of the density gradient are input to the quinarization processor 8.
The 3-bit data shown in Figures (a) and (b) is output.

The second example of the quinarization processor 8 as a means for converting multivalued signals is shown in FIG.
As shown in the figure. The input image data consists of four slice levels t
hrl to thr4 are compared by comparators 7a to 7b, and the comparison results are converted to 3-bit 5-value output data from 0OOB to 100B by a priority encoder 10 ("B" in 000B, 100B, etc. is binary -;
Indicates that it is a binary number. However, the left side is MSB and the right side is L.
SB). For the intermediate level output value, a right-aligned or left-aligned pattern is selected according to the density gradient signal.

The output data of the priority encoder 10 matches the left-justified pattern data, and the 10th
As can be seen from the figure, by inverting the output value of each bit, it can be converted to right-justified pattern data.

However, since there is no distinction between right alignment and left alignment for 000B and IIIB, the inversion operation is not performed. The left alignment pattern data (A) and right alignment pattern data (B) are input to the selector 11, and outputs A when the density on the left side is higher and B otherwise. This 5-value processing is
By using ROM (or RAM), image data and density gradient signals can be used as address signals in a table-reference manner. Furthermore, it is also possible to prepare a plurality of sets of output results and use a select signal to select the table to be referred to, thereby making it possible to easily obtain processing data when changing the slice level.

Furthermore, by using the output of a counter that changes the select signal in synchronization with the pixel clock and/or the line synchronization signal, not only simple 5-value conversion but also 5-value conversion using dither processing can be realized.

By the way, when determining the dot pattern of the pixel of interest,
It is necessary to consider whether the left pixel is left-aligned or right-aligned.

If the pixel on the left side is a left-aligned dot pattern, even if the pixel of interest is aligned to the right, there will be a beam-off state in between, so the number of beam on/off operations cannot be reduced. Therefore, when the pixel on the left side has a left-aligned dot pattern, it is preferable to select the right-aligned dot pattern even if (pixel data on the right side) is smaller (pixel data on the left side).

In the example shown in FIG. 1, the latch 5 latches a left alignment flag indicating whether the left pixel is a left alignment dot pattern. The AND of this signal and the output of the latch 4 (left pixel data) is defined as left pixel data.

As a result, when the pixel on the left side is aligned to the left, the pixel of interest selects the right alignment pattern unless the pixel data on the right side is 0.

Next, another embodiment will be described based on the image processing circuit shown in FIG.

In the figure, the quinarization processor 8 converts 0 to 0 according to the input image value.
．． The output levels of 1/4.2/4.3/4.1 are output as binary numbers 000.001, 010°011.111, respectively.

In this case, the circuit on the left side of Fig. 2, that is, the comparator L/-
97; 1 to 7d, 7" priority encoder 10 can be used.Also, as mentioned above, it is also possible to use a ROM to perform quinarization processing in a table reference manner.Continuously in the main scanning direction The 5-value data for 4 pixels is latched in latches 2 to 5. However, the data of the pixel of interest is latched in latch 4, the one on the left is in latch 5, and the one on the right is in latch 3.
, the two adjacent ones on the right are latched by latch 2. In addition, the data of the pixel on the left side is a 5-value (3
bit) data.

Referring to the data of these four pixels, the pattern selector 12 outputs the output dot pattern data of the pixel of interest according to an algorithm described later. The pattern selector 12 is
4 pixel data 3 using ROM (or RAM)
This can be realized by storing data to be output from the pixel of interest determined by a predetermined algorithm at an address addressed by a signal of bit X4=12 bits.

FIG. 4 shows the arrangement of reference pixels. Pixel on the left.

The following explanation will be given assuming that the pixel numbers of the target pixel, the pixel on the right side, and the two pixels adjacent to the right side are -1, 0, 1, and 2, respectively.

Φ Dot pattern selection algorithm (the lower the number, the higher the priority) (1) When the 0 pixel is 0 or 1, there is no distinction between right alignment and left alignment, so 000.111 is output for each.

(When the pixel 21-1 is aligned to the right, the pixel 0 is aligned to the left.

(3) When the -1 pixel is left-aligned, the 0 pixel is right-aligned.

(4) When a 1 pixel is 0, the 0 pixel is left-aligned.

(5) When a 1 pixel is 1, a 0 pixel is aligned to the right.

(6) When pixel 2 is 0, the pixel 0 is aligned to the right.

(71 (output level of 2)≧(output level of 0), the O pixel is right-aligned.

(8) Zero pixels are aligned to the left.

An output image according to the present invention is shown in FIG. 5(3). (11 is the output level of each pixel, and (2) is the output image when only the left alignment pattern according to the conventional method is used.

As can be seen by comparing (2) and +31 in the same figure, the number of isolated dots in the present invention is small, that is, the number of beam on/off points is small.
You can see that the number of times I turn off is small (I can see that).

FIG. 6 is a diagram showing a pixel clock (1) and beam lighting pulse signals corresponding to eight types of output patterns.

FIG. 7 is an example of a pulse width modulation circuit for a printer.

Using the multiplexer 13 as an image output means, the sixth
The configuration is such that pulse width modulation is performed by selecting one of the eight types of signals shown in the figure in accordance with a 3-bit output pattern selection signal S2 synchronized with the pixel clock.

Sl indicates an output pulse, and S3 indicates a pulse width modulated image signal.

〔effect〕

As described above, according to the present invention, it is possible to provide an image forming apparatus that can obtain an output image with excellent output stability by using both right-aligned and left-aligned output cover turns when performing multilevel processing using pulse width modulation. I can do it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an image processing section according to one embodiment of the present invention, FIG. 2 is a block diagram showing an example of a quinarization processor, and FIG. 3 is a block diagram of an image processing section according to another embodiment. Figure, 4th
The figure shows the arrangement of reference pixels, Figure 5 shows the patterns of output images according to the conventional example and the present invention, and Figure 6 shows the pixel clock and beam lighting pulse signals corresponding to eight types of output patterns. 7 is a diagram showing an example of a pulse width modulation circuit of a printer, FIGS. 8(a) to (h) are diagrams showing intermediate level dot patterns for left alignment and right alignment used in the present invention, and FIG. The figure is a diagram for explaining a comparison between an output image as a result of image processing according to the present invention and a conventional example, and FIG. 10(a)
, (b) shows the output dot pattern shown in Fig. 8 and 3
A diagram showing the correspondence of bit output value signals, Figure 11 fat,
(b) is a diagram showing the beam spot and exposure energy distribution, Figures 12 (a) to (Q) are diagrams showing dot patterns for each exposure time, and Figure 13 is for explaining the output image pattern in the conventional example. This is a diagram. 7... Comparator, 8... Quinarization processing circuit, 12
...Pattern selector, 13...Multiplexer. Figure 4 □ Live running blue direction Figure 7 Figure 8 1/4r 2/4r 3/4r Figure 9 (1) I-2→3-4-5-6-7-8-(4) Q
3/4 1 J/4 1/4 2/
4 0 3/40 3/4J 1 11
4 no 1/4j 2/4 no 0 3/4 no 0 3/
4r I +/4J //4r2/4J
O3/4J □ Shoes + Am Figure 10 (a) (a) (b)

Claims (2)

[Claims] (1) A detection means for detecting the direction of the density gradient in the main scanning direction of the pixel of interest from a comparison of left and right pixel data, and the output of this detection means and the data of the pixel of interest are input, and this multivalued image signal is An image forming apparatus comprising a converting means for converting into a multi-value signal of three or more values with a smaller number of multi-values, and an image output means for inputting the signal from the converting means and performing pulse width modulation. . (2) A conversion means for converting a multi-value input signal into a multi-value signal of three or more values with a smaller number of values, an image output means capable of multi-value output by pulse width modulation, and a plurality of multi-value signals in the main scanning direction. An image forming apparatus comprising: pattern selection means for determining a dot pattern of a pixel of interest from dot patterns of adjacent pixels.