JPH01279381A - Diode function generater circuit - Google Patents

Abstract

PURPOSE:To eliminate the restriction to generate a function approximated by linear segments by respectively forming linear function generation circuits, comparators, switching circuits, and a control circuit of circuits using no diode utilizing parasitic transistor effects, and switching linear functions by detecting the intersection of each linear function. CONSTITUTION:The linear function generation circuits 1A and 1B are respectively provided with amplifiers A1 and resistances R1, R4 and, by changing the values of the resistances R1-R4, etc., signals of desired linear functions are obtained from the circuits 1A and 1B. The switching circuits 3A and 3B are respectively constituted of CMOS transfer gates using transistors Q1 and Q2 and switching of the circuits 3A and 3B are performed by means of the control circuit 4A constituted in an inverter I1. Therefore, a diode utilizing a parasitic transistor effect is not required for constituting each section. Thus restriction to the extent of a generated function can be eliminated.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a polygonal line number generation circuit, and particularly to a MO3LSI
Regarding the number generation circuit between broken lines in etc.

[Conventional technology]

An example of a conventional line interval number generation circuit is a circuit using a diode D1, as shown in FIG.

This line-to-line number generation circuit consists of an amplifier A2 and resistors R2 to R.
8 and a diode D1, a bias voltage VB is applied, and an output signal V with a predetermined number of line intervals is generated according to an input signal VI'.
It is configured to output o'.

The resistance values of resistors R2 to R8 are the same as the symbol R3-R.
8 and the bias voltage V8 is negative, the input signal V1
' and the output signal V. The relationship with ′ is as shown in the following equation.

In the above equation, by selecting and determining the values of R1-R8 and V8, it is possible to generate an output signal ``o'' with a desired number of line intervals.

Note that the diode DI is formed by a parasitic transistor effect obtained in the manufacturing process of MO8LSI and the like.

[Problem to be solved by the invention]

The conventional line-to-line number generation circuit described above has a diode D1.
Since this diode D1 is formed by the parasitic transistor effect obtained in the manufacturing process of MO3LSI, there is a limit to the voltage that can be used as the terminal voltage of this diode D1, and this occurs. There is a drawback that the range of the number of lines between lines is limited.

Furthermore, if an attempt is made to obtain a diode that is free from parasitic transistor effects, there is a drawback in that the number of manufacturing steps for MO3LSI increases.

SUMMARY OF THE INVENTION An object of the present invention is to provide a polygon line number generating circuit that has no restrictions on the range of the number of polygon lines generated and does not require an increase in the manufacturing process of MO3LSI.

[Means to solve the problem]

The line-to-line number generation circuit of the present invention compares a plurality of linear function generation circuits that generate signals of different linear functions depending on input signals, and predetermined two of the output signals of each of these linear function generation circuits. , at least one comparator that detects the intersection of these output signals and the corresponding linear function and outputs an intersection detection signal, and is connected between the output terminal and the output terminal of each of the gate number generation circuits and is controlled by a control signal. It has a plurality of switch circuits that turn on and off, and a control circuit that generates the control signal that turns on one of the plurality of switch circuits based on the intersection detection signal from each of the comparators.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

The linear function generation circuits IA to IN receive an input signal V.

Accordingly, signals VOA to VON of different linear functions are generated.

The comparators 2A to 2M respectively compare predetermined two of the output signals VoA to voFl of the gate number generation circuits IA to IN, and compare these two output signals (VOA to VON
) and the corresponding linear function to detect the intersection point detection signal V
Outputs XA to VXM.

The switch circuits 3A to 3N are respectively connected between the output ends of the corresponding linear function generation circuits (IA to IN) and the output terminals To, and are turned on and off by control signals I to VCN.

The control circuit 4 generates control signals cA to VCN that turn on one of the switch circuits 3A to 3N based on the intersection detection signals VXA to VXH from the comparators 2^ to 2M.

Figure 2 shows the input signals of each part to explain the operation of this embodiment. FIG. 4 is a characteristic diagram of output signals Vo and VOA to VOC for the output signals V0 and VOA.

As the level of the input signal VI increases, the output signal V of the gate number generating circuits IA to 1c increases. The levels of AzVoC each vary according to a predetermined linear function.

The control circuit 4 first receives the output signal (V
XA), the switch circuit 3B is activated by the control signal vcB.
is turned on and the output signal ■oB of the linear function generating circuit 1n is transmitted to the output terminal To.

Next, the comparator 2^ is the primary function generator circuit LA, IB.
When the intersection of the output signals VOA and VOB is detected, the control circuit 4 outputs a control signal (2) according to the intersection detection signal VXA.

A+ vCB turns on the switch circuit 3A and turns off the switch circuit 3B, and the output signal VOA of the -gateway number generation circuit IA is output from the output terminal T0.

In the same manner, an output signal V as shown in FIG. 2 is obtained.

FIG. 3 shows a specific circuit example of the present invention in a case where there are two linear function generating circuits.

The linear function generating circuits 1^ and IB each include an amplifier A1 and resistors R, , R2, R8, and R4, and a desired linear function signal can be obtained by changing the values of these resistors R1 to R4. I can do it.

Switch circuits 3A and 3B are transistors Q+.

It is composed of a CMO3) transfer gate using Q2, and these switching is performed by an inverter (2) and a control circuit 48 of the structure.

In this way, it is not necessary to use diodes due to parasitic transistor effects to construct each part, and since these parts can be formed simultaneously with the normal MO3LSI manufacturing process, there is no need to increase the manufacturing process.

〔Effect of the invention〕

As explained above, in the present invention, the linear function generation circuit, comparator, switch circuit, and control circuit are formed by circuits that do not use diodes due to parasitic transistor effects, and by these, the intersection of each -order number is detected and the By adopting a configuration in which functions are switched, a diode due to a parasitic transistor effect is not used, so restrictions on the range of the number of broken lines that occur can be eliminated, and the MOSFET can be formed without increasing the manufacturing process of a normal MOSFET. There is an effect that can be done.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a characteristic diagram of each part signal to explain the operation of the embodiment shown in FIG. FIG. 4 is a circuit diagram showing an example of a conventional line interval number generation circuit. IA~IN...linear function generation circuit, 2A~2M...
Comparator, 3A~3N...Switch circuit, 4゜4
A...Control circuit, A1. A2...Amplifier, D
l...diode, Ql, Q2... transistor,
R1-R8...Resistance,'

Claims (1)

[Claims] A plurality of linear function generating circuits each generating a signal of a different linear function depending on an input signal are compared with predetermined two of the output signals of each of these linear function generating circuits, and the intersection of these output signals and the corresponding linear function is determined. at least one comparator that detects and outputs an intersection detection signal; a plurality of switch circuits connected between the output ends and output terminals of each of the linear function generating circuits and turned on and off by a control signal; and a control circuit that generates the control signal that turns on one of the plurality of switch circuits in response to an intersection detection signal from a comparator.