JPH01276698A - Formation of multilayered thick film circuit board - Google Patents
Formation of multilayered thick film circuit boardInfo
- Publication number
- JPH01276698A JPH01276698A JP10514788A JP10514788A JPH01276698A JP H01276698 A JPH01276698 A JP H01276698A JP 10514788 A JP10514788 A JP 10514788A JP 10514788 A JP10514788 A JP 10514788A JP H01276698 A JPH01276698 A JP H01276698A
- Authority
- JP
- Japan
- Prior art keywords
- thick film
- circuit
- multilayered
- back side
- multilayered thick
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000004020 conductor Substances 0.000 abstract description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 8
- 239000000463 material Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
Abstract
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は厚膜多層配線板の回路形成方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for forming a circuit on a thick film multilayer wiring board.
（従来の技術）
従来の厚膜多層配線板は２例えば第２図の（ａ）および
（ｂ）に示すようにアルミナセラミック基板５の上面に
下部導体層１．誘電体層２および上部導体層３を形成ｌ
〜で多層化したものが一般に知られている。(Prior Art) A conventional thick film multilayer wiring board has a lower conductor layer 1 on the upper surface of an alumina ceramic substrate 5, for example, as shown in FIGS. 2(a) and 2(b). Forming dielectric layer 2 and upper conductor layer 3
It is generally known that there are multiple layers of...
（発明が解決しようとする課題） しかしながら上記のような厚膜多層配線板は。(Problem to be solved by the invention) However, thick film multilayer wiring boards such as those mentioned above.
下部導体層１．誘電体層２および上部導体層３がアルミ
ナセラミック基板５のほぼ中央部に形成されているため
、裏面に導体回路などを形成する場合、印刷工程時にア
ルミナセラミック基板がシーソー現象を生じ、アルミナ
セラミック基板の平行度を保つことが困難である。この
ため印刷時の解像度に支障をきたすという欠点があった
。Lower conductor layer 1. Since the dielectric layer 2 and the upper conductor layer 3 are formed almost in the center of the alumina ceramic substrate 5, when forming a conductor circuit etc. on the back side, the alumina ceramic substrate will see-saw during the printing process, causing the alumina ceramic substrate to It is difficult to maintain parallelism. For this reason, there was a drawback that the resolution during printing was affected.
本発明は上記の欠点のない厚膜多層配線板を提供するこ
とを目的とするものである。An object of the present invention is to provide a thick film multilayer wiring board that does not have the above-mentioned drawbacks.
（課題を解決するための手段） 本発明は印刷治具架台に複数の突起部を形成し。(Means for solving problems) In the present invention, a plurality of protrusions are formed on the printing jig stand.
この突起部上に基板の表面に形成され、かつ厚膜多層化
した方の面の平坦な部分を載置し、この後厚膜多層化し
た面の裏面に回路を形成する厚膜多層配線板の回路形成
方法に関する。A thick film multilayer wiring board in which the flat part of the thick film multilayered surface formed on the surface of the substrate is placed on this protrusion, and a circuit is then formed on the back side of the thick film multilayered surface. The present invention relates to a method for forming a circuit.
本発明において厚膜多層配線板に用いられる基板の材質
および印刷治具架台の材質については特に制限はない。In the present invention, there are no particular limitations on the material of the substrate and the material of the printing jig frame used in the thick film multilayer wiring board.
（実施例） 以下図面を引用して本発明の詳細な説明する。(Example) The present invention will be described in detail below with reference to the drawings.
第１図は本発明の実施例になる厚膜多層配線板の回路形
成手段を示す側面図であり、第２図に示す印刷治具架台
６に突起部４を形成し、この突起部４上にアルミナセラ
ミック基板５の表面に下部導体層１．誘電体層２および
上部導体層３を形成して厚膜多層化された方の面の下部
導体層１の部分を載置し、しかる後厚膜多層化した面の
裏面に回路を形成し厚膜多層配線板とする。FIG. 1 is a side view showing circuit forming means for a thick film multilayer wiring board according to an embodiment of the present invention. A lower conductor layer 1 is formed on the surface of the alumina ceramic substrate 5. The dielectric layer 2 and the upper conductor layer 3 are formed, and the part of the lower conductor layer 1 is placed on the side where the thick film is multilayered, and then a circuit is formed on the back side of the side where the thick film is multilayered. It is a membrane multilayer wiring board.
（発明の効果）
本発明の製造法によって得られる厚膜多層配線板は、裏
面に導体回路などを形成する場合の印刷時において、平
行度を保つことができ、安定した印刷解像度が得られ、
工業的に極めて好適である。(Effects of the Invention) The thick film multilayer wiring board obtained by the manufacturing method of the present invention can maintain parallelism during printing when forming conductor circuits etc. on the back side, and can obtain stable printing resolution.
It is extremely suitable industrially.
第１図は本発明の実施例になる厚膜多層配線板の回路形
成手段を示す側面図、第２図は本発明の実施例になる厚
膜多層配線板の回路形成に用いられる印刷治具架台の側
面図、第３図の（ａ）は従来の厚膜多層配線板を示す平
面図および（ｂ）はその側面図である。
符号の説明
１・・・下部導体層 ２・・・誘電体層３・・・
上部導体層 ４・・・突起部５・・・アルミナセ
ラミック基板
６・・・印刷治具架台
八 〇
ｅ ＤFIG. 1 is a side view showing a circuit forming means for a thick film multilayer wiring board according to an embodiment of the present invention, and FIG. 2 is a printing jig used for forming a circuit on a thick film multilayer wiring board according to an embodiment of the present invention. FIG. 3(a) is a plan view showing a conventional thick film multilayer wiring board, and FIG. 3(b) is a side view of the pedestal. Explanation of symbols 1...Lower conductor layer 2...Dielectric layer 3...
Upper conductor layer 4...Protrusion 5...Alumina ceramic substrate 6...Printing jig mount 8〇eD
Claims (1)
上に基板の表面に形成され，かつ厚膜多層化した方の面
の平坦な部分を載置し，この後厚膜多層化した面の裏面
に回路を形成することを特徴とする厚膜多層配線板の回
路形成方法。1. A plurality of protrusions are formed on the printing jig stand, and the flat part of the side formed on the surface of the substrate and on which the thick film is multilayered is placed on the protrusions, and then the thick film multilayer is formed on the protrusion. A method for forming a circuit on a thick film multilayer wiring board, characterized in that a circuit is formed on the back side of the surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10514788A JPH01276698A (en) | 1988-04-27 | 1988-04-27 | Formation of multilayered thick film circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10514788A JPH01276698A (en) | 1988-04-27 | 1988-04-27 | Formation of multilayered thick film circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01276698A true JPH01276698A (en) | 1989-11-07 |
Family
ID=14399615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10514788A Pending JPH01276698A (en) | 1988-04-27 | 1988-04-27 | Formation of multilayered thick film circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01276698A (en) |
-
1988
- 1988-04-27 JP JP10514788A patent/JPH01276698A/en active Pending
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