JPH01268120A - Temperature measurement for semiconductor device wafer - Google Patents
Temperature measurement for semiconductor device waferInfo
- Publication number
- JPH01268120A JPH01268120A JP63097764A JP9776488A JPH01268120A JP H01268120 A JPH01268120 A JP H01268120A JP 63097764 A JP63097764 A JP 63097764A JP 9776488 A JP9776488 A JP 9776488A JP H01268120 A JPH01268120 A JP H01268120A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- temperature
- film
- pattern
- luminance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 238000009529 body temperature measurement Methods 0.000 title description 5
- 238000000034 method Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 4
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 230000005855 radiation Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 58
- 238000000137 annealing Methods 0.000 description 8
- 238000013500 data storage Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 101100389815 Caenorhabditis elegans eva-1 gene Proteins 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000003818 cinder Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要］
半導体装置用ウェハの温度測定方法に関し、ウェハ温度
を止確に測定することを目的とし、半導体装置用のつＬ
凸表面にパターンを形成しないパターン非形成領域を設
け、アニールされている」−記つエバのＦ記パターン非
形成領域から輻射される光の輝度をパイロメータにより
検知するとともに、該パイロメータの検知量に対応する
温度を、予め測定したウェハの地肌又は該ウェハ上の膜
についての輝度−温度特性データから判定することによ
り構成する。[Detailed Description of the Invention] [Summary] Regarding a method for measuring the temperature of a wafer for semiconductor devices, the purpose of this method is to accurately measure the wafer temperature.
A pyrometer detects the brightness of the light radiated from the pattern-free area of the evaporator described in F. The corresponding temperature is determined by determining the brightness-temperature characteristic data of the surface of the wafer or the film on the wafer measured in advance.
〔産業上の利用分野］
本発明は、半導体装置用ウェハの温度測定方法に関し、
より詳しくは半導体装置製造工程におけるウェハの温度
測定精度を高める１１見度測定方法に関する。[Industrial Application Field] The present invention relates to a method for measuring the temperature of a wafer for a semiconductor device.
More specifically, the present invention relates to an 11-degree temperature measurement method for improving the accuracy of wafer temperature measurement in a semiconductor device manufacturing process.
［従来の技術］
半導体装置の製造工程において、例えば酸化膜を形成す
る際やパッシベーション膜を形成する際にレーザアニー
ルやランプアニール等によってウェハを加熱するが、膜
の形成を最適なものにするためにウェハの温度を調整す
る必要があり、ウェハの裏面に熱電対を接触させたリパ
イロメークを対向させて温度を４１１］定するようにし
ている。[Prior Art] In the manufacturing process of semiconductor devices, for example, when forming an oxide film or a passivation film, a wafer is heated by laser annealing, lamp annealing, etc., but in order to optimize the formation of the film, It is necessary to adjust the temperature of the wafer, and the temperature is determined by placing a repyromake with a thermocouple in contact with the back surface of the wafer.
しかし、熱電対により１１見度を測定する場合には応答
速度が遅く特に、ランプアニールなどにおいては温度の
微調整が困難で、均一な膜を形成できないといった不都
合がある。However, when measuring 11 degrees using a thermocouple, the response speed is slow, and it is difficult to finely adjust the temperature particularly in lamp annealing, making it impossible to form a uniform film.
また、パイロメータし才、ウェハから輻射する光の輝度
を検知して温度を測定するものであるが、′ウェハの裏
面に形成される膜は均一ではなく、しかもウェハ毎にそ
の膜の状態が異なるために輻射率がウェハにより相違す
る結果、測定誤差が大きくなるといった問題がある。In addition, pyrometers measure temperature by detecting the brightness of light radiated from the wafer, but the film formed on the backside of the wafer is not uniform, and the state of the film differs from wafer to wafer. Therefore, there is a problem that the emissivity differs depending on the wafer, resulting in a large measurement error.
もとより、ダミーウェハを使用して温度を測定すること
もできるが、被測定ウェハとダミーウェハとＬＪ初期温
度、取イマ１位置に違いがえトじるため、温度を正確に
測定することができないといった問題がある。Of course, it is possible to measure the temperature using a dummy wafer, but there is a problem that the temperature cannot be measured accurately because there are differences between the wafer to be measured, the dummy wafer, the LJ initial temperature, and the take-up point 1 position. There is.
本発明はこの上・うな問題に鑑みてなされたものであっ
て、ウェハ温度を正確に測定することができる゛１′、
導体装置用ウェハの温度測定方法を堤供することを目的
とする。The present invention has been made in view of the above problems, and is capable of accurately measuring wafer temperature.
The purpose of this paper is to provide a method for measuring the temperature of wafers for conductive devices.
１課題を解決するための手段］
半導体装置用のウェハ１表面にパターンを形成しないパ
ターン非形成領域４を設ａｔ、アニールされている−１
−記つエバ１の」−記パターン非形成領域４から輻射さ
れる光の輝度をパイロメータ１２により検知するととも
に、該パイロメータ］２の検知部に対応する温度を、予
め測定したウェハの地肌又は該ウェハ」二の膜について
の輝度−温度特性データから判定することを特徴とする
半導体装置用ウェハの温度測定方法。[Means for Solving Problem 1] A non-patterned region 4 in which no pattern is formed is provided on the surface of a wafer 1 for semiconductor devices and annealed -1
The pyrometer 12 detects the brightness of the light radiated from the pattern-free area 4 of the Eva 1, and the temperature corresponding to the detection part of the pyrometer 2 is measured in advance on the surface of the wafer or on the surface of the wafer. 1. A method for measuring the temperature of a wafer for a semiconductor device, characterized in that the temperature is determined based on brightness-temperature characteristic data for a second film of the wafer.
（作 川〕
ウェハ１表面のチップ形成領域には、第４図に見られる
ように半導体装置の各層がパターン化されるが、パター
ン非形成１ＪＱ域４＋にはパターンが形成されないので
、パターン非形成領域４にＳｉＯ２膜やＰＳＣ膜が形成
さ托てもその膜は手用であり、しかも予め形成される膜
厚がわかっているため、ウェハ１がアニールされた場合
に、パターン非形成領域４から輻射される光の輝度とウ
ェハ温度との関係は、予め測定した温度時１１に皓づい
て容易に測定でき、その精度を高くすることができる。(Sakukawa) Each layer of the semiconductor device is patterned in the chip formation area on the surface of the wafer 1, as shown in Figure 4, but no pattern is formed in the non-patterned area 1JQ area 4+. Even if a SiO2 film or a PSC film is formed in region 4, the film is for manual use, and the thickness of the film to be formed is known in advance. The relationship between the brightness of the radiated light and the wafer temperature can be easily measured based on the temperature 11 measured in advance, and its accuracy can be increased.
第１〜３図は、本発明を実施する場合に使用する装置の
一例を示すものであって、図中符号１は′シリコンより
なるウェハで、その表面には格子状のスクライブライン
２により囲まれる複数のチップ領域３が設けられ、その
・うちの１つはパターン非形成領域４として構成されて
いる。1 to 3 show an example of an apparatus used in carrying out the present invention, in which reference numeral 1 is a wafer made of silicon, the surface of which is surrounded by lattice-like scribe lines 2. A plurality of chip regions 3 are provided, one of which is configured as a pattern-free region 4.
上述したチップ領域３には、−マスク５のパターンにし
たがってＳｉＯ２膜形成、不純物拡散等を形成すること
によりトランジスタやＩＣなどの個りのデイバイスが形
成される。In the above-mentioned chip region 3, individual devices such as transistors and ICs are formed by forming a SiO2 film, impurity diffusion, etc. according to the pattern of the -mask 5.
またマスク５は、図示しないクロＪ、膜をバターニング
したもので、ウェハ１のパターン非形成領域４を覆う部
分に己、１１、パターン非形成領域６が同様に形成され
ている。The mask 5 is made by patterning a black film (not shown), and has a pattern-free region 6 formed thereon in a portion covering the pattern-free region 4 of the wafer 1.
このマスク５のパターン非形成領域６は、ウェハ１に塗
布するレジスＩ・にポジ型を使用する場合には透明に形
成され、また、ネガ型を使用する場合にはクロム膜によ
り覆われていて、ウェハ６のパターン非形成領域４に半
導体装置用のパターンを形成しないように構成されてい
る。The non-pattern forming area 6 of this mask 5 is formed transparent when a positive type is used for the resist I applied to the wafer 1, and is covered with a chrome film when a negative type is used. , so that no pattern for semiconductor devices is formed in the pattern-free region 4 of the wafer 6.
これにより、ウェハ１」二に形成した各種の膜をパター
ン化する場合に、常にパターン非形成領域４がエツチン
グされてウェハ１の地肌を露出するように構成されてい
る。As a result, when patterning various films formed on the wafer 1, the non-patterned region 4 is always etched to expose the bare surface of the wafer 1.
第１図において、図中符号７はウェハ１を熱処理するラ
ンプアニール装置で、ハロゲンランプや赤外線ランプの
ような加熱用ランプ８によって上下を挟まれたヂャンハ
９の上面には、はたる石（ｃａＦ２）よりなる透過窓１
０が設けられ、また、ランプアニール’！ｂ’Ｆ７のヂ
ャンハ９内底部には、ウェハ１を支持する支持ピン１１
が取伺けられている。In FIG. 1, reference numeral 7 denotes a lamp annealing device for heat-treating the wafer 1. On the upper surface of the wafer 9, which is sandwiched between the upper and lower sides by heating lamps 8 such as halogen lamps or infrared lamps, there is a cinder block (caF2). ) transmission window 1 consisting of
0 is provided, and lamp anneal'! A support pin 11 for supporting the wafer 1 is provided at the inner bottom of the jumper 9 of b'F7.
has been investigated.
さらに、このランプアニール装置７の上方には、放射計
型のパイロメータ１２が取４＝１けられていて、ウェハ
１のパターン非形成領域４から輻射した赤外線等を透過
窓１０を通して受光し、赤外線等の輝度を測定するよう
に構成されている。Furthermore, a radiometer-type pyrometer 12 is installed above the lamp annealing device 7, and receives infrared rays and the like radiated from the non-patterned area 4 of the wafer 1 through a transmission window 10. The device is configured to measure the brightness of .
１３は、輝度−温度特性データ記憶回路で、ウェハ１の
地肌やウェハ１トの膜の輝度−温度の特性を予め測定し
たデータを保持するもので、そのデータは温度判定量Ｆ
ｔＰｔ１４に出力してパイロメータ１２の出力計と比較
され、この温度判定回路１４によりウェハ１の温度が定
められる。Reference numeral 13 denotes a brightness-temperature characteristic data storage circuit, which holds data obtained by previously measuring the brightness-temperature characteristics of the surface of the wafer 1 and the film of the wafer 1, and the data is used as the temperature judgment amount F.
The temperature is outputted to tPt14 and compared with the output meter of the pyrometer 12, and the temperature of the wafer 1 is determined by the temperature determination circuit 14.
１５は、加熱用ランプ８の発熱量を調整するアニール温
度制御回路で、温度判定回路１４によって判別した温度
に基づいてランプ８の発熱量を制御するように構成され
ている。Reference numeral 15 denotes an annealing temperature control circuit that adjusts the amount of heat generated by the heating lamp 8, and is configured to control the amount of heat generated by the lamp 8 based on the temperature determined by the temperature determination circuit 14.
次に本発明の一実施例を上記した装置を使用して説明す
る。Next, one embodiment of the present invention will be described using the above-described apparatus.
うエバ１のチップ形成領域には第４．５図に見られるよ
うに半導体装置の各層１９がパターン化されるが、パタ
ーン非形成領域４−上の膜は、エツチング工程の際に除
去されるようにマスク５を設計しているため、パターン
非形成領域４に５ｉＯ７１２２０やＰＳＧ膜２１が形成
されても、その膜は平１０で、しかも予め形成される膜
厚がわかっているため、ウェハ１が加熱ランプ８により
アニールされた場合に、パターン非形成領域４から輻射
される光の輝度とウェハ温度との関係は、予め測定した
輝度−温度特性に基づいて精度良くウェハ１の温度が測
定される。As shown in FIG. 4.5, each layer 19 of the semiconductor device is patterned in the chip forming area of the substrate 1, but the film on the non-pattern forming area 4 is removed during the etching process. Since the mask 5 is designed in this way, even if 5iO71220 or PSG film 21 is formed in the non-pattern forming area 4, the film will be flat and the thickness of the film to be formed is known in advance. When the wafer 1 is annealed by the heating lamp 8, the relationship between the brightness of the light radiated from the non-patterned region 4 and the wafer temperature is such that the temperature of the wafer 1 is accurately measured based on the brightness-temperature characteristic measured in advance. Ru.
次に、アニールによってシリコンウェハ１とＳｉ０，４
膜２０の界面性を向上する場合を例に揚げてさらに詳細
に説明する（第５図）。Next, by annealing, silicon wafer 1 and Si0,4
A more detailed explanation will be given by taking as an example a case where the interfacial properties of the film 20 are improved (FIG. 5).
シリコン性うエバ１上に形成される５ｉ０２膜２０は、
ドライ０□酸化、ウェット０□酸化等によって設計通り
の厚さ、例えば１０００人に形成することができる。The 5i02 film 20 formed on the silicone evaporator 1 is
By dry 0□ oxidation, wet 0□ oxidation, etc., it can be formed to the designed thickness, for example, 1000 mm.
そこで、試験用のウェハにＳｉＯ□膜を所定の厚さに形
成して予め輻射率を測定し、そのデータを輝度−温度特
性データ記憶回路１３に記憶しておく。Therefore, a SiO□ film is formed to a predetermined thickness on a test wafer, the emissivity is measured in advance, and the data is stored in the brightness-temperature characteristic data storage circuit 13.
そして、半導体装置の作成工程において、ウェハ１にＳ
ｉＯ□膜２０膜形０した後、ランプアニール装置７のチ
ャンバ９内にウェハ１を装着してアニールすると、パイ
ロメータ１２は、ウェハ１のパターン非形成領域４から
輻射された光の輝度を受光し、検出量を温度判定回路１
４に出力するため、この温度判定回路１４によって輝度
−温度特性データ記憶回路１３内のデータと、ｌｔ、較
されて、ウェハ１の正確な温度が求められる。Then, in the manufacturing process of the semiconductor device, S is applied to the wafer 1.
After forming the iO□ film 20, the wafer 1 is mounted in the chamber 9 of the lamp annealing device 7 and annealed. , the detected amount is determined by the temperature judgment circuit 1
4, the temperature determination circuit 14 compares it with the data in the brightness-temperature characteristic data storage circuit 13 to determine the accurate temperature of the wafer 1.
さらに、ウェハ１上に形成したＰＳＧ膜２１を平坦化す
る場合を例にあげて説明する（第４図）。Further, a case will be explained using an example in which the PSG film 21 formed on the wafer 1 is planarized (FIG. 4).
ＣＶＤ法によりウェハ１にＰＳＧ膜２１を形成・する際
、ウェハ１のパターン非形成領域４には前工程のエツチ
ングによりウェハ１の地肌が表れているため、パターン
非形成領域４には直接ＰＳＧ膜２１が形成される。When forming the PSG film 21 on the wafer 1 by the CVD method, since the bare surface of the wafer 1 is exposed in the non-pattern forming area 4 of the wafer 1 due to etching in the previous process, the PSG film is directly applied to the non-pattern forming area 4. 21 is formed.
この場合にも、ＣＶＤ法によりＰＳＧ膜２１を設計通り
の厚さ（例えば４０００人）に形成することができるた
め、予め輝度−温度特性データを測定して特性データ記
憶回路１３に保存しておりば、パターン非形成領域４か
ら輻射される輝度によりウェハ１の正確な温度が求まる
。In this case as well, since the PSG film 21 can be formed to the designed thickness (for example, 4000 layers) using the CVD method, the brightness-temperature characteristic data is measured in advance and stored in the characteristic data storage circuit 13. For example, the accurate temperature of the wafer 1 can be determined from the brightness radiated from the non-patterned region 4.
なお、上述した実施例は、ウェハ１に設けた複数のチッ
プ形成領域３のうちの１つをパターン井形・底領域４と
し、これを温度測定専用領域に使用したものであるが、
チップ形成領域３内の一部を温度測定領域にすることも
可能である。In the above-mentioned embodiment, one of the plurality of chip forming regions 3 provided on the wafer 1 is made into a patterned square/bottom region 4, and this is used as a region exclusively for temperature measurement.
It is also possible to use a part of the chip forming region 3 as a temperature measurement region.
以上述べたように本発明によれば、ウェハ表面にパター
ン非形成領域を設け、この領域から輻射される光の輝度
をパイロメータにより測定して温度を測定するようにし
たので、平坦かつ均一な膜から輻射した光を測定するこ
とができ、予め測定したン晶度特性に基づいて正確かつ
容易に温度を測定することができる。As described above, according to the present invention, a non-patterned region is provided on the wafer surface, and the temperature is measured by measuring the brightness of light radiated from this region with a pyrometer, so that a flat and uniform film can be obtained. The temperature can be measured accurately and easily based on the crystallinity characteristics measured in advance.
第１図は、本発明に使用する装置の一例を示す概要構成
図、
第２図は、本発明に使用するウェハの一例を示す平面図
、
第３図は、本発明に使用するマスクの一例を示ず平面図
、
第４図は、本発明により測定するウェハの一例を示す断
面図、
第５図は、本発明により測定するウェハの他の例を示す
断面図である。
（符号の説明）
１・・・ウェハ、
３・・・ヂンプ領域、
４・・・パターン非形成領域、
５・・・マスク、
６・・パターン非形成領域、
７・・・ランプアニール装置、
８・・・加熱用ランプ、
９・・チャンバ、
１０・・・透過窓、
１３・・・輝度−温度時１１１′データ記憶回路。Fig. 1 is a schematic configuration diagram showing an example of an apparatus used in the present invention, Fig. 2 is a plan view showing an example of a wafer used in the present invention, and Fig. 3 is an example of a mask used in the present invention. FIG. 4 is a cross-sectional view showing an example of a wafer to be measured according to the present invention, and FIG. 5 is a cross-sectional view showing another example of a wafer to be measured according to the present invention. (Explanation of symbols) 1... Wafer, 3... Dump region, 4... Pattern non-formation region, 5... Mask, 6... Pattern non-formation region, 7... Lamp annealing device, 8 ... Heating lamp, 9... Chamber, 10... Transmission window, 13... Brightness-temperature 111' data storage circuit.
Claims (1)
ないパターン非形成領域（４）を設け、アニールされて
いる上記ウェハ（１）の上記パターン非形成領域（４）
から輻射される光の輝度をパイロメータ（１２）により
検知し、 該パイロメータ（１２）の検知量に対応する温度を、予
め測定したウェハの地肌又は該ウェハ上の膜についての
輝度−温度特性データから判定することを特徴とする半
導体装置用ウェハの温度測定方法。[Scope of Claims] A pattern-free region (4) in which no pattern is formed is provided on the surface of a wafer (1) for semiconductor devices, and the pattern-free region (4) of the wafer (1) is annealed.
A pyrometer (12) detects the brightness of the light radiated from the pyrometer (12), and the temperature corresponding to the amount detected by the pyrometer (12) is determined from the brightness-temperature characteristic data of the wafer surface or film on the wafer measured in advance. 1. A method for measuring the temperature of a wafer for a semiconductor device, the method comprising: determining the temperature of a wafer for a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63097764A JPH01268120A (en) | 1988-04-20 | 1988-04-20 | Temperature measurement for semiconductor device wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63097764A JPH01268120A (en) | 1988-04-20 | 1988-04-20 | Temperature measurement for semiconductor device wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01268120A true JPH01268120A (en) | 1989-10-25 |
Family
ID=14200935
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63097764A Pending JPH01268120A (en) | 1988-04-20 | 1988-04-20 | Temperature measurement for semiconductor device wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01268120A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04297054A (en) * | 1990-04-09 | 1992-10-21 | Anelva Corp | Method and apparatus for processing semiconductor wafer |
| JP2014192277A (en) * | 2013-03-27 | 2014-10-06 | Sumitomo Heavy Ind Ltd | Semiconductor annealing device and temperature measurement method |
| JP2015502055A (en) * | 2011-12-15 | 2015-01-19 | ソイテック | Deposition system having reaction chamber configured for in-situ metrology and related method |
| US9070590B2 (en) | 2008-05-16 | 2015-06-30 | Mattson Technology, Inc. | Workpiece breakage prevention method and apparatus |
| US9627244B2 (en) | 2002-12-20 | 2017-04-18 | Mattson Technology, Inc. | Methods and systems for supporting a workpiece and for heat-treating the workpiece |
| US9644285B2 (en) | 2011-08-22 | 2017-05-09 | Soitec | Direct liquid injection for halide vapor phase epitaxy systems and methods |
| KR20210156199A (en) * | 2020-06-17 | 2021-12-24 | 도쿄엘렉트론가부시키가이샤 | Film forming method and film forming apparatus |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01105530A (en) * | 1987-10-19 | 1989-04-24 | Hitachi Ltd | Manufacture of semiconductor device |
-
1988
- 1988-04-20 JP JP63097764A patent/JPH01268120A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01105530A (en) * | 1987-10-19 | 1989-04-24 | Hitachi Ltd | Manufacture of semiconductor device |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04297054A (en) * | 1990-04-09 | 1992-10-21 | Anelva Corp | Method and apparatus for processing semiconductor wafer |
| US9627244B2 (en) | 2002-12-20 | 2017-04-18 | Mattson Technology, Inc. | Methods and systems for supporting a workpiece and for heat-treating the workpiece |
| US9070590B2 (en) | 2008-05-16 | 2015-06-30 | Mattson Technology, Inc. | Workpiece breakage prevention method and apparatus |
| US9644285B2 (en) | 2011-08-22 | 2017-05-09 | Soitec | Direct liquid injection for halide vapor phase epitaxy systems and methods |
| JP2015502055A (en) * | 2011-12-15 | 2015-01-19 | ソイテック | Deposition system having reaction chamber configured for in-situ metrology and related method |
| JP2014192277A (en) * | 2013-03-27 | 2014-10-06 | Sumitomo Heavy Ind Ltd | Semiconductor annealing device and temperature measurement method |
| KR20210156199A (en) * | 2020-06-17 | 2021-12-24 | 도쿄엘렉트론가부시키가이샤 | Film forming method and film forming apparatus |
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