JPH01267764A - Peripheral control device - Google Patents

Abstract

PURPOSE:To execute a proper load distributed processing with a few hardwares by requesting a re-trial from the other system peripheral controller to a host device when the fact that the side of the peripheral controller of the other system is efficient is decided at the time of comparing mutual load states. CONSTITUTION:When a command outputted from a host machine 2 is a WRITE command to a second streamer type magnetic tape unit (MTU) 3 and a WRITE processing is executed between a data buffer 12 and a first MTU 3 at such a time, a microprocessor 13 reads each load information from load information storing parts 15 of a self-system and the other system and compares the information. As result, when the buffer of the self-system is not used to the MTU 3 and, simultaneously, a number 101 of commands in a processing of the other system and the number of drives to use the buffer indicated by a buffer use information 102 are fewer than those of the self-system, a status to request the re-trial from the other system is set to a status storing part 16. The host machine 2 to receive it re-outputs the command to a magnetic tape control unit (MTC) 1 of a B system. Thus, the loads of the MTCs 1 of both systems can be balanced, and the proper load distributed processing can be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a peripheral control device, and particularly to a peripheral control device that shares controlled devices with each other.

[Conventional technology]

In an information processing system, a plurality of peripheral control devices are often used to configure the system in order to improve the performance and reliability of nine peripheral device subsystems.

Conventionally, for this type of peripheral control device, load distribution processing was performed only by software.

There has been a method of providing a data transfer path between a plurality of peripheral control devices that share a controlled device and distributing the load only between the two peripheral control devices. [Problems to be Solved by the Invention] In the conventional method of load balancing using only software, each peripheral control device is connected to a plurality of host devices that do not have a means of communication with each other.

The software of each host device could not accurately know the load status of each peripheral control device. Also, in a peripheral control device having a data buffer, data transfer, etc. is performed with a controlled device asynchronously with data transfer with a host device.

The software could not accurately know the load status.

Further, in the conventional method of providing a data transfer path between peripheral control devices, there is a problem in that the amount of hardware for the two peripheral control devices increases.

The present invention aims to solve these problems with conventional devices, and it is possible to achieve appropriate load distribution even when connected to multiple host devices or when a large amount of processing is performed asynchronously with the host devices. The present invention provides a peripheral control device that can perform processing with less hardware.

[Failure to solve the problem]

According to the present invention, in a peripheral control device that shares a controlled device with another peripheral control device and is connected to the same host device, there is provided a means for storing an operating status, and a means for storing the operating status and transmitting the operating status to the other peripheral control device. means for notifying each other; and comparing the stored operating status and the operating status notified from the other peripheral control device, and which peripheral control device should perform the new process instructed by the higher-level device. and a means for determining whether a new process should be processed in the other peripheral control device, requesting the higher-level device to retry via the other peripheral control device. A peripheral control device is obtained, characterized in that it has means.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a magnetic tape subsystem that is an embodiment of the present invention.

A magnetic tape control device (hereinafter referred to as MTC) 1 connects a host machine 2 and a plurality of streamer type magnetic tape devices (hereinafter referred to as MTU) via a host connection unit (hereinafter referred to as CIA) 10 and a device connection unit (hereinafter referred to as MTA) 11. ) 3
It is connected to the. Each MTU3 is connected in a shared manner from two MTCIs. The data buffer 12 of the MTCI is divided corresponding to each MTU 3, and temporarily stores data transferred between the CHAIO and the MTA 11. =
Enables asynchronous operation of MTA II. The microprocessor 13 controls each part of the MTCI. Control information storage unit 14 (c) Stores various information including control information for the microprocessor 130. The load information storage unit 15 is a CHA
Status of data transfer in IO or MTA 11K (
The number of data being transferred or waiting for data transfer) and the usage status of the data buffer 12 are stored.

The data in the load information storage section 15 can also be read from the microprocessors 13 of the connected MTCIs. After the process requested by the host machine 2 is completed, the status storage unit 16 temporarily stores the status edited by the microprocessor 13 as the execution result.

This is sent to the host machine 2 via CHAIO.

FIG. 2 shows information stored in the load information storage section 15 in FIG. 1. The number of instructions being processed 101 indicates the number of instructions being executed from the host machine 2 to the MTU 3 in each MTC. Buffer usage information 102 is assigned bits corresponding to each MTU 3, and indicates whether or not a buffer is used in the processing of each MTU 3.

Next, the operation of the apparatus of this embodiment will be explained based on the drawings.

The microprocessor 13 shown in FIG. 1 controls each part of the υMTCI by a microprogram.

In particular, READ commands and WRITE commands from host machine 2
In response to commands and the like, it controls each part of CHAIO, MTAII, and data buffer 12 to read data from MTU3, write data to MTU3, etc.

Microprocessor 13 receives CHAI from host machine 2
凰 receives commands via O, decodes them and sends them to MT
Determine whether immediate execution is possible within MTCI without accessing U3. If it can be executed immediately within the MTCI, execute this instruction, store the result in the status storage unit 16, and then report via ClAl0 or request the next instruction.

The command sent from host machine 2 to A-system MTCI is the first
In the case of an instruction that accesses MTU3.

The microprocessor 13 reads the respective load information from the load information storage section 15 of its own system (A system) and the load information storage section 15 of the other system (B system) and compares them.

As a result of the comparison, if it is determined that it is appropriate to process the command in the own system, the number of instructions being processed 101 in the load information storage section 15 of the own system shown in FIG. 2 is increased by 1. next.

When using a buffer in processing the instruction,
Similarly, in the data buffer usage information 102 of the load information storage unit 15 of the own system, the data buffer in use bit, which is assigned one bit for each MTU 3, is set.

When the instruction received from host machine 2 is a WRITE instruction, the microprocessor writes CHAIO and data buffer 1.
2 to start data transfer.

Data sent from host machine 2 is stored in data buffer 1
It is stored in 2. When the amount of data sent is less than the standard, no operation is started for the MTU 3, and a completion report or a next command request is made to the host machine 2. At this time, in the load information storage unit 15 of the own system, the number of instructions being processed 101 shown in FIG. 2 is decremented by 1, and the data buffer usage information 102 is left unchanged.

Next, when the host machine 2 issues a WRITE command to the same MTU 3 again, since the buffer in use bit 102 of the load information storage unit 15 is set, it decides to process the command in its own system and transfers the data. The data is started and stored in the data buffer 12.

When the amount of data combined with the data blocks previously stored in the data buffer 12 exceeds a standard value, the microprocessor 13 instructs the MTA II to send a WRITE instruction to the MTU 3 and transfer the data. When the data transfer between the host machine 2 and the data buffer 12 is completed, 2. Microprocessor 13 is the previous WRI
Termination processing is performed in the same manner as the TE instruction. At this time, WRITE processing is being executed between the data buffer 12 and the MTU 3.

Next, the command issued from the host machine 2 is sent to the second MTU 3.
At this time, data buffer 1 is
2 and the first MTU 3, the microprocessor 13 reads the load information from the load information storage unit 15 of the own system and the other system, and
compare. the result.

The local buffer is not used for the MTU3,
And the number of instructions being processed in other systems is 101 and buffer usage information is 10.
If the number of buffer-using drives indicated by 2 is smaller than that of the own system, a status requesting retry from the other system is set in the status storage unit 16.

Alternatively, if the data buffer 12 is being used for the MTU 3 in the other system, the same status is set in the status storage unit 16 of the own system. Status is A
It is sent to host machine 2 via CHAIO of the system,
Upon receiving this, the host machine 2 reissues the command to the B-system MTCI. This maintains the balance of the MTCI loads on both systems.

In the A-system MTCI, when the WRITE process involving data transfer between the data buffer 12 and the first MTU 3 is completed and there is no data for the MTU 3 in the data buffer 12, the microprocessor 13 transfers the data to the load information storage unit. The bit corresponding to the MTU3 of the 15 buffer usage information is cleared.

Although the WRITE command has been described above, the same applies to other commands.

In addition, when two host machines 2 are connected to each MTCI as shown in FIG.

It can be easily inferred that load distribution is possible based on instructions from each MTC 1 even without a means of communication between host machines.

〔Effect of the invention〕

As explained above, the present invention provides a means for comparing the load status of peripheral control devices that share a controlled device, and determines that it is more efficient to perform processing in a peripheral control device of another system. Sometimes, when connected to multiple host devices, it is possible to provide a means for requesting a retry from a peripheral control device of another system to the host device. This has the advantage that even when a large amount of processing is performed asynchronously with the host system, accurate load distribution processing can be achieved with a small amount of hardware.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an example of a magnetic tape control device according to an embodiment of the present invention, and FIG. 2 is a diagram showing the types and formats of information stored in the load information storage section shown in FIG. 1. Explanation of symbols: l...Magnetic tape controller (MTC)
. 2...Host machine, 3...Magnetic tape device (MT
U). DESCRIPTION OF SYMBOLS 10... Host connection part (CIA), 11... Device connection i (MTA), 12... Data buffer, 13... Microprocessor, 14... Control information storage part, 15... Load Information storage section, 16...
Status storage.

Claims (1)

[Claims] 1. In a peripheral control device that shares a controlled device with other peripheral control devices and is connected to the same host device, means for storing operating conditions and mutually notifying the other peripheral control devices of the operating conditions means, and compares the stored operation status with the operation status notified from the other peripheral control device, and determines which peripheral control device should perform the new process instructed by the higher-level device. and means for requesting the host device to retry via the other peripheral control device when the determining means determines that a new process should be processed in the other peripheral control device. A peripheral control device comprising: