JPH01264607A - System for driving recording current for magnetic recorder - Google Patents
System for driving recording current for magnetic recorderInfo
- Publication number
- JPH01264607A JPH01264607A JP9154588A JP9154588A JPH01264607A JP H01264607 A JPH01264607 A JP H01264607A JP 9154588 A JP9154588 A JP 9154588A JP 9154588 A JP9154588 A JP 9154588A JP H01264607 A JPH01264607 A JP H01264607A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- recording head
- voltage
- current
- recording
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Digital Magnetic Recording (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、２端子の記録ヘッドにパルス電流を供給する
磁気記録装置に係り、特に記録ヘットと回路との接続が
容易な記録電流駆動方式に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a magnetic recording device that supplies a pulse current to a two-terminal recording head, and particularly relates to a recording current drive system that facilitates connection between the recording head and a circuit. Regarding.
従来の記録電流の駆動方式には、特開昭６１−１１９０
５号に記載のように２端子の記録ヘッドの両端を電流ド
ライバに接続してパルス電流を供給する、第７図に示す
如きものがあった。Conventional recording current drive methods include Japanese Patent Application Laid-Open No. 61-1190.
As described in No. 5, there was a device as shown in FIG. 7 in which both ends of a two-terminal recording head were connected to a current driver to supply a pulse current.
この方式で、記録ヘッド６に電流■４の正方向にパルス
電流を供給する場合は、あらかじめゲート信号Ｇ１，４
によってスイッチ８１．４を閉じるとともに、ゲート信
号Ｇ２，８によってスイッチＳ ２ ＋８を開いておき
、この状態でゲート信号Ｇ５，６によってスイッチＳ５
を閉じ、同時にスイッチＳ６を開くようにする。これに
よって定電流源■８の電流が、Ｓ６を閉じている間だけ
記録ヘッド６に流れるパルス電流として供給される。In this method, when supplying pulse current to the recording head 6 in the positive direction of current 4, gate signals G1 and 4 are supplied in advance.
closes the switch 81.4, and opens the switch S 2 +8 by the gate signals G2, 8. In this state, the gate signal G5, 6 closes the switch S 2 +8.
, and at the same time open switch S6. As a result, the current from the constant current source 8 is supplied as a pulse current flowing to the recording head 6 only while S6 is closed.
この駆動方式では、電流源Ｉｓの電流がほぼそのまま記
録ヘッドに供給されるので、パルス電流値の精度が高い
という利点があった。This driving method has the advantage that the current from the current source Is is supplied to the recording head almost as is, so that the accuracy of the pulse current value is high.
しかし、上記従来はスイッチの個数が６個と多く、この
ために駆動回路の構成が複雑なる、記録ヘッドの両端子
を駆動回路に接続しなければならないので、記録ヘッド
側の端子の引出し、特に複数の１−ランクを実装しよう
とする時、困難になる、などの問題があった。However, in the above-mentioned conventional method, the number of switches is as large as 6, which complicates the configuration of the drive circuit.Since both terminals of the recording head must be connected to the drive circuit, it is necessary to draw out the terminals on the recording head side. There were problems such as difficulty when trying to implement multiple 1-ranks.
本発明の目的は、回路構成の簡単な駆動回路で記録ヘッ
ドにパルス電流を供給するとともに、記録ヘッドの一端
を電圧源に接続可能にすることによって、記録ヘッドの
端子のｉ５１出しを容易にすることにある。An object of the present invention is to supply a pulse current to the recording head using a drive circuit with a simple circuit configuration, and to make it possible to connect one end of the recording head to a voltage source, thereby making it easier to connect the terminal of the recording head to the i51. There is a particular thing.
上記目的は、第１図の回路図、および第２図のタイミン
グチャートに示すようにパルス電流Ｉｗを供給するタイ
ミングで一定電位の変化を与える例えば、’Ｉ” Ｔ”
丁、のような電圧トライバ１の出力電圧Ｖ。をコンデン
サ２と抵抗器３を介して記録ヘッド６の一端子に接続し
、記録ヘッドのもう一方の端子を定電圧源ＶＥに接続す
ることにより達成される。The above purpose is to provide a constant potential change at the timing of supplying the pulse current Iw, as shown in the circuit diagram of FIG. 1 and the timing chart of FIG.
The output voltage V of the voltage driver 1, such as . This is achieved by connecting one terminal of the recording head 6 via the capacitor 2 and resistor 3, and connecting the other terminal of the recording head to the constant voltage source VE.
コンデンサ２は電圧ドライバ１−の出力電圧Ｖ。 Capacitor 2 is the output voltage V of voltage driver 1-.
を微分するように動作する。これによって記録電流Ｔｗ
は、出力電圧ＶｏがＶｏｚからＶｏｚに変化するときに
は正の方向のパルス電流、逆にＶＯ２からＶ ０１に変
化するときには負の方向のパルス電流となる。It works to differentiate. As a result, the recording current Tw
becomes a pulse current in the positive direction when the output voltage Vo changes from Voz to Voz, and becomes a pulse current in the negative direction when it changes from VO2 to V01.
このとき、コンデンサ２の容量Ｃと、抵抗器３の抵抗値
Ｒとの関係を、記録ヘッドの抵抗成分ＲＨ、インダクタ
ンス成分ＬＨとすると、Ｃ＝ ４１．、＋＋／（Ｒ＋Ｒ
ｏ）”に設定する。こうすることによって記録電流Ｉｗ
は、第３図に示すように立上り時間Ｔｒが最小となり、
かつ立下り時に振動せず、■
Ｉ ｗ（ｔ ）＝ −ｔ ｅ ”−ａＬＬ＋（
（ａ ＝（Ｒ＋Ｒｈ）／（２・Ｌｕ）） ＝（１
）となる。ここでＶはＶｏの電位の変化幅（Ｖ Ｏ２−
Ｖ ｏ ｉ ）である。なお、このときのＴｗ（ｔ、）
の最大値Ｉ ＷＭＡＸは、
ｖ
ａ Ｒ，＋ＲＨ
■
≠０．７４
Ｒ＋ ＲＨ
（ｔ＝Ｔｒ＝２・Ｌｕ／（Ｒ＋ＲＨ）） ・・（２
）で求められ、Ｑ、５ＸＩｗＭ＾Ｘでのパルス電流幅Ｔ
ｐｗは
Ｔ ｐ ｗ≠５ ・Ｉ、Ｈ／ （Ｒ＋ＲＩ＋）
−（３）で与えられる。At this time, if the relationship between the capacitance C of the capacitor 2 and the resistance value R of the resistor 3 is the resistance component RH and the inductance component LH of the recording head, then C=41. ,++/(R+R
o)". By doing this, the recording current Iw
As shown in Fig. 3, the rise time Tr becomes the minimum, and
And it does not vibrate at the time of falling, ■ I w (t) = -t e ''-aLL+( (a = (R + Rh) / (2・Lu)) = (1
). Here, V is the width of change in the potential of Vo (V O2-
V o i ). In addition, Tw(t,) at this time
The maximum value I WMAX of is v a R, +RH ■ ≠0.74 R+ RH (t=Tr=2・Lu/(R+RH)) ・・(2
), and the pulse current width T at Q, 5XIwM^X
pw is T p w≠5 ・I, H/ (R+RI+)
- given by (3).
以下、本発明の第１の実施例を第４図により説明する。 A first embodiment of the present invention will be described below with reference to FIG.
入力信号Ｖ、は直流成分を除去し、ＮＰＮトランジスタ
にバイアス電流を供給するコンデンサ１１とバイアス電
圧源ＶＲに接続された抵抗器１２を介して、エミッタホ
ロワを構成するＮＰＮトランジスタ１３のベース端子に
入力される。トランジスタ１３のコレクタ端子は定電圧
源Ｖｃｃに接続され、エミッタ端子は、定電流源Ｉｓを
介して定電圧源ＶＩＥＥに接続されるとともに電圧ドラ
イバ］の出力電圧Ｖｏとして出力される。この電圧Ｖｏ
はコンデンサ２と抵抗器３の直列回路を介して一端を接
地した記録ヘッド６のもう一方の端子に入力される構成
である。The input signal V removes a DC component and is input to the base terminal of an NPN transistor 13 forming an emitter follower via a capacitor 11 that supplies a bias current to the NPN transistor and a resistor 12 connected to a bias voltage source VR. Ru. The collector terminal of the transistor 13 is connected to the constant voltage source Vcc, and the emitter terminal is connected to the constant voltage source VIEE via the constant current source Is, and is output as the output voltage Vo of the voltage driver. This voltage Vo
is input through a series circuit of a capacitor 2 and a resistor 3 to the other terminal of the recording head 6 whose one end is grounded.
入力信号■１のステップ状の電圧変化はエミッタホロワ
を介して、はぼそのままの電圧変化Ｖｏで出力され、前
記の式（１）のパルス電流Ｉｆを記録ヘッド６に供給す
る。この際、定電流源Ｉｓの大きさはＩ Ｗ）ＩＡＸよ
り大きく設定する。The stepwise voltage change of the input signal (1) is output via the emitter follower as an almost unchanged voltage change Vo, and the pulse current If expressed by the above equation (1) is supplied to the recording head 6. At this time, the magnitude of the constant current source Is is set to be larger than IAX.
本実施例は、パルス電流の大きさが数十ｍＡｏ−ｐの比
較的小電流の記録電流駆動方式に適し、回路構成が簡単
である。しかも能動素子はＮＰＮ）−ランジスタのみで
実現できるので高速の電圧ドライブが容易であり、数ｎ
、 ｓ程度のパルス電流も供給可能である。The present embodiment is suitable for a recording current drive system in which the pulse current has a relatively small current of several tens of mAo-p, and has a simple circuit configuration. Moreover, since the active element can be realized using only an NPN transistor, high-speed voltage drive is easy, and several n
, it is also possible to supply a pulse current of about 100 s.
具体的には、ヘッドの抵抗成分Ｒ１（＝２０Ω、インダ
クタンス成分Ｌｕ＝５μＨに、Ｔｐｗ＝５０ｎｓのパル
ス電流幅のＩ ＷＭＡＸ：２０ ｍ Ａｏ−ｐの電流を
供給する場合、式（３）よりＲ１（＋Ｒ＝５００Ωとな
るのでＲ＝４８０Ω、これよりＣ＝４０ｎＦ、また式（
２）よりＶ＝１３．５Ｖと求められる。Specifically, when supplying a current of I WMAX: 20 m Ao-p with a pulse current width of Tpw = 50 ns to the resistance component R1 (= 20Ω, inductance component Lu = 5 μH) of the head, R1 from equation (3) (+R=500Ω, so R=480Ω, from this, C=40nF, and the formula (
2), it is determined that V=13.5V.
本発明の第２の実施例を第５図により説明する。A second embodiment of the present invention will be described with reference to FIG.
本実施例の構成を以下に説明する。入力信号■、は、■
８の直流成分を除去するコンデンサ１１１および１１２
を介してエミッタ端子を接続したＮ Ｉ） Ｎ トラン
ジスタ１３１−とＰＮＰトランジスタ１３２のベース端
子にそれぞれ接続される。トランジスタ１３１のベース
端子は、抵抗器１４１を介して定電圧源ｖｃｃに接続さ
れるとともに、ダイオード１−２１のアノード端子に接
続される。トランジスタ】−３２のベース端子は、抵抗
器１４２を介して定電圧源ＶＥＲに接続されるとともに
、ダイオード１２２のカソード端子に接続され、さらに
このダイオード１２２のアノード端子は前記したダイオ
ード１２７のカソードに接続される。トランジスタ１３
１と１３２のコレクタ端子はそれぞれ定電圧源Ｖｃｃと
ＶＩＥＥに接続される。このような接続関係にある回路
を電圧ドライバ１とし、出力Ｖｏをトランジスタ１３１
と１−３２のそれぞれのエミッタ端子を接続した接続点
よりとる。この電圧Ｖｏは、コンデンサ２と抵抗器３の
直列回路を介して一端を接地した記録ヘッド６のもう一
方の端子に入力される構成である。The configuration of this embodiment will be explained below. Input signal ■, is, ■
Capacitors 111 and 112 remove the DC component of 8.
The emitter terminal of N I) N is connected to the base terminal of the transistor 131- and the PNP transistor 132, respectively. The base terminal of the transistor 131 is connected to the constant voltage source vcc via the resistor 141, and also to the anode terminal of the diode 1-21. The base terminal of the transistor]-32 is connected to the constant voltage source VER via a resistor 142, and also to the cathode terminal of a diode 122, and the anode terminal of this diode 122 is connected to the cathode of the diode 127 described above. be done. transistor 13
Collector terminals 1 and 132 are connected to constant voltage sources Vcc and VIEE, respectively. A circuit with such a connection relationship is defined as a voltage driver 1, and the output Vo is connected to a transistor 131.
It is taken from the connection point where the emitter terminals of and 1-32 are connected. This voltage Vo is inputted via a series circuit of a capacitor 2 and a resistor 3 to the other terminal of the recording head 6 whose one end is grounded.
入力信号ｖＩのステップ状の電圧変化は、抵抗器１４１
，１４２、ダイオード１２１，１２２から成るバイアス
回路を介してトランジスタ１３１゜］−３２のベース端
子にバイアス電圧と加算されて入力される。したがって
ｖｌの電圧変化は、はぼそのままの電圧変化Ｖｏで出力
され、前記の式（１）のパルス電流Ｉｗを記録ヘッド６
に供給する。The step voltage change of the input signal vI is caused by the resistor 141
, 142 and diodes 121, 122, and is added to the bias voltage and inputted to the base terminal of the transistor 131[deg.]-32. Therefore, the voltage change of vl is output as a voltage change Vo as is, and the pulse current Iw of the above equation (1) is outputted to the recording head 6.
supply to.
本実施例は、パルス電流の大きさが数百ｍＡｏ−ｐの比
較的大電流の記録電流駆動方式に適する。This embodiment is suitable for a relatively large recording current drive system in which the magnitude of the pulse current is several hundred mAo-p.
本実施例によれば、定電圧源ｖｃｃおよびＶＥＥからの
電流供給は、はぼ記録ヘッドに供給するパルス電流に設
定でき、電圧ドライバの低消費電力化が期待できる。According to this embodiment, the current supply from the constant voltage sources vcc and VEE can be set to pulse currents supplied to the horizontal recording head, and it is expected that the power consumption of the voltage driver will be reduced.
本発明の第３の実施例を第６図により説明する。A third embodiment of the present invention will be described with reference to FIG.
本実施例は、マルチ八ツ１く装置にパルス電流を供給す
る方式である。各入力信号Ｖ ｌ １〜。は、それぞれ
前記の実施例に示したような電圧ドライバ丁〕１〜１１
に入力される。これらの出力■。」〜。は、それぞれ
コンデンサＣ１〜□と抵抗器Ｒｚ〜□からなる直列回路
を介してマルチ導体のケーブル７の入力端子に接続され
る。さらにケーブル７の出力端子はマルチヘッド６ｏの
一端が共通化された各記録ヘッド素子Ｈ工〜□の入力端
子に接続される。マルチヘッド６ｏの共通端子８は前記
ケーブルの導体を介して電圧ドライバの接地端子に接続
する。In this embodiment, a pulse current is supplied to a multi-function device. Each input signal V l 1~. are voltage drivers 1 to 11 as shown in the above embodiments, respectively.
is input. ■ These outputs. ” ~. are connected to the input terminal of the multi-conductor cable 7 via a series circuit consisting of capacitors C1 to □ and resistors Rz to □, respectively. Further, the output terminal of the cable 7 is connected to the input terminal of each of the recording head elements H to □, of which one end of the multi-head 6o is shared. The common terminal 8 of the multi-head 6o is connected to the ground terminal of the voltage driver via the conductor of the cable.
入力信号Ｖ Ｉ １〜ｎのステップ状の電圧変化に対応
して、電圧ドライバＤ１〜。が電圧出力Ｖ Ｏｆ〜、し
、前記式（１）によってそれぞれ記録ヘッドＨ１〜ｎに
パルス電流を供給する。The voltage drivers D1~ correspond to the step-like voltage changes of the input signals VI1~n. is a voltage output VOf~, and a pulse current is supplied to the recording heads H1 to Hn, respectively, according to the above equation (1).
本実施例によれば、一端を共通化したマルチヘッド６ｏ
が採用でき、マルチヘッド６０の端子数およびケーブル
の導体数をヘッド数ｎのｎ ＋ １にすることができる
のでマルチヘッド化が容易になる。また、各電圧ドライ
バＤＪ、−Ｈの出力電圧Ｖ ｏ ｉ〜ｎが変化してパル
ス電流を供給するタイミングをそれぞれ異ならせること
により、マルチ八ツドロ０の共通端子８に接続される導
体の電流容量および電圧ドライバＤ１〜。用の定電圧源
Ｖｃｃ＋ＶＥＥの電流容量を小さくできる効果もある。According to this embodiment, the multi-head 6o with one end shared
can be adopted, and the number of terminals of the multi-head 60 and the number of conductors of the cable can be set to n + 1 of the number of heads, which facilitates multi-head configuration. In addition, by changing the output voltage V o i to n of each voltage driver DJ, -H and varying the timing of supplying the pulse current, the current capacity of the conductor connected to the common terminal 8 of the multi-eight drawer 0 can be increased. and voltage driver D1~. There is also the effect that the current capacity of the constant voltage source Vcc+VEE for use can be reduced.
本発明によれば、回路構成の簡単な電圧ドライバによる
駆動回路で記録ヘッドにパルス電流を供給でき、更に、
記録ヘッドの一端子を電圧源に接続できるので記録ヘッ
ドの端子の引出しが容易になる。According to the present invention, a pulse current can be supplied to the recording head with a drive circuit using a voltage driver with a simple circuit configuration, and further,
Since one terminal of the recording head can be connected to a voltage source, the terminal of the recording head can be easily drawn out.
第１図は本発明の原理構成を示す回路ブロック図、第２
図は第１図の動作を示すタイミングチャート、第３図は
本発明によるパルス電流波形の詳細図、第４図乃至第６
図は本発明の実施例を示す回路図、第７図は従来の記録
電流駆動方式を示す回路図である。
１・・・電圧ドライバ、２・・・コンデンサ、３・・・
抵抗器、４・・・記録ヘッドの抵抗成分、５・・記録ヘ
ッドのインダクタンス成分、６・・・記録ヘッド、Ｉｗ
・・・記録電流、■、・・入力信号、Ｖｏ・・・電圧ド
ライバ出力。
＼Ｎ’ｌ’１Figure 1 is a circuit block diagram showing the principle configuration of the present invention, Figure 2 is a circuit block diagram showing the principle configuration of the present invention.
The figures are a timing chart showing the operation of Fig. 1, Fig. 3 is a detailed diagram of the pulse current waveform according to the present invention, and Figs.
The figure is a circuit diagram showing an embodiment of the present invention, and FIG. 7 is a circuit diagram showing a conventional recording current drive system. 1... Voltage driver, 2... Capacitor, 3...
Resistor, 4... Resistance component of the recording head, 5... Inductance component of the recording head, 6... Recording head, Iw
...recording current, ■, ...input signal, Vo...voltage driver output. \N'l'1
Claims (1)
る磁気記録装置において、パルス電流の駆動時に電位が
一定量変化する電圧ドライバと、一端を定電圧源に接続
した２端子の記録ヘッドと、該電圧ドライバと記録ヘッ
ドの他端子とをコンデンサと抵抗器で接続したことを特
徴とする磁気記録装置の記録電流駆動方式。 ２、特許請求の範囲第１項記載の記録電流駆動方式にお
いて、前記コンデンサの容量Ｃと、前記抵抗器の抵抗値
Ｒを、記録ヘッドの抵抗成分をＲ＿Ｈ、インダクタンス
成分をＬ＿Ｈとすると、Ｃ＝４Ｌ＿Ｈ／（Ｒ＋Ｒ＿Ｈ）
＾２ に設定することを特徴とする磁気記録装置の記録電流駆
動方式。[Claims] A magnetic recording device that supplies a pulsed recording current to a one- and two-terminal recording head includes a voltage driver whose potential changes by a certain amount when driving the pulsed current, and one end of which is connected to a constant voltage source. A recording current drive system for a magnetic recording device, characterized in that a two-terminal recording head is connected, and the voltage driver and the other terminal of the recording head are connected through a capacitor and a resistor. 2. In the recording current drive system according to claim 1, where the capacitance C of the capacitor and the resistance value R of the resistor are R_H, the resistance component of the recording head, and L_H, the inductance component, C= 4L_H/(R+R_H)
A recording current drive method for a magnetic recording device characterized by setting the current to ^2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63091545A JP2595032B2 (en) | 1988-04-15 | 1988-04-15 | Magnetic recording device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63091545A JP2595032B2 (en) | 1988-04-15 | 1988-04-15 | Magnetic recording device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01264607A true JPH01264607A (en) | 1989-10-20 |
| JP2595032B2 JP2595032B2 (en) | 1997-03-26 |
Family
ID=14029453
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63091545A Expired - Fee Related JP2595032B2 (en) | 1988-04-15 | 1988-04-15 | Magnetic recording device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2595032B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120193012A1 (en) * | 2009-07-22 | 2012-08-02 | Bridgestone Corporation | Tyre retreading method and system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5775651U (en) * | 1980-10-24 | 1982-05-10 |
-
1988
- 1988-04-15 JP JP63091545A patent/JP2595032B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5775651U (en) * | 1980-10-24 | 1982-05-10 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120193012A1 (en) * | 2009-07-22 | 2012-08-02 | Bridgestone Corporation | Tyre retreading method and system |
| US8603274B2 (en) * | 2009-07-22 | 2013-12-10 | Bridgestone Corporation | Tire retreading method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2595032B2 (en) | 1997-03-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |