JP2595032B2 - Magnetic recording device - Google Patents

Magnetic recording device

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Publication number
JP2595032B2
JP2595032B2 JP63091545A JP9154588A JP2595032B2 JP 2595032 B2 JP2595032 B2 JP 2595032B2 JP 63091545 A JP63091545 A JP 63091545A JP 9154588 A JP9154588 A JP 9154588A JP 2595032 B2 JP2595032 B2 JP 2595032B2
Authority
JP
Japan
Prior art keywords
current
recording head
terminal
voltage
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63091545A
Other languages
Japanese (ja)
Other versions
JPH01264607A (en
Inventor
直喜 佐藤
善久 加茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63091545A priority Critical patent/JP2595032B2/en
Publication of JPH01264607A publication Critical patent/JPH01264607A/en
Application granted granted Critical
Publication of JP2595032B2 publication Critical patent/JP2595032B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、2端子の記録ヘツドにパルス電流を供給す
る磁気記録装置に係り、特に記録ヘツドと回路との接続
が容易な磁気記録装置に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording device that supplies a pulse current to a two-terminal recording head, and more particularly to a magnetic recording device that can easily connect a recording head to a circuit. .

〔従来の技術〕[Conventional technology]

従来の磁気記録装置の記録電流の駆動回路には、特開
昭61−11905号に記載のように2端子の記録ヘツドの両
端を電流ドライバに接続してパルス電流を供給する、第
7図に示す如きものがあつた。
A drive circuit for a recording current of a conventional magnetic recording apparatus is provided with a pulse current by connecting both ends of a two-terminal recording head to a current driver as described in JP-A-61-11905. There was something as shown.

この方式で、記録ヘツド6に電流IWの正方向にパルス
電流を供給する場合は、あらじめゲート信号G1,4によつ
てスイツチS1,4を閉じるとともに、ゲート信号G2,3によ
つてスイツチS2,3を開いておき、この状態でゲート信号
G5,6によつてスイツチS5を閉じ、同時にスイツチS6を開
くようにする。これによつて定電流源ISの電流が、S5
閉じている間だけ記録ヘツド6に流れるパルス電流とし
て供給される。
In this manner, when supplying pulsed current in the positive direction of the recording head 6 current I W is closes the Yotsute switch S 1, 4 to Arajime gate signals G 1, 4, gate signal G 2, 3 Switches S 2 and S 3 are opened by the
Close Yotsute switch S 5 to G 5, 6, so that at the same time open the switch S 6. That this shall current of the constant current source I S is supplied as a pulse current flowing in only the recording head 6 while closing the S 5.

この駆動回路では、電流源ISの電流がほぼそのまま記
録ヘツドに供給されるので、パルス電流値の精度が高い
という利点があつた。
In this drive circuit, the current of the current source I S is supplied substantially directly recorded head, advantage that the accuracy of the pulse current value is high has been made.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

しかし、上記従来はスイツチの個数が6個と多く、こ
のために駆動回路の構成が複雑なる、記録ヘツドの両端
子を駆動回路に接続しなければならないので、記録ヘツ
ド側の端子の引出し、特に複数のトラツクを実装しよう
とする時、困難になる、などの問題があつた。
However, in the above-described conventional art, the number of switches is as large as six, which complicates the configuration of the drive circuit. Both terminals of the recording head must be connected to the drive circuit. When trying to implement multiple tracks, it became difficult.

本発明の目的は、回路構成の簡単な駆動回路で記録ヘ
ツドにパルス電流を供給するとともに、記録ヘツドの一
端を電圧源に接続可能にすることによつて、記録ヘツド
の端子の引出しを容易にすることにある。
An object of the present invention is to supply a pulse current to a recording head with a drive circuit having a simple circuit configuration, and to make it possible to connect one end of the recording head to a voltage source, thereby facilitating drawing out of a terminal of the recording head. Is to do.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的は、第1図の回路図、および第2図のタイミ
ングチヤートに示すようにパルス電流IWを供給するタイ
ミングで一定電位の変化を与える例えば、TTLのような
電圧ドライバ1の出力電圧Voをコンデンサ2と抵抗器3
を介して記録ヘツド6の一端子に接続し、記録ヘツドの
もう一方の端子を定電圧源VEに接続することにより達成
される。
Above object, the circuit diagram of FIG. 1, and the second gives the variation of the constant potential at the timing for supplying the pulse current I W as shown in the timing Chiya over bets Figure example, the output voltage V of the voltage driver 1 such as TTL o Capacitor 2 and resistor 3
Connected to one terminal of the recording head 6 through a, it is achieved by connecting the other terminal of the recording head to a constant voltage source V E.

〔作用〕[Action]

コンデンサ2は電圧ドライバ1の出力電圧Voを微分す
るように動作する。これによつて記録電流IWは、出力電
圧VoがVo1からVo2に変化するときには正の方向のパルス
電流、逆にVo2からVo1に変化するときには負の方向のパ
ルス電流となる。
Capacitor 2 operates to differentiate the output voltage V o of the voltage driver 1. I connexion recording current I W to this, the negative direction of the pulse current at the time of changing the pulse current of a positive direction, the V o2 reversed V o1 when the output voltage V o is changed from V o1 to V o2 .

このとき、コンデンサ2の容量Cと、抵抗器3の抵抗
値Rとの関係を、記録ヘツドの抵抗成分RH、インダクタ
ンス成分LHとすると、C=4LH/(R+RHに設定す
る。こうすることによつて記録電流IWは、第3図に示す
ように立上り時間Trが最小となり、かつ立下り時に振動
せず、 となる。ここでVはVoの電位の変化幅(Vo2−Vo1)であ
る。なお、このときのIW(t)の最大値IWMAXは、 で求められ、0.5×IWMAXでのパルス電流幅Tpwは Tpw≒5・LH/(R+RH) …(3) で与えられる。
At this time, assuming that the relationship between the capacitance C of the capacitor 2 and the resistance value R of the resistor 3 is a resistance component R H and an inductance component L H of the recording head, C = 4L H / (R + R H ) 2 . . By doing so, the recording current I W is such that the rise time Tr is minimized as shown in FIG. Becomes Where V is the change the width of the potential of V o (V o2 -V o1) . The maximum value I WMAX of I W (t) at this time is The pulse current width T pw at 0.5 × I WMAX is given by T pw ≒ 5 · L H / (R + R H ) (3)

〔実施例〕〔Example〕

以下、本発明の第1の実施例を第4図により説明す
る。
Hereinafter, a first embodiment of the present invention will be described with reference to FIG.

入力信号Viは直流成分を除去し、NPNトランジスタに
バイアス電流を供給するコンデンサ11とバイアス電圧源
VBに接続された抵抗器12を介して、エミツタホロワを構
成するNPNトランジスタ13のベース端子に入力される。
トランジスタ13のコレクタ端子は定電圧源VCCに接続さ
れ、エミツタ端子は、定電流源ISを介して定電圧源VEE
に接続されるとともに電圧ドライバ1の出力電圧Voとし
て出力される。この電圧Voはコンデンサ2と抵抗器3の
直列回路を介して一端を接地した記録ヘツド6のもう一
方の端子に入力される構成である。
Input signal V i removes the DC component, a capacitor 11 and a bias voltage source for supplying a bias current to the NPN transistor
Via a resistor connected 12 to V B, it is input to the base terminal of the NPN transistor 13 constituting the Emitsutahorowa.
The collector terminal of the transistor 13 is connected to the constant voltage source V CC, emitter terminals via a constant current source I S constant voltage source V EE
It is output as the output voltage V o of the voltage driver 1 is connected to. The voltage V o is configured to be inputted to the other terminal of the recording head 6 having one end grounded via a series circuit of a capacitor 2 and resistor 3.

入力信号Viのステツプ状の電圧変化はエミツタホロワ
を介して、ほぼそのままの電圧変化Voで出力され、前記
の式(1)のパルス電流IWを記録ヘツド6に供給する。
この際、定電流源ISの大きさはIWMAXより大きく設定す
る。
Through a step-shaped voltage change of Emitsutahorowa the input signal V i, are output at substantially the same voltage change V o, supplies a pulse current I W of the formula (1) to the recording head 6.
At this time, the magnitude of the constant current source I S is set larger than I WMAX.

本実施例は、パルス電流の大きさが数十mAo_pの比較
的小電流の記録電流駆動方式に適し、回路構成が簡単で
ある。しかも能動素子はNPNトランジスタのみで実現で
きるので高速の電圧ドライブが容易であり、数ns程度の
パルス電流も供給可能である。
This embodiment is suitable for a relatively small current recording current driving method in which the magnitude of the pulse current is several tens mA o_p , and the circuit configuration is simple. Moreover, since the active element can be realized only by the NPN transistor, high-speed voltage driving is easy, and a pulse current of several ns can be supplied.

具体的には、ヘツドの抵抗成分RH=20Ω、インダクタ
ンス成分LH=5μHに、Tpw=50nsのパルス電流幅のI
WMAX=20mAo_pの電流を供給する場合、式(3)よりRH
+R=500ΩとなるのでR=480Ω、これよりC=40nF、
また式(2)よりV=13.5Vと求められる。
Specifically, the resistance component of the head R H = 20Ω, the inductance component L H = 5 μH, and the pulse current width I T of T pw = 50 ns.
When supplying a current of WMAX = 20 mA o_p , from equation (3), R H
+ R = 500Ω, so R = 480Ω, from which C = 40nF,
Also, V = 13.5V is obtained from equation (2).

本発明の第2の実施例を第5図により説明する。 A second embodiment of the present invention will be described with reference to FIG.

本実施例の構成を以下に説明する。入力信号Viは、Vi
の直流成分を除去するコンデンサ111および112を介して
エミツタ端子を接続したNPNトランジスタ131とPNPトラ
ンジスタ132のベース端子にそれぞれ接続される。トラ
ンジスタ131のベース端子は、抵抗器141を介して定電圧
源VCCに接続されるとともに、ダイオード121のアノード
端子に接続される。トランジスタ132のベース端子は、
抵抗器142を介して定電圧源VEEに接続されるとともに、
ダイオード122のカソード端子に接続され、さらにこの
ダイオード122のアノード端子は前記したダイオード127
のカソードに接続される。トランジスタ131と132のコレ
クタ端子はそれぞれ定電圧源VCCとVEEに接続される。こ
のような接続関係にある回路を電圧ドライバ1とし、出
力Voをトラジスタ131と132のそれぞれのエミツタ端子を
接続した接続点よりとる。この電圧Voは、コンデンサ2
と抵抗器3の直列回路を介して一端を接地した記録ヘツ
ド6のもう一方の端子に入力される構成である。
The configuration of the present embodiment will be described below. The input signal V i is V i
Are connected to the base terminals of an NPN transistor 131 and a PNP transistor 132, respectively, to which emitter terminals are connected via capacitors 111 and 112 for removing the DC component. The base terminal of the transistor 131 is connected to the constant voltage source V CC through a resistor 141, is connected to the anode terminal of the diode 121. The base terminal of the transistor 132 is
Connected to a constant voltage source V EE via a resistor 142,
The diode 122 is connected to the cathode terminal thereof, and the anode terminal of the diode 122 is connected to the diode 127 described above.
Connected to the cathode. The collector terminals of the transistors 131 and 132 are connected to constant voltage sources V CC and V EE , respectively. Such a circuit in a connected relationship with the voltage driver 1 such, taking the connecting point connecting the respective emitter terminals of the output V o Torajisuta 131 and 132. This voltage V o, the capacitor 2
This is configured to be input to the other terminal of the recording head 6 having one end grounded via a series circuit of the resistor 3 and the resistor 3.

入力信号Viのステツプ状の電圧変化は、抵抗器141,14
2、ダイオード121,122から成るバイアス回路を介してト
ランジスタ131,132のベース端子にバイアス電圧と加算
されて入力される。したがつてViの電圧変化は、ほぼそ
のままの電圧変化Voで出力され、前記の式(1)のパル
ス電流IWを記録ヘツド6に供給する。
Step-like change in voltage of the input signal V i is resistor 141,14
2. A bias voltage is added to the base terminals of the transistors 131 and 132 via a bias circuit composed of the diodes 121 and 122, and is input. Voltage change was although connexion V i is output at substantially the same voltage change V o, supplies a pulse current I W of the formula (1) to the recording head 6.

本実施例は、パルス電流の大きさが数百Ao_pの比較
的大電流の記録電流駆動に適する。
This embodiment is suitable for a recording current drive of a relatively large current having a pulse current of several hundred Ao_p .

本実施例によれば、定電圧源VCCおよびVEEからの電流
供給は、ほぼ記録ヘツドに供給するパルス電流に設定で
き、電圧ドライバの低消費電力化が期待できる。
According to the present embodiment, the current supply from the constant voltage sources V CC and V EE can be set to almost the pulse current supplied to the recording head, and a reduction in power consumption of the voltage driver can be expected.

本発明の第3の実施例を第6図により説明する。 A third embodiment of the present invention will be described with reference to FIG.

本実施例は、マルチヘツド装置にパルス電流を供給す
る回路である。各入力信号Vi1〜nは、それぞれ前記の
実施例に示したような電圧ドライバD1〜nに入力され
る。これらの出力Vo1〜nは、それぞれコンデンサC
1〜nと抵抗器R1〜nからなる直列回路を介してマル
チ導体のケーブル7の入力端子に接続される。さらにケ
ーブル7の出力端子はマルチヘツド60の一端が共通化さ
れた各記録ヘツド素子H1〜nの入力端子に接続され
る。マルチヘツド60の共通端子8は前記ケーブルの導体
を介して電圧ドライバの接地端子に接続する。
This embodiment is a circuit for supplying a pulse current to a multi-head device. The input signals Vi1 to Vi are respectively input to the voltage drivers D1 to Dn as described in the above embodiment. These outputs Vo1-n are respectively connected to capacitors C
It is connected to the input terminal of the multi-conductor cable 7 via a series circuit consisting of 1 to n and resistors R 1 to n . Further, the output terminal of the cable 7 is connected to the input terminals of the recording head elements H1 to Hn in which one end of the multihead 60 is shared. The common terminal 8 of the multihead 60 is connected to the ground terminal of the voltage driver via the conductor of the cable.

入力信号Vi1〜nのステツプ状の電圧変化に対応し
て、電圧ドライバD1〜nが電圧出力Vo1〜nし、前記
式(1)によってそれぞれ記録ヘツドH1〜nにパルス
電流を供給する。
In response to the step-like voltage changes of the input signals Vi1 to n , the voltage drivers D1 to n output the voltages Vo1 to n , and supply the pulse currents to the recording heads H1 to Hn according to the above equation (1). I do.

本実施例によれば、一端を共通化したマルチヘツド60
が採用でき、マルチヘツド60の端子数およびケーブルの
導体数をヘツド数nのn+1にすることができるのでマ
ルチヘツド化が容易になる。また、各電圧ドライバD
1〜nの出力電圧Vo1〜nが変化してパルス電流を供給
するタイミングをそれぞれ異ならせることにより、マル
チヘツド60の共通端子8に接続される導体の電流容量お
よび電圧ドライバD1〜n用の定電圧源VCC,VEEの電流
容量を小さくできる効果もある。
According to the present embodiment, the multi-head 60 having one end shared
Can be adopted, and the number of terminals of the multihead 60 and the number of conductors of the cable can be set to n + 1 of the number n of heads, so that the multihead can be easily formed. In addition, each voltage driver D
By changing the timings at which the pulse voltages are supplied by changing the output voltages V o1 to n of the multi-head 60, the current capacity of the conductor connected to the common terminal 8 of the multi-head 60 and the voltage driver D 1 to n There is also an effect that the current capacities of the constant voltage sources V CC and V EE can be reduced.

〔発明の効果〕〔The invention's effect〕

本発明によれば、回路構成の簡単な電圧ドライバによ
る駆動回路で記録ヘツドにパルス電流を供給でき、更
に、記録ヘツドの一端子を電圧源に接続できるので記録
ヘツドの端子の引出しが容易になる。
According to the present invention, a pulse current can be supplied to a recording head by a driving circuit using a voltage driver having a simple circuit configuration, and one terminal of the recording head can be connected to a voltage source, so that the terminal of the recording head can be easily pulled out. .

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の原理構成を示す回路ブロツク図、第2
図は第1図の動作を示すタイミングチヤート、第3図は
本発明によるパルス電流波形の詳細図、第4図乃至第6
図は本発明の実施例を示す回路図、第7図は従来の記録
電流駆動回路を示す回路図である。 1……電圧ドライバ、2……コンデンサ、3……抵抗
器、4……記録ヘツドの抵抗成分、5……記録ヘツドの
インダクタンス成分、6……記録ヘツド、IW……記録電
流、Vi……入力信号、Vo……電圧ドライバ出力。
FIG. 1 is a circuit block diagram showing the principle configuration of the present invention, and FIG.
FIG. 3 is a timing chart showing the operation of FIG. 1, FIG. 3 is a detailed view of a pulse current waveform according to the present invention, and FIGS.
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 7 is a circuit diagram showing a conventional recording current drive circuit. 1 ...... voltage driver, 2 ...... capacitors, 3 ...... resistor, the resistance component of the 4 ...... recording head, the inductance component of the 5 ...... recording head, 6 ...... recording head, I W ...... recording current, V i …… Input signal, V o …… Voltage driver output.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】2端子の記録ヘッドにパルス状の記録電流
を供給する磁気記録装置の、パルス電流の駆動時に電位
が一定量変化する電圧ドライバと、一端を定電圧源に接
続した2端子の記録ヘッドと、該電圧ドライバと記録ヘ
ッドの他端子とをコンデンサと抵抗器の直列回路で接続
した磁気記録装置において、前記コンデンサの容量C
と、前記抵抗器の抵抗値Rを、記録ヘッドの抵抗成分を
RH、インダクタンス成分をLHとすると、C=4LH/(R+
RHに設定することを特徴とする磁気記録装置。
1. A magnetic recording apparatus for supplying a pulse-like recording current to a two-terminal recording head, a voltage driver whose potential changes by a fixed amount when driving the pulse current, and a two-terminal one terminal connected to a constant voltage source at one end. In a magnetic recording apparatus in which a recording head, the voltage driver and the other terminal of the recording head are connected by a series circuit of a capacitor and a resistor, the capacitance C of the capacitor
And the resistance component of the recording head,
Assuming that R H and the inductance component are L H , C = 4L H / (R +
R H ) 2 .
JP63091545A 1988-04-15 1988-04-15 Magnetic recording device Expired - Fee Related JP2595032B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63091545A JP2595032B2 (en) 1988-04-15 1988-04-15 Magnetic recording device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63091545A JP2595032B2 (en) 1988-04-15 1988-04-15 Magnetic recording device

Publications (2)

Publication Number Publication Date
JPH01264607A JPH01264607A (en) 1989-10-20
JP2595032B2 true JP2595032B2 (en) 1997-03-26

Family

ID=14029453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63091545A Expired - Fee Related JP2595032B2 (en) 1988-04-15 1988-04-15 Magnetic recording device

Country Status (1)

Country Link
JP (1) JP2595032B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1394907B1 (en) * 2009-07-22 2012-07-20 Bridgestone Corp METHOD AND PLANT FOR RECONSTRUCTION OF A TIRE

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6334111Y2 (en) * 1980-10-24 1988-09-09

Also Published As

Publication number Publication date
JPH01264607A (en) 1989-10-20

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