JPH01264482A - Television signal receiver - Google Patents

Abstract

PURPOSE:To display a high definition picture by providing a vertical filter. increasing the number of horizontal scanning lines by 7/5, dividing the multiplied horizontal scanning lines, and supplying the divided horizontal scanning lines to an indicator. CONSTITUTION:The television signal of a high vision system is made into a digital signal at an A/D converter 2 and written to a frame memory 3 to store the signal at least for one field. For data read from the memory 3, the number of the horizontal scanning lines is increased so that seven horizontal scanning lines of an NTSC system can be generated from five horizontal scanning lines of the high vision system at a vertical filter 4. The increased horizontal scanning lines are divided into three in a vertical direction, further divided into four in a scanning direction, and supplied to an indicator CRT5. The CRT5 is driven by the television signal, in the CRT5 twelve CRTs arranged in total, four CRTs in a horizontal direction and three CRTs in the vertical direction, and one picture is composed of the twelve CRTs. Further, the scanning lines divided into three in the vertical direction are stored in the memory 3 for every part. Thus, the picture of the high vision system can be displayed on the indicator CRT5 of the NTSC system without deteriorating the property of high definition of the picture.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television signal receiving device that displays one image on a screen constituted by a plurality of display devices.

[Summary of the invention]

In the present invention, the high-definition TV signal is NTS
Converted to C format TV signal, 4 units horizontally.

It is displayed on a screen made up of a total of 12 displays, 3 vertically.

[Conventional technology]

The current television broadcasting standard in our country is NTSC.
It is considered a method. On the other hand, in order to obtain higher quality images, it has been proposed to change the broadcasting system to a high-definition system.

Since high-definition TV signals are different from NTSC TV signals, they cannot be received as is by a conventional NTSC TV receiver.

Therefore, the high-definition TV signal is converted to an NTSC TV signal.
It has been proposed that the signal be converted to a V signal and received by an NTSC TV receiver.

[Problem to be solved by the invention]

However, such a conventional proposal is a high-definition system.
Since the V signal is received by a single NTSC TV receiver, there is a drawback that only an image with the quality of the NTSC system can be obtained. Therefore, even though the source was a high-definition system, its advantages were not utilized and it was not possible to view high-quality images.

Therefore, the present invention enables high-definition images to be displayed on NTSC TV receivers (including projection TVs, etc.) while maintaining their high quality.

[Means to solve the problem]

The television signal receiving device of the present invention includes an A/D converter for A/D converting a high-definition TV signal;
a memory for storing at least one field of a converted TV signal; a vertical filter for converting five horizontal scanning lines of a high-definition TV signal to seven horizontal scanning lines of an NTSC TV signal; A total of 12 machines were placed, 4 in the direction and 3 in the vertical direction. NTSC system T
A horizontal scanning line constituting one field is divided into three in the vertical direction, and the memory is configured in three stages and divided into three. Each part is stored in each stage.

[Effect]

For example, one screen is constructed by arranging 12 NTSC CRTs, 4 horizontally and 3 vertically. The horizontal scanning line constituting one field is divided into three vertically,
Each portion is stored in memory. The data read from the memory is increased in number of horizontal scanning lines to produce seven horizontal scanning lines of the NTSC system from five horizontal scanning lines of the high-definition system. The increased horizontal scanning line is divided into three in the vertical direction and further divided into four in the scanning direction, and is supplied to each CRT.

Therefore, a high-definition image can be displayed on an NTSC display without sacrificing its high quality.

〔Example〕

FIG. 2 schematically represents an NTSC TV screen. In this method, the screen aspect ratio is set to 4:3, and the number of horizontal scanning lines in one frame is 525.
It has become a book. Of these, the number of effective horizontal scanning lines appearing on the actual screen is, for example, 483. Further, when the number of samplings for one horizontal scanning line in digitally processing an image is 360, the number of samplings for the effective screen portion is, for example, 297.

FIG. 3 schematically represents a high-definition TV screen. In this method, the screen aspect ratio is 16
The number of horizontal scanning lines in a pair of 9.1 frames is 1125. Further, in the above example, the number of horizontal scanning lines on the effective screen is 1035. When the number of samplings for one horizontal scanning line is 1440, the number of samplings for the effective screen portion is 1188.

FIG. 4 shows the configuration of the screen according to the present invention. In the present invention, a CRT (
11 to 34 (which may be liquid crystal displays, etc.) are arranged, 4 in the horizontal direction and 3 in the vertical direction, 12 in total, to form one screen. Each CRT corresponds to NTSCi format, 4:3
If the CRTs are arranged in this way, the aspect ratio of the screen made up of 12 CRTs will be 16:9, which matches the aspect ratio of the high-definition system. can.

However, since the number of horizontal scanning lines on each CRT is 525, in order to display one image on the entire screen, 15
75 (=525×3) horizontal scanning lines are required. The number of horizontal scanning lines in high-definition is 1125, so
It is necessary to increase this to 1575 lines. Since the least common multiple of both is 7875, the number can be increased by generating seven horizontal scanning lines of the NTSC system from five horizontal scanning lines of the high-definition system.

Of the 1,575 horizontal scanning lines generated in this way, the first 525 are supplied to the four CRTs 1 to 14 in the upper row, the first 525 to the CRTs 21 to 24 in the middle row, and the last 525 to the lower row CRTs. If each CRT is supplied to CRTs 31 to 34, each CRT will receive 5
It will be scanned with 25 horizontal scanning lines.

However, since four CRTs are arranged horizontally, the horizontal scanning line is divided horizontally into four equal parts, and each CRT nl to n
By sequentially supplying 174 signals of the original length to CRT 4, one image can be displayed by 12 CRTs.

FIG. 5 is a block diagram of a television signal receiving apparatus according to the present invention. In the figure, 1 is a high-definition TV camera, which is a high-definition television (TV).
Output a signal. Of course, the TV camera 1 can be replaced with a high-definition television tuner, VTR, or the like.

2 is an A/D converter, which converts the input TV signal into A/D converter.
Convert. A frame memory 3 stores one frame of A/D converted TV signals. 4 is a vertical filter that changes the number of horizontal scanning lines. 5 is an NTSC type CRT arranged as described above.

FIG. 1 is a more detailed block diagram of the apparatus shown in FIG. The A/D converter 2 A/D converts the input high-definition TV signal into 8-bit digital data using, for example, a 48.6 MHz clock. A/D converter 2
The outputs are input to latch circuits D1 and D2 and latched. Latch circuits D1 and D2 are operated by the negative and positive edges of the 24 and 3 MHz clocks, respectively.

17 of the first field among the outputs of the latch circuit D1
The higher 4 bits of the data corresponding to horizontal scanning line 3 are stored in the memory MFMAIQU, and the lower 4 bits are stored in the memory MFMAIQL. Of course, it is theoretically possible to configure these as one memory.

In the same way, the data of the next 1/3 horizontal scanning line is
MFMA2QU, 20L The last 1/3 data is stored in the memories MFMA30U, 3L, respectively.The write clock for these memories is 24.3MHz.
The negative edge of is used.

On the other hand, the data of the same field output from the latch circuit D2 is also stored in the memories MFMAIQU, 1, Q L,
Stored in 2QU, 2QL, 3QU, and 3QL. The write clock for these memories is 24,3M
A positive edge in Hz is used.

In this way, data for one field is stored in these memories.

However, as described later, seven consecutive horizontal scanning lines (H)
Since one new horizontal scanning line is generated by processing the above, the upper memory MFMAIQ
The last 3 written to U, IQL, IQU, IQL,
The data for H is stored in the middle memories MFMA2QU and 2QL.
, 2QU, and 20L are also written at the same time. The same applies to between the middle memory and the lower memory, and between the lower memory and the upper memory.

In the same way as above, the data for the next one field is saved in the memo IJMFMBIQU, IQL, 2QU, 20L, 30U.
, 3C) L, IQU, IQL, 2QU, 2QL, 3QU
-3QL, respectively.

In this way, the memories MFMAIQU to MFMB3Q
Data for one frame is stored in the frame memory 3 constituted by L.

The data written in the upper memories MFMAIQU, 1 and IQU, IQL of one field are 11, 3.
It is read out at the negative and positive edges of the MHz clock and latched into latch circuits D31 and D41. The data latched in latch circuits D31 and D41 are 22, 7
The signals are input to a latch circuit D51 that operates with a MHz clock and are integrated.

The data output from the latch circuit 51 is transmitted to the vertical filter 4.
1 is input. Also, the upper memory of the other field is MFMBIQU, 1, IQU.

Similarly, the data stored in IQL is also applied to vertical filter 4.
1 is input.

Similarly, the memory MFM in the middle of the two fields is
A2koU, 2koL, 2QU, 2QL, MFMB2QU,
The data of 2OL, 2QU, 2QL is sent to the latch circuit D32.
．． 42.52 to the vertical filter 42, and the lower memory MFMA3CIU, 3, 3QU, 3QL,
FMB30U.

The data of 3cLL, 3QU, 3QL is sent to the latch circuit D3.
3, 43, and 53 to the vertical filter 43, respectively.

FIG. 6 shows the configuration of the vertical filter 41 (and the same applies to 42 and 43). The vertical filter 41 includes a coefficient circuit consisting of IH memories H1 to H7 as delay means for delaying an input signal by 1H, and an F ROM for multiplying by a predetermined coefficient.
7, adder circuits A11 to A16, and latch circuits D61 to 67.71 to 77.81.82.

These circuits are driven by a 22.68 MHz clock. For coefficient circuits 1 to 7, the coefficients are changed in 7H cycles.

When the signal output from a certain IH memory in a certain IH interval in the vertical filter is Qn, the signal output from that memory in the next IH interval is Qn+1, and the output of the vertical filter is Pi, the following formula holds. do.

P,=h-,,Q-,+h-1. Q-, +h-, Q-,
+h, Q, +h, Q, +h1. Q, ÷hz1Q3PL”
h-1q Q-z "h-xz Q-1"h-s Qo
”hz QL ”hgQz ”htiQz ”hza
Q4Pz “h-2IQ-Z”h-s, tQ-1”h
-taQo "h-xQt+h4Qz"11txQi
”HTL mouth.

p, = h-2□Q-, ÷h-tsQo”h-sQt”h
-tQz"h'gQt"ht3Q4"tlzoQsp4
=h-,. Q0÷h-1, Qwork÷h-sQz”hlQx
"hsQ4"hlsQs"hx2QsPs"h--qQ
l"h-x□Qz"h-qQa"h3Q*"htaQs
"htiQs"hz*QtP e "h-z 3 QL
"h -xs Qz "h-s Q3"h-i Q4
”hs Qs ”htzQ-”ht 1QtP7 =(
Pa)"h-zxQz +h-1403"h-704
"hoQs "ht(L"ht4Qt"h2xQn where hn is the impulse response of the filter and hn
=h−n.

In this way, one new horizontal scanning line is generated by multiplying each of the seven consecutive horizontal scanning lines by a predetermined coefficient and adding the resultant.

This process is executed at the timing shown in FIG. In other words, each IH memory sequentially transfers the first 2H section data, but does not transfer data in the first IH section, transfers the next 3H section data, and stops transferring the next IH section data. do.

However, the constants of this calculation coefficient circuit are changed for each H, and the output is calculated and generated for each H. As a result, new horizontal scanning lines are generated at a rate of seven out of five horizontal scanning lines.

The first 1/4 of the IH data output from the vertical filter 41 is stored in the IH memory ○HMII using one of the following methods.
/4 data is memory OHM12. 3rd 1/4 data is memory OHM13, last 1/4 data is OH
M14, each clocked at 22°7 MHz. Data written to each memory is 5.67MH
z clock, and each D/A converter DAII
to 14, D/A converted and horizontally arranged CR
It is output to T (monitors) 11 to 14.

Each of the memories OHMII to 14 contains two IH memories, and when writing to one, reading from the other is performed alternately.

Thereafter, data output from the vertical filter 42 is similarly supplied to the middle stage CRTs 21 to 24 via the memories OHMs 21 to 24 and the D/A converters DA21 to DA24. Further, the data output from the vertical filter 43 is sent to the memories OHM 31 to 34 and the D/A converters DA31 to 34.
The signal is supplied to the lower CRTs 31 to 34 via the CRTs 31 to 34. In this way, one image is displayed on 12 CRTs.

Even if the vertical filter 4 is placed before the frame memory 3, it can operate in the same way. However, doing so not only complicates the configuration of the vertical filter 4 but also increases the number of input terminals to the frame memory 3.

In addition, in the above, the horizontal scanning line constituting one screen (field) is divided vertically into three and stored in three stages of memory, but it is divided into four horizontally and stored in four stages of memory. It is also possible to store it in memory. However, doing so increases the capacity of the frame memory.

〔Effect of the invention〕

As described above, according to the present invention, a total of 12 NTSC CRTs are arranged 4 horizontally and 3 vertically to form one screen, the number of horizontal scanning lines of the high-definition system is increased 715 times, and each Since we decided to divide the supply into CRTs, the NTS
It becomes possible to display high-quality images using a C-type CRT.

[Brief explanation of the drawing]

FIG. 1 is a more detailed block diagram of the apparatus shown in FIG. 5, FIG. 2 is an explanatory diagram of the NTSC system, FIG. 3 is an explanatory diagram of the high-definition system, FIG. The figure is a block diagram of the television signal receiving apparatus of the present invention, FIG. 6 is a block diagram of the vertical filter in FIG. 1, and FIG. 7 is a timing chart of the vertical filter. 1...TV camera 2...A/D converter 3...Frame memory 4...Vertical filter 5...CRT Patent applicant Pioneer Corporation

Claims (1)

[Claims] An A/D converter that A/D converts a high-definition TV signal, a memory that stores at least one field of the A/D-converted TV signal, and five high-definition TV signals. NT horizontal scanning line
A vertical filter converts an SC TV signal at a rate of 7 horizontal scanning lines, and multiple filters driven by NTSC TV signals, 4 in the horizontal direction and 3 in the vertical direction, 12 in total, are arranged. The horizontal scanning lines constituting one field are three in the vertical direction.
and the memory is configured in three stages, and each of the three divided parts is stored in each stage.