JPH01264212A - Multi-layer electrode for electronic parts - Google Patents
Multi-layer electrode for electronic partsInfo
- Publication number
- JPH01264212A JPH01264212A JP9169088A JP9169088A JPH01264212A JP H01264212 A JPH01264212 A JP H01264212A JP 9169088 A JP9169088 A JP 9169088A JP 9169088 A JP9169088 A JP 9169088A JP H01264212 A JPH01264212 A JP H01264212A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- layer
- solder
- melting point
- soldering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 claims abstract description 50
- 238000005476 soldering Methods 0.000 claims abstract description 33
- 238000002844 melting Methods 0.000 claims abstract description 26
- 230000008018 melting Effects 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 abstract description 5
- 238000007747 plating Methods 0.000 description 11
- 238000007711 solidification Methods 0.000 description 7
- 230000008023 solidification Effects 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 239000003985 ceramic capacitor Substances 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- 229910052573 porcelain Inorganic materials 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910019142 PO4 Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 description 2
- 239000010452 phosphate Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 241000270666 Testudines Species 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 239000002003 electrode paste Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000004447 silicone coating Substances 0.000 description 1
- 229920006268 silicone film Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Abstract
Description
【発明の詳細な説明】 ［Ｊｉｅ業ヒの利用分野］ 本発明は、電子部品用多層構造電極に１月する。[Detailed description of the invention] [Application field of Jie business] The present invention is applied to multilayer structure electrodes for electronic components.
特に、磁器構造上に形成筋れる電極で、外部との接合に
ハンダ付けを用いる場合に、ハンダ付は層の凝固収縮に
よる影響を受は骸い多層構造電極に関する。In particular, when soldering is used to connect an electrode formed on a porcelain structure to the outside, the soldering is not affected by the solidification and shrinkage of the layers, and it relates to a multilayer structure electrode.
［従来の技術］
従来、円ｎｒｊ通型磁器コンデンサの電極は、銀電極ペ
ーストの焼さ付は又は無電解メツキ等の化学メツキによ
り形成され、該電極と外部リードは、鏝ハンダ又はハン
ダデイツプ等によって接続される。しかし、このような
単ｗｊ電極層でかつ第１図に示したような穴の内面に形
成された電極をハンダ付けすると、ハンダが凝固すると
きに収縮Ｃるために、電極は穴の内面に向かう応力を受
け、素地と電極間に剥離を生じて電気的特性の劣化をお
こす可（ｆ：性が多かった。[Prior Art] Conventionally, the electrodes of circular Nrj type ceramic capacitors are formed by baking a silver electrode paste or by chemical plating such as electroless plating, and the electrodes and external leads are formed by iron soldering or solder dip. Connected. However, when such a single wj electrode layer and an electrode formed on the inner surface of a hole as shown in FIG. When subjected to stress directed toward the electrode, peeling may occur between the substrate and the electrode, resulting in deterioration of electrical characteristics (f: most likely).
一方、銀焼き付は電極では、ハンダによる電極喰われが
生じやすく、それによる性能の低下等の問題があった。On the other hand, silver-baked electrodes tend to be eaten away by solder, which poses problems such as a decrease in performance.
これらの欠点を改良するために、ハンダによる電極喰わ
れを防止する目的では、Ａｇ電極に代えてＣｕ％ Ｎｉ
等の耐ハンダ浸食性金属を用いたメツキ電極を形成し、
かつ素地と電極の剥離を防止するためには、下地電極層
と、ハンダ付は用電極層との間に、ハンダの凝固収縮に
より発生する応力の緩衝層を設けた電極構造が、提案さ
れている。この緩衝層としては、シリコーン被膜及び燐
酸塩の焼き付は被膜等が利用された。In order to improve these drawbacks, Cu%Ni was used instead of the Ag electrode in order to prevent the electrode from being eaten away by solder.
A plating electrode is formed using solder corrosion resistant metal such as
In addition, in order to prevent peeling between the substrate and the electrode, an electrode structure has been proposed in which a buffer layer for stress generated by solidification and shrinkage of the solder is provided between the base electrode layer and the soldering electrode layer. There is. As this buffer layer, a silicone coating and a phosphate coating were used.
然し乍ら、これらの提案方法では、構造上の管理が困難
で、シリコーン被膜を用いた場合には、膜厚の不足ない
し膜形成が不完全になったときには、緩衝層としての効
果がなく、膜が厚過ぎると、絶縁層となって、接合電極
層として作用せず、また、燐酸塩焼き付けを利用する場
合には、下地電極層の酸化が生じ易い等の困難な点があ
る。However, with these proposed methods, it is difficult to control the structure, and when a silicone film is used, if the film thickness is insufficient or the film formation is incomplete, it will not be effective as a buffer layer and the film will deteriorate. If it is too thick, it becomes an insulating layer and does not function as a bonding electrode layer, and when phosphate baking is used, there are difficulties such as oxidation of the underlying electrode layer.
更に、これら緩衝層を用いる緩衝効果は、磁器素地と下
地電極層との間に得られる接合強度（剥離強さ）及びド
地電極層とハンダ付は用電極層との間に接合強度（Ｈ離
強さ）の差を利用しており、緩衝層を設けることにより
、下地電極層とハンダ付は用電極層との間に、部分的剥
離を起こさせることである。然し乍ら、素地体の強度が
弱い場合には、素地と下地Ｔｔｔ、極層との間で剥離を
起こし、電気的特性が劣化するという問題があるもので
ある。Furthermore, the buffering effect using these buffer layers is determined by the bond strength (peel strength) obtained between the ceramic base and the base electrode layer and the bond strength (H) between the base electrode layer and the soldering electrode layer. By providing a buffer layer, partial peeling occurs between the base electrode layer and the soldering electrode layer. However, if the strength of the base body is weak, there is a problem in that peeling occurs between the base body, the base Ttt, and the pole layer, resulting in deterioration of electrical characteristics.
［発明が解決しようと４る問題点］
電ｆ・部品用電極において、例えば、第１１４に示唆゛
ような構造の電子部品で穴の内面に形成された電極で、
ハンダ付は時に、ハンダの凝固収縮による内面に向かう
応力を受ける形状の電子一部品電極において、素地強度
の弱い場合にも、ド地電極層とハンダ付は用電極層の間
でハンダの凝固収縮により生じる応力を緩和して、電気
的特性の劣化を生じない安定した特性が得られる電極構
造を提供することを本発明の目的とするものである。[4 Problems to be Solved by the Invention] In an electrode for an electronic component, for example, an electrode formed on the inner surface of a hole in an electronic component having a structure as suggested in No. 114,
Soldering is sometimes caused by the solidification and shrinkage of solder between the base electrode layer and the soldering electrode layer, even when the strength of the electronic component electrode is weak and the base electrode layer is subject to stress directed toward the inner surface due to solidification and shrinkage of the solder. An object of the present invention is to provide an electrode structure that can obtain stable characteristics without deterioration of electrical characteristics by alleviating the stress caused by this.
［発明の構成コ
［問題点を解決Ｖるための手段］
本発明は、ド地電極層と、外部部材とのハンダ付けを行
なう耐ハンダ性電極層の間に低融点ハンダ層を設け、か
つ該低融点ハンダ層の融点が、外部部材とのハンダ付け
に用いるハンダの融点よりも低いことを特徴とする３層
又はそれ以上の多層構造からなる電子部品用多層構造電
極である。[Structure of the invention] [Means for solving the problems] The present invention provides a low melting point solder layer between a ground electrode layer and a solder-resistant electrode layer for soldering with an external member, and The present invention is a multilayer structure electrode for electronic components having a multilayer structure of three or more layers, characterized in that the melting point of the low melting point solder layer is lower than the melting point of the solder used for soldering with an external member.
［作用］
即ら、ド地電極層とハンダ付は用電極層との中間に、ハ
ンダ付けに用いるハンダよりも低い融点のハンダ層を形
成することにより、該ハンダ層が、ハンダ付は用ハンダ
の凝固収縮により発生する応力を緩和して素地と下地電
極層上の間の剥離を防Ｉ卜するものである。[Function] That is, by forming a solder layer having a melting point lower than that of the solder used for soldering between the ground electrode layer and the soldering electrode layer, the solder layer can be used as the soldering material. This prevents peeling between the substrate and the underlying electrode layer by relieving the stress generated by solidification and shrinkage of the electrode layer.
本発明によると、電ｒ部品用の電極に多層構造を用いる
もので、素地と接触接合している下地電極とハンダ付け
で直接外部部材と接合するハンダ付は用電極層の中間に
、ハンダ付けに用いるハンダの融点よりも低い融点を有
す゛るハンダによるハンダ層を設けたものである。According to the present invention, a multilayer structure is used for an electrode for an electric component, and a base electrode that is in contact with a substrate and a soldering electrode that is directly connected to an external member by soldering are soldered in the middle of the electrode layer. A solder layer is provided with a solder having a melting point lower than that of the solder used for the solder.
本発明の多層構造電極を図面を参照して説明すると、第
１図は、円筒貫通型磁器：ｌンデンサの断面図であり、
貫通した円筒形の貫通穴表面及び円筒外周表面に本発明
による多層構造電極を形成したものである。即ち、貫通
円筒の全表面にわたり本発明による多層構造電極を設け
、必要箇所を切除して、所望の電極を得るものである。To explain the multilayer structure electrode of the present invention with reference to the drawings, FIG. 1 is a cross-sectional view of a cylindrical penetrating ceramic:
A multilayer structure electrode according to the present invention is formed on the surface of a cylindrical through hole and the outer peripheral surface of the cylinder. That is, the multilayer structure electrode according to the present invention is provided over the entire surface of the penetrating cylinder, and the desired electrode is obtained by cutting out the necessary portions.
従って、本発明の多層＃１３１１電極の構造は、第２図
の断面図に示すもので、磁器素体１の表面に５順次、下
地電極層２、中間低融点ハンダ層３、ハンダ付き電極層
４、ハンダ層５を有するものである。その多層構造電極
を拡大して示したものが、第２図の断面図である。更に
、第３図は、ハンダ層５で、リード引出＠Ｂに接合され
、冷却されることにより歪み応力がかかったことでの、
歪む様イ・を誇張して、断面図で示したものである。Therefore, the structure of the multilayer #1311 electrode of the present invention is shown in the cross-sectional view of FIG. 4. It has a solder layer 5. The cross-sectional view of FIG. 2 is an enlarged view of the multilayer structure electrode. Furthermore, FIG. 3 shows that the solder layer 5 is bonded to the lead drawer @B and is subjected to strain stress by being cooled.
This is an exaggerated cross-sectional view of the distortion.
従って、本発明による多層構造電極は、下地電極層やハ
ンダ付は用電極層の材質及びその電極形成法に本質的に
依存するものでなく、材質としては、一般に電極形成用
として用いられているＣｕ、Ｎｉ、Ｃｒ、Ｚｎ等を用い
ることができ、メツキ、焼付及び蒸着等で形成したもの
でよい。Therefore, the multilayer structure electrode according to the present invention does not essentially depend on the material of the base electrode layer or the soldering electrode layer and the method of forming the electrode, and the material is generally used for electrode formation. Cu, Ni, Cr, Zn, etc. can be used, and the material may be formed by plating, baking, vapor deposition, or the like.
また、本発明により利用される中間ハンダ層のハンダの
融点は、ハンダ付けに用いるハンダの融点よりも低くけ
ればよく、他の条件は特になく、その厚みも最小値で数
μ位あれば、所期の効果が得られるものである。Further, the melting point of the solder in the intermediate solder layer used in the present invention need only be lower than the melting point of the solder used for soldering, and there are no other conditions, and the minimum thickness of the solder should be about several microns. The desired effect can be obtained.
次に、本発明の多層構造電極の作成法と具体例を示すが
、本発明は次の説明に限定されるものではない。Next, a manufacturing method and specific examples of the multilayer structure electrode of the present invention will be shown, but the present invention is not limited to the following explanation.
［実施例１］
］−記の第１図で説明した構造で、多層構造電極を、円
筒貫通型磁器コンデンサを次の順で形成した。[Example 1] A multilayer structure electrode and a cylindrical through-type ceramic capacitor were formed in the following order with the structure explained in FIG.
即ち、ＪＩＳ規定でＹ級のＢ ａ Ｔ ｉ Ｏｓ系磁器
素体１の表面上に先ｒ、ド地電極層２を無電解Ｎｉメツ
キ法により形成し、その上に低融点ハンダ層３を電気メ
ツキでＢｉ：５ｎ−７０：３０（重量％）で形成し、更
に、その上に、電気Ｎｉメツキにより、ハンダ付は用電
極層４を形成し、その」二にハンダ層５をＳｎ：Ｐｂ−
９０：１０（重重％）に１「気メツキにより、形成した
。That is, a ground electrode layer 2 is first formed on the surface of a Y-class B a Ti Os ceramic body 1 according to JIS regulations by an electroless Ni plating method, and a low melting point solder layer 3 is electrically applied thereon. Bi:5n-70:30 (wt%) is formed by plating, and on top of that, an electrode layer 4 for soldering is formed by electric Ni plating, and then a solder layer 5 is formed by Sn:Pb. −
It was formed by plating at a ratio of 90:10 (w/w %) to 1".
これに対して、比較例１として、下地ｉｎ層２及びハン
ダ層５のみを形成した。On the other hand, as Comparative Example 1, only the base in layer 2 and the solder layer 5 were formed.
以上のようにして形成し、共晶ハンダ（Ｓｎ：Ｐｂ−６
３： ３７）によるハンダ接合で組立てた円筒貫通型磁
器；Ｉンデン→ノ゛について、組立て前後の特性（春暖
）を測定した。この結果を第１表に示−°。Formed as described above, eutectic solder (Sn:Pb-6
3: Characteristics (spring warmth) before and after assembly of the cylindrical penetrating porcelain assembled by soldering according to 37) were measured. The results are shown in Table 1.
亀１Ｊ
１ ２３７１ １．１７ ＋２．１８ １
．１３比較１ ２２８３ １．２８ −１０．５６
２．１３初期特性とは、組立てる前の作成しただけ
のコンデンサの容量を示し、変化率とは、ハンダを用い
て組立てた後の容量の変化した％を表わすものである。Turtle 1J 1 2371 1.17 +2.18 1
．． 13 comparison 1 2283 1.28 -10.56
2.13 Initial characteristics indicate the capacitance of the capacitor just created before assembly, and rate of change indicates the percentage change in capacitance after assembly using solder.
［実施例２］
Ｓ ｒ Ｔ ｉ Ｏｓ系半導体磁器素体１に対して、表
面上に先４′、下地電極層２を無電解Ｎｉメツキ法によ
り形成し、その上に低融点ハンダ層３を電気メツキでＢ
ｉ：５ｎ＝７０二３０（ｆｆｌＱ％）で形成し、更に、
その上に、電気Ｎｉメツキにより、ハンダ付は用電極層
４を形成し、そのＬにハンダ層５をＳｎ：Ｐｂ＝９０：
１０（重量％）に電気メツキにより、形成した。[Example 2] A base electrode layer 2 is first formed on the surface of the S r Ti Os based semiconductor ceramic body 1 by electroless Ni plating method, and a low melting point solder layer 3 is formed thereon. B with electric plating
i:5n=70230 (fflQ%), and further,
On top of that, a soldering electrode layer 4 is formed by electric Ni plating, and a solder layer 5 is applied to the L of the electrode layer 4 with Sn:Pb=90:
10 (wt%) by electroplating.
これに対して、比較例２として、下地’ｉｔｔ極層２及
びハンダ層５のみを形成した。On the other hand, as Comparative Example 2, only the base 'itt electrode layer 2 and the solder layer 5 were formed.
更に、比較例３として、実施例２の低融点ハンダ層の代
わりに、ハンダ層５と同じＳｎ：Ｐｂ−９０：１０（ｆ
ｒＬｂｔ％）層を電気メツキにより形成した。Furthermore, as Comparative Example 3, instead of the low melting point solder layer of Example 2, the same Sn:Pb-90:10 (f
rLbt%) layer was formed by electroplating.
以−にのようにして形成した電極により共晶ハンダを用
いて、ハンダ接合で組立てた円筒貫通型磁器−Ｊンデン
サについて、組立て前後の特性（容１辻）を測定した。Characteristics (one cross-section) of a cylindrical penetrating porcelain capacitor assembled by soldering using the electrodes formed as described above and after assembly were measured using eutectic solder.
この結果を第２表に示す。The results are shown in Table 2.
匙又１
２ ６５１８ ０．６７ ＋０．８ ０
．６２比較２ ６３２０ １．６３ −２１．４
５．６０比較３ ６５５０ ０．８４ −１２
．３ ２．４０実施例１は、比較的素地強度の強い
Ｂ ａ Ｔ ｉ Ｏｓ系のＪ Ｉ Ｓ−Ｙ級Ｂ特性に適
用したものであり、実施例２は、素地強度の弱いＳ ｒ
Ｔ ｉ ＯＩ系半導体−ｌンデンサのＪＩＳ−Ｙ級Ｒ
特性に適用したものであり、測定結果は、１０個の試料
の１Ｖ均値をとった。Spoonmata 1 2 6518 0.67 +0.8 0
．． 62 comparison 2 6320 1.63 -21.4
5.60 comparison 3 6550 0.84 -12
．． 3 2.40 Example 1 is applied to the JIS-Y class B characteristics of Ba TiOs, which has relatively strong substrate strength, and Example 2 is applied to S r, which has weak substrate strength.
JIS-Y class R of T i OI semiconductor-l capacitor
This was applied to the characteristics, and the measurement results were the average value of 1V of 10 samples.
これらの結果から、実施例１．２は、比較例１．２．３
に比べて、容量特性の劣化が少なく、中間電極層に低融
点ハンダ層を配したことにより、顕著な効果が認められ
る。From these results, Example 1.2 is similar to Comparative Example 1.2.3.
Compared to this, there is less deterioration in capacitance characteristics, and a remarkable effect is recognized by disposing a low melting point solder layer in the intermediate electrode layer.
また、実施例１と２を比較すると、実施例２の素値強度
の弱い材料に適用しても、実施例１と比べて、本発明に
よる効果に差が認められない。Moreover, when comparing Examples 1 and 2, even when applied to the material of Example 2 with a low elementary strength, no difference is observed in the effect of the present invention compared to Example 1.
尚、実施例では、円筒貫通型磁器コンデンサを例にとり
説明したが、本発明の多層構造電極は、第１図に示１よ
うな穴の内面に形成され、１つ、ハンダ付きにより穴の
内面に向かう応力を受ける形状の電極を有する磁器製電
子部品に有用なものであり、以上の実施例に限定される
ものではない。In the embodiment, a cylindrical through-type ceramic capacitor was used as an example. However, the multilayer structure electrode of the present invention is formed on the inner surface of a hole as shown in FIG. The present invention is useful for ceramic electronic components having electrodes shaped to receive stress toward , and is not limited to the above embodiments.
〔発明の効果］
本発明の多層構造電極を利用すると、その電極をハンダ
付けして用いる場合に、ハンダ付けに用いるハンダが、
冷却するときに、凝固収縮す−ることにより発生４−る
応力を低融点ハンダ層が遅れて凝固ｒることによって緩
和するため、ハンダ付けによる電気特性の劣化の少ない
磁器製電子部品用電極構造が得られ、特に、円筒貫通型
磁器コンデンサに適用すると、ハンダ付けに対して信頼
性の高い組立構造体が得られるなどの技術的な効果が得
られた。[Effects of the Invention] When the multilayer structure electrode of the present invention is used, when the electrode is soldered, the solder used for soldering is
Electrode structure for porcelain electronic components with less deterioration of electrical properties due to soldering, since the stress generated by solidification and contraction during cooling is alleviated by the slow solidification of the low melting point solder layer. In particular, when applied to a cylindrical through-type ceramic capacitor, technical effects such as an assembled structure with high reliability against soldering were obtained.
４、図面の？！ｌ＃ｔＬな説明
第１図は、本発明による多層構造電極を付与した円筒貫
通型磁器コンデンサを断面図で示したものである。4. What about the drawings? ! DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a cross-sectional view of a cylindrical through-type ceramic capacitor provided with a multilayer structure electrode according to the present invention.
第２図は、本発明による多Ｊ！！構造電極層を拡大して
示した拡大断面図である。FIG. 2 shows the multi-J! ! FIG. 3 is an enlarged cross-sectional view showing a structural electrode layer.
第３図は、更に、本発明による多層構造電極層にハンダ
付けしたときの拡大断面図である。FIG. 3 is an enlarged cross-sectional view of the multilayer structure electrode layer according to the present invention when soldered.
［主要部分の符号の説明］
ｉ、、、、磁器素体
２、、、、下地電極層
３、、、、低融点ハンダ層
４、、、、ハンダ付は用″ｒｒｔ極層
５、、、、ハンダメツキ層（ハンダ付性改善）６、、、
、ハンダ付け
７、、、、リード引出線
特許出願人 ケーシーケー株式会社[Explanation of symbols of main parts] i, Ceramic body 2, Base electrode layer 3, Low melting point solder layer 4, Soldered is for "rrt pole layer 5," , solder plating layer (solderability improvement) 6.
, Soldering 7, Lead wire patent applicant KC Corporation
Claims (1)
ンダ性電極層の間に低融点ハンダ層を設け、かつ該低融
点ハンダ層の融点が、外部部材とのハンダ付けに用いる
ハンダの融点よりも低いことを特徴とする３層又はそれ
以上の多層構造からなる電子部品用多層構造電極。A low melting point solder layer is provided between the base electrode layer and the solder resistant electrode layer for soldering with the external member, and the melting point of the low melting point solder layer is higher than the melting point of the solder used for soldering with the external member. A multilayer structure electrode for electronic components consisting of a multilayer structure of three or more layers, characterized by a low resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9169088A JP2587858B2 (en) | 1988-04-15 | 1988-04-15 | Multilayer structure electrodes for electronic components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9169088A JP2587858B2 (en) | 1988-04-15 | 1988-04-15 | Multilayer structure electrodes for electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01264212A true JPH01264212A (en) | 1989-10-20 |
| JP2587858B2 JP2587858B2 (en) | 1997-03-05 |
Family
ID=14033502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9169088A Expired - Lifetime JP2587858B2 (en) | 1988-04-15 | 1988-04-15 | Multilayer structure electrodes for electronic components |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2587858B2 (en) |
-
1988
- 1988-04-15 JP JP9169088A patent/JP2587858B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2587858B2 (en) | 1997-03-05 |
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