JPH01262591A - Display driving device - Google Patents

Abstract

PURPOSE:To drive a plasma display, etc., with low flicker and with high luminance by using display data for interlace by outputting the same driving signal as the case of a scanning electrode corresponding to a scan by a segment driver when an adjacent scanning electrode is driven. CONSTITUTION:The title device is provided with a display having a scanning electrode X and a signal electrode Y for constituting a matrix, a segment driver 2 which has an output terminal corresponding to each signal electrode Y and outputs a driving signal from each output terminal based on display use data of a one-line portion, when said data is supplied, and a common driver 3 for driving successively the scanning electrode X corresponding to a scan, and also, driving a scanning electrode being adjacent to the scanning electrode X corresponding to a scan for a prescribed time by allowing it to continue to the timing of the scan. In this case, the segment driver 2 outputs the same driving signal as the case of the scanning electrode corresponding to the scan, when the adjacent scanning electrode is driven. In such a way, even if a plasma display, etc. are brought to interlace driving, high luminance and low flicker can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a display driving device suitable for use in driving, for example, a plasma display or the like.

"Prior Art" Plasma displays, in which the dots themselves emit light, are brighter and easier to see than liquid crystal displays, so they have become widely used in recent years. In this plasma display,
By sequentially scanning 711+& constituting the matrix, so-called rask scan display is performed.

``Problem to be Solved by the Invention'' Incidentally, it would be extremely convenient if a plasma display could be driven using display data for a CRT display device, since it would provide wide compatibility. However, C
Low-cost, high-resolution RT display devices generally use interlace display, but conventional plasma displays (usually use non-inklace display). Driving a plasma display using a controller-4
In order to do so, interlaced display data must be converted to non-interlaced display data, which has the drawback that the interface becomes extremely expensive.

On the other hand, if the interlaced data is used as is and the plasma display is caused to perform ink laced display, there arises the problem of not only significant flickering but also a further reduction in brightness.

This invention was made in view of the circumstances mentioned above.
The object of the present invention is to provide a display driving device capable of driving a plasma display or the like with low flicker and high brightness by using display data for ink lace as is.

[-Means for Solving the Problems] In order to solve the above problems, the present invention includes a display having scanning electrodes and signal electrodes forming a matrix, and an output end corresponding to the valley signal electrodes, a segment driver that outputs a drive signal from the valley output terminal based on the I-line display data supplied;
The scanning electrodes corresponding to scanning are sequentially driven, and the scanning electrodes adjacent to the scanning electrodes corresponding to scanning are sequentially driven. a common driver that drives the llt pole for a predetermined time continuously at the timing of the scan, and the segment driver sends the same drive signal as the scan electrode corresponding to the scan when the adjacent scan electrode is driven. It is characterized by output.

"Operation" Since the electrodes adjacent to the scanning electrodes corresponding to the scan are driven by the common driver, the same display as that on the scanning electrodes corresponding to the scan is performed on the adjacent electrodes for a predetermined period of time.

"Embodiments" Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of the present invention.

In the figure, l denotes a plasma display, which is composed of a matrix of scanning electrodes X, -X and signal electrodes Y1 - Y7. 2 is a segment driver that drives the signal electrodes Y1 to Y0. When the display data DD is captured in synchronization with the shift clock SC and one line of display data is captured, the data is transferred to the signal electrodes Y1 to Y at a predetermined timing. , to be sent. Next, reference numeral 3 denotes a common driver that drives the running ri electrodes xl to X in response to scanning of the display surface. This common driver 3 is designed to perform interlaced driving, and is also designed to perform special driving processing as described below.

Let us take as an example the case where the th scan electrode X is driven. When the horizontal synchronizing signal 1-ISYNC is output as shown in FIG. 2 (a), should it be driven after a predetermined period of time from this time? The electrode one above the a pole, that is, the scanning electrode (See Figure 2 (b)). Next, the scanning electrodes
After that, the scanning electrode X+to+ one below is driven for a time T0 (see FIG. 2(d)). During this time, the display data D (lh) corresponding to the th line is sent from the segment driver 2 to the signal electrodes Y, to Yn. Therefore, three consecutive lines of the same display data are sequentially displayed. In this case, since the driving time of the scanning electrode that should originally display is long, and the driving time of the scanning electrodes above and below it is short, the same dot appears to be blurred vertically on the display surface. Note that the two scanning electrodes above and below the scanning 'l!i electrode that should originally be driven are electrodes that are not driven in the field in the ink race process.

Next, the configuration of the common driver 3 will be explained with reference to FIG. In FIG. 3, 5 is a drive pulse generation circuit that generates a drive pulse DP that is a °1" signal at the timing of driving the scanning electrode. This drive pulse DP is
Horizontal synchronization signal 1-[SYN Ch
The signal waveform is a composite of the drive signals shown in Figures (B), (C), and (D) (see Figure 4 (A)).Next,
Reference numeral 6 denotes a synchronous counter that counts the driving pulse 1) P, and performs a counting operation at the falling edge of the driving pulse DP. The output signal of the first bit of this counter 6 is supplied to the clear terminal CL, and
After being inverted by the inverter INV, it is supplied to one input terminal of the AND gate ANO. AND GATE AN
A drive pulse DP is supplied to the other input terminal of O, and its output signal is supplied to a drive circuit 7. The drive circuit 7 includes scanning electrodes X,
It has output terminals corresponding to X, and sequentially outputs drive signals from each output terminal. These drive signals are sent to the scanning type I! via AND gates ANl to ANm. ix, ~x,. Also, and gate A N
l to ANm are controlled to open and close by driving pulse DP.

Further, the drive circuit 7 counts at the falling edge of the signal output from the ANO, and outputs a drive signal to the scan electrodes X1 to X corresponding to this count value. In this case, the relationship between the count value and the number point of the drive electrode is different between the even field and the odd field. This relationship shows that when the count value is Q, in the odd field, the (Q-1)th scanning electrode Xk (k=Q-1)
is driven, and in even fields, the Q-th scanning electrode Xk
(k=Q) is driven. Switching between even and odd fields is controlled by a field switching signal E10 supplied from a display controller or the like.

Next, the operation of this embodiment with the above configuration will be explained.

First, at the start timing of an odd field, when the horizontal synchronizing signal 5YNC is output at time t shown in FIG. The drive pulse DP is output as shown. Here, since the count value of the drive circuit 7 is reset in the initial state, the number of the besa electrode to be driven is (0-1'), but since there is no *** for this number, the drive circuit 7 is reset. The circuit 7 does not output a drive signal from either output terminal. As a result, even if the AND gates ANI-ANm are in the open state during the period t8-(7) in which the drive pulse DP is a '1' signal, none of the electrodes is driven.

Next, when the drive pulse DP falls at time t, the count value of the counter 6 becomes rlJ. At this time, the first bit output terminal of the counter 6 is "0°".
Since the level remains the same, the inverter INV outputs a 1" signal as shown in FIG. d). When the output signal of the AND gate ANO falls, the drive circuit 7 counts up and the count becomes rlJ. As a result, the drive circuit 7 starts counting up to drive the scan electrode X1. A drive signal is output from the first output terminal.Then, when the drive pulse DP rises at time tsi,
Since the AND gates AN1 to ANm are in an open state, the drive signal "2" is supplied to the scan electrode X via the AND gates AN1. Since the drive pulse DP is an "1" signal from time t8 to time t (corresponding to time TI), the scanning electrode X is driven open for time T1. And time t
When the drive pulse DP falls at , the counter 6
The count value of counter 6 becomes "2", and as a result, the count value of counter 6 becomes "2".
A "1" signal is output from the first bit output terminal of the inverter TNV, a "1" signal is supplied to the clear terminal CL, and the output of the inverter TNV becomes a "0" signal as shown in Fig. 4 (c). When the °0" signal is output from the impark INV, the output signal of the AND gate ANO falls (see FIG. 4 (d)), and the count value of the drive circuit 7 increases by 1. As a result, the drive circuit 7 increases by 1. The circuit 7 includes scanning electrodes X,
A drive signal is output from the second output terminal to drive the . And then, the time. Then, the drive pulse DP rises, and as a result, the gates AN I to ANm are opened, and the drive signal is supplied to the scanning electrode X via the AND gate AN2. The drive pulse DP is from time too to t.

During this period (time To), since the signal is "1", the scan 'rr1 and Xt are driven during this period.

Then, at time t, the drive pulse DP rises and falls, but since the output signal of the inverter INV is a 0'' signal from time tlo to L, the output signal of the AND gate ANO remains a 0'' signal. Therefore, the 1'L fall of the drive pulse D P at the time of day is supplied to the drive circuit 7 by 1, and as a result, the count of the drive circuit 7 (^ remains "2").

Also, at time t11, the counter 6 clears the clear terminal C.
The "1" signal supplied to L is taken in, thereby clearing the count value. When the count value is cleared, a "0" signal is output from the first pin output terminal of the counter 6, and therefore a "1" signal is output from the inverter INV, opening the AND gate ANO. As a result, the drive pulse DP outputted from now on is controlled by the drive circuit 7.
supplied to

By the operation described in , the scan electrode X+ maintains the normal display time (T
1), and at the same time, the scan electrode X one below is driven for a short time (T2). These scans? ! ! Extreme X1. While driving Xt, the display data DD for scan electrode X is supplied from segment driver 2 (see Figure 2), so in the above process, a regular bright display is produced on scan electrode X1. At the same time, a thin display is performed on the scanning electrode X for the same dot as this display.

Next, at time try, the horizontal synchronizing signal 1-I 5
When YNC is output, a drive pulse DP is output at time t1 after a predetermined time has elapsed, and the same process as above is performed again. In this process, the count value of the drive circuit 7 changes to "2", "3", and "4", and the scanning types tffix, , x, , X, respectively, have a period T. ,'r,
, To are driven. In this case, since the segment driver 2 outputs display data DD for scan 1lxa, normal bright display is performed on scan electrode x, 1, and the same dots are displayed on scan electrodes is displayed faintly.

Thereafter, scan electrodes (X,,Xs,X,)--(
X-, X1. According to the boat fishing expression, as shown in FIG. 4 (E), (X.

,, Xk, Xk,, ) → (Xk,, Xk,!, X5
．． ．． )--... are displayed in this order.

Then, when the display of the odd field is finished, next, v
Display processing for the 4-loss field is performed. The processing for even fields is also similar to the above processing. However, the order of the scan electrodes to be driven is (X,,X,,X,)-(X3
．． X,,x,)−・−・−.

As described above, according to this embodiment, since the two lines above and below the line that should normally be displayed are displayed in a thin light, the display surface does not become dark when ink tracing is performed, and flicker is prevented. reduced.

In the embodiment L, the upper and lower two lines are displayed in a light color, but only one of the lines may be displayed in a light color.

"Effects of the Invention" As explained above, according to the present invention, the display has a display in which scanning electrodes and signal electrodes constituting a matrix are H, and an output end corresponding to each of the signal electrodes, and a display for one line. a segment driver that outputs a drive signal from each of the output terminals based on the display data supplied;
While sequentially driving scanning electrodes corresponding to scanning, it
a common driver that drives a scan electrode adjacent to the scanning electrode corresponding to the scanning scan electrode for a predetermined period of time continuously at the timing of the scan; Since the same drive signal as that for the scanning electrode is output, high brightness and low flicker can be achieved even when a plasma display or the like is driven in an incline manner. Therefore, display data for an interlaced display device can be used as is to drive a plasma display, etc., and in addition to high compatibility, a tri-point function that does not require a special interface can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the overall configuration of an embodiment of the present invention, FIG. 2 is a timing chart showing the main points of the scanning T electrode driving process in the embodiment, and FIG. 3 is a common block diagram in the embodiment. FIG. 4 is a schematic diagram showing the configuration of the driver 3, and FIG. 4 is a timing chart for explaining the operation of the common driver 3. I...Plasma display, 2...
Segment driver, 3... Common driver, 5.
... Drive pulse generation circuit, 6 ... Counter, 7 ... Drive circuit.

Claims (2)

[Claims] (1) A display having scanning electrodes and signal electrodes constituting a matrix, and an output terminal corresponding to each of the signal electrodes, and when one line of display data is supplied, each of the above outputs A segment driver that outputs a drive signal from the end, and a common driver that sequentially drives the scan electrodes corresponding to the scan and drives the scan electrodes adjacent to the scan electrodes corresponding to the scan for a predetermined time continuously at the timing of the scan. A display driving device, wherein the segment driver outputs a drive signal similar to that for the scan electrode corresponding to the scan when the adjacent scan electrode is driven. (2) The display driving device according to claim 1, wherein the adjacent scan electrodes are scan electrodes above and below the scan-compatible scan electrode.