JPH01259415A - Data correcting circuit - Google Patents

Abstract

PURPOSE:To reduce the scale of circuits by swapping upper and lower bits of data, which should be subjected to correction of digit movement, on demand and right or left shifting data once by the number of required bits and swapping high-order and low-order bits. CONSTITUTION:A data selector 3 swaps high-order bits and low-order bits of the output of an input data register 1 when the value in a shift control register 2 indicates the left shift direction, but the selector 3 selects the output value of the input data register 1 when it indicates the right shift direction. The output is right or left shifted once by the number of required bits, and high-order bits and low-order bits are swapped again. Thus, the processing of digit movement correction is executed without requiring a selecting circuit of the bit width of digit movement for the purpose of preventing bit losses at the time of digit movement correction.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a data correction circuit that performs digit shift correction in decimal point operations, bit operations, and the like.

Conventional technology FIG. 5 shows the configuration of a conventional data correction circuit.

In FIG. 5, ti is a manual data latch that manually holds data for correcting digit shift, 12 is an input data latch that arithmetic shifts one word to the right and holds data for correcting digit shift, and 2 is an input data latch that holds data for correcting digit shift. A shift control register 71 manually holds the shift number; 71 is a left/right shift instruction signal indicating left or right shift; 72 is a shift amount instruction signal indicating the shift number; 31 is a manual data latch 11 or A selector for selecting 12 contents,
70 is a decoder that performs shift control based on the left/right shift instruction signal 71 and the shift) It instruction signal 72; 41 is a shifter that shifts the output data of the selector 31 to the left according to the control of the decoder 70; and 8 is the digit shift corrected by the shifter 41. This is a data output line that outputs data.

Conventionally, the data selected from the input data latches 11 and 12 was shifted to the left by an amount determined by the left/right shift instruction signal 71 and the shift amount instruction signal 72 to realize a left/right shift operation (for example, Japanese Unexamined Patent Publication 1986-19
5741).

Problems to be Solved by the Invention In conventional circuits, in order to prevent bit loss in the value to be corrected for digit shift, it is necessary to include selection circuits for the number of bits to be shifted to the left, and it is difficult to handle data with a long bit length. This configuration has a problem in that the circuit scale becomes large.

In view of this point, it is an object of the present invention to provide a data correction circuit with a small circuit scale.

Means for Solving the Problems The present invention solves the above-mentioned problems by providing a manual data register that manually stores data for correcting digit shift, and a manual data register that manually stores each bit of the data in the manual data register. a data selector that swaps the data at the lower end, a multi-stage chic that shifts the data in a single direction to the right or left depending on the number of shifts, and swaps each bit of the data corrected by the shifter between the upper and lower ends. It is equipped with a data selector, a sign correction circuit that performs sign extension during an arithmetic right shift, and an output data bus that outputs correction data, and swaps the bits of the manual data sent to the shifter between upper and lower positions depending on the shift direction. After shifting by an arbitrary bit, the bits are again swapped between upper and lower bits to perform a bidirectional shift.

According to the above-described configuration, the present invention swaps the upper and lower bits of the data for correcting digit shift as necessary,
By performing a single shift to the left for the required bits and swapping the upper and lower bits again, there is no need to provide a bit width selection circuit for shifting digits to prevent bit loss during digit shift correction. Movement correction processing can be executed.

Embodiment FIG. 1 shows the configuration of a data correction circuit according to an embodiment of the present invention.

In FIG. 1, 1 is a manual data register that inputs and holds data for performing digit shift correction; 2 is a shift direction;
a shift control register that inputs and holds shift control control values such as arithmetic or logical shifts and shift numbers; 3 a data selector that swaps the upper and lower bits of the input data register 1 according to the shift direction of the shift control register 2; 4 is a shifter that shifts bits corresponding to the shift number of shift control register 2; 5 is a data selector that swaps the output of shifter 4 between upper and lower bits according to the shift direction of shift control register 2; 6 is a shift control register 2 is a sign correction circuit that manually inputs the sign bit of the input data register in the case of an arithmetic right shift and performs code extension correction at the time of shift in the shifter 4; 7 is a shift control signal indicating the output signal of the shift control register 2; 8 is a data output line for outputting data subjected to digit shift correction; 9 is a code correction signal applied from the code correction circuit 6 to the shifter 4; 10
is the sign bit of the manual data register.

An embodiment of the shifter 4 is shown in FIG.

As shown in FIG. 2, the shifter 4 is composed of multiple stages of data selectors, and the shifter 41 selects one bit of human input data to the right.
A 20-bit φ selector 42 selects between the shifted value and the unshifted original value using the shift control signal 7, and 42 selects between the output of the 20-bit number selector 41 shifted two bits to the right and the unshifted original value. 21-bit selector for selecting by shift control signal 7, similarly n 21-bit selectors (i=o, 1. . . . , n-1)
It has a configuration that allows manual data to be shifted to the right by an arbitrary number of bits.

The bit configuration of the 21-bit selectors 41 to 43 is
As shown in the figure. The manual signal and output signal of each bit selector are inverted and output (positive logic is inverted to negative logic, and negative logic is inverted to positive logic), but if shifter 4 is configured with an even number of stages, Human output signals have the same logic.

The operation of the data correction circuit of this embodiment configured as described above will be explained below.

The data for performing the digit shift correction process is set in the input data register 1, and the value for shift control is set in the shift control register 2. The data selector 3 swaps the output of the manual data register 1 between the upper bit and the lower bit when the value indicating the shift direction of the shift control register 2 indicates left, and when it indicates the right, the output value of the manual data register 1 is swapped. select.

Each of the 21-bit selectors constituting the shifter 4 selects and outputs either a value obtained by shifting the output of the previous stage by 21 bits or an unshifted original value, according to the number of shifts in the shift control register. The sign correction circuit 6 provides the sign bit 10 from the manual data register 2 to the shifter 4 to perform a sign extension operation when the shift control register 2 indicates an arithmetic right shift, and otherwise provides a positive logic "OJ". - Select 5 swaps the output of shifter 4 between the upper and lower bits when the value indicating the shift direction of shift control register 2 indicates left, and selects the output value of shifter 4 when it indicates right. The data is sent to data output line 8.
is output by

In the present invention, a single rightward shift has been described;
A single chic in the left direction can be constructed as well by replacing the right shift with a left shift.

In addition, as shown in FIG. 4, the connections between the human data register 1 and the data selector 9, and between the data selector 5 and the output line 8 are connected to a bus connection system, so that the upper bits and lower bits can be swapped. It is possible to easily configure the connecting lines.

Effects of the Invention The present invention swaps data for correcting digit shift between the third and lower bits as necessary, performs a single shift to the required bit distribution or left, and swaps again between the first and lower bits. By doing so, there is no need for a bit selector for the bit width to prevent digit loss due to digit shift correction, and there is an effect that arithmetic shift of an arbitrary number of bits can be performed with a small circuit scale.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a data correction circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing a detailed configuration of the shifter 4 of FIG. 1, and FIG. 3 is a block diagram of the data selector 3 of the same embodiment.
．． 5 and a circuit diagram of a bit selector configuring shifter 4,
FIG. 4 is a block diagram showing the connection of the human output lines of the data selector 3.5 in FIG. 1, and FIG. 5 is a block diagram of a conventional data correction circuit. l...Manual data register, 2...Shift control register, 3...Data selector, 4...Unidirectional thick, 5...Data selector,
6... Sign correction circuit, 7... Shift control signal, 8.
...Output line, 9...Sign correction signal, 10...Sign bit, 11.12...Manual data latch, 31...Data selector, 41...Sick, 70...
...Decoder, 71...Left and right shift instruction signal, 72.
... Schiff) I! instruction signal. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] A data selector that performs digit shift correction swaps the upper and lower bits of data depending on the shifting direction, a shifter that shifts data in a single direction to the right or left depending on the number of shifts, and correction using the shifter. The present invention is equipped with a data selector that swaps the upper and lower bits of each bit of data according to the shifting direction, a sign correction circuit that performs sign extension during arithmetic right shift, and an output data bus that outputs correction data. Characteristic data correction circuit.