JPH01256848A - Error detector for optical transmission line - Google Patents

Abstract

PURPOSE:To make the size of circuit remarkably small and to reduce the power consumption by applying up-down count increasing and decreasing the count in a direction in response to the logic value of each bit in a constant mark rate serial data and comparing the count and the setting value so as to detect an error of an optical transmission line. CONSTITUTION:When an optical signal with a data constant mark rate is given from an optical transmission line to a photoelectric conversion means 10, the optical signal is converted into an electric signal. Then a data extraction means 12 extracts a serial data from the electric signal given from the photoelectric conversion means 10. Moreover, an up-down count means 14 increases and decreases the count in a direction in response to the each bit logic value of the data given from the data extraction means 12. Moreover, a data error detection means 18 compares the count with the setting value to detect the occurrence of a data error. The circuit required for the detection is very small in size. The setting value is predetermined by taking the mark rate of the optical signal into account.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Field Conventional Technology A problem that the invention attempts to solve! ! Means for Solving the Problems Effects of the Invention Effects of the Invention [Summary] Providing a device that can significantly reduce power consumption by detecting the occurrence of errors in constant mark rate data sent using an optical transmission line. A photoelectric conversion means for converting an optical signal with a constant data mark rate given from an optical transmission line into one electric word, a data extraction means for extracting serial data from the electric signal, and a data extraction means for extracting serial data from the electric signal. and a data error detection means that detects the occurrence of an error in the data by comparing the count value with a set value.

[Industrial Field of Application] The present invention relates to an optical transmission line error detection device for detecting the occurrence of an error in constant mark rate data sent using an optical transmission line.

In an intermediate relay device of an optical transmission line, this type of device detects errors in the transmission line, and the detection results are used to determine whether a transmission failure has occurred.

During optical transmission, if an optical signal containing data with continuous logical values of "0" or "1" is transmitted,
This causes deterioration of the tag that converts optical signals into electrical signals within the device, and makes it difficult to extract the clock.

Therefore, a method has been adopted for handling optical signals in which the mark rate of transmitted data is constant, and in particular, the mark rate is 50%58.
The 6B code conversion method is adopted in many optical signal transmissions.

[Prior Art] FIG. 3 shows an example of an intermediate repeater using the 5B6B code conversion method, in which the optical signal on the optical transmission line 30 is
The E converter 32 converts it into an electrical signal.

Data and a clock are extracted from the electrical signal by a timing extraction circuit 34, and these are provided to an OHB data superimposition circuit 36.

Then, in the OHB data superimposition circuit 36, the OHB data is superimposed on the data to generate transmission data.

Furthermore, this transmission data is converted into an optical signal by the E10 converter 38 and sent to the optical transmission line 40.

Further, the synchronization circuit 42 obtains a timing signal necessary for OHB data superimposition using the data extracted by the timing extraction circuit 34 and the clock, and the OHB data drop circuit 44 obtains OHB data of the received data.

Here, the decoder 46 performs decoding processing on the received data after synchronization, and the coding rule violation detection circuit 48 monitors the occurrence of coding rule violation in the decoded data (ie, received data).

When the code rule violation detection circuit 48 confirms that the decoded data does not comply with the 586B code rule, an error pulse is output from the code rule violation detection circuit 4 to the outside.

[Problems to be Solved by the Invention] In this way, in the past, errors in the optical transmission line 30 were detected due to violations of coding rules, so a decoder 42 was always required to decode received data after synchronization. .

Therefore, in a device operating at high speed, the delay time of the decoder 42 becomes a problem, and it is required to use an ECL circuit or the like for this purpose.

For this reason, as the device operates faster, its circuit scale becomes extremely large, and as a result, power consumption also increases and a large amount of heat is generated in the device.

This becomes a major constraint in the design of intermediate relay devices, which have severe thermal limitations, and a significant reduction in power consumption has been desired.

The present invention has been made in view of the above-mentioned conventional problems,
The purpose is to provide a device that can significantly reduce power consumption.

[Means for Solving the Problems] In order to achieve the above object, the device according to the present invention has the following features:
It is configured as shown in the figure.

When an optical signal with a constant data mark rate is applied from an optical transmission line to the photoelectric conversion means 10 shown in the figure, the optical signal is converted into an electrical signal.

Then, the data extraction means 12 extracts serial data from the electrical signal given from the photoelectric conversion means 10.

Further, in the up/down counting means 14, the count value increases or decreases in a direction corresponding to each bit logical value of the data given from the data extracting means 12.

Furthermore, the data tampering detection means 18 detects the occurrence of the data tampering by comparing the count value with a set value.

[Function] In the present invention, the count value of the up/down count means 14 is increased or decreased in the direction according to each bit logical value of the serial data obtained by the data extraction means 12, and by comparing the count value with the set value, the above-mentioned Since the occurrence of a data error is detected, the circuit required for this detection is extremely small.

Note that the above set value is determined in advance in consideration of the mark rate of the optical signal.

[Embodiments] Hereinafter, preferred embodiments of the apparatus according to the present invention will be described based on the drawings.

FIG. 2 shows an example of an intermediate relay station using the 586B code conversion system, and the same members as those in FIG. 3 are given the same reference numerals, and their explanation will be omitted.

In this example, the decoder 46 and the code rule violation detection circuit 48 shown in FIG. 3 are not used, and an up/down counter 20 and an error detection circuit 22 are provided in their place.

In addition, a parity check circuit 24 is newly provided, and a parity check circuit 24 is newly provided.
The OHB data of the 1 (B data 091 circuit 44) is applied to the parity check circuit 24.

5B from the optical transmission line 30 to the O/E converter 32 in FIG.
When an optical signal according to the 6B code conversion method is given, this O
Serial reception data is generated from the electric signal obtained by the /E converter 32 in a timing extraction circuit 34 together with a clock.

When the synchronization circuit 42 establishes synchronization with the received data, the rear down counter 20 is reset at the timing 1 word of the synchronization circuit 42 during the word period of the additional bit superimposition.

Therefore, the up/down counter 42 is reset at the frame period of the received data, and the up/down counter 20 performs an up/down count for each bit of the main data except for the additional bit superimposed portion.

This up/down count is performed in the opposite direction every time the data logic value is inverted, and the up/down counter 42 is reset at the beginning of the data frame, and the 5B6B code conversion method is adopted, so that the data mark rate is 50% (±3%). Therefore, under normal conditions, the count value of the up/down counter 42 fluctuates within a predetermined range around the value O.

In addition, when an error occurs, the above mark rate does not reach 50%, so due to its increase or decrease, the up/down count value deviates from the above normal fluctuation range, and the error detection circuit 2
An error pulse is output from 2.

On the other hand, the parity check circuit 24 performs a parity check on the received data, and error detection is also performed by this check.

As explained above, according to this embodiment, the decoder 46 and the coding rule violation detection circuit 48 in FIG. 3 are replaced with the up/down counter 20 and the error detection circuit 22, so that the The size of the circuit can be significantly reduced.

Therefore, the power consumption of the target circuit portion can be reduced, and as a result, the amount of heat generated can be reduced, making it possible to easily eliminate thermal limitations and restrictions in the design of the intermediate device.

It has been confirmed that the above power consumption can be reduced to approximately half by simply replacing the above circuit.

Further, according to this embodiment, a parity check circuit 24 is newly provided, and error detection is also performed by this circuit, so that the reliability of error detection is extremely high.

[Effects of the Invention] As explained above, according to the present invention, up-down counting is performed to increase or decrease the count value in the direction according to the logical value of each bit in serial constant mark rate data, and the count value and setting are Since errors in the optical transmission line are detected by comparison with the values, the circuit can be significantly downsized and its power consumption can be reduced despite the increased speed of device operation. It becomes possible to easily eliminate thermal limitations and restrictions in device design, etc.

[Brief explanation of the drawing]

Figure 1 is a diagram explaining the principle of the invention. FIG. 2 is an explanatory diagram of the configuration of the embodiment, FIG. 3 is an explanatory diagram of the configuration of a conventional example. 10...Photoelectric conversion means 12...Data extraction means 14...Up-down count means I6...Data twist detection means 20...up/down counter 22...Error detection circuit 24... Parity check circuit 32...ΦO/E converter 34...timing extraction circuit 42...Synchronous circuit

Claims (1)

[Scope of Claims] Photoelectric conversion means (10) for converting an optical signal with a constant data mark rate given from an optical transmission line into an electrical signal; and data extraction means (12) for extracting serial data from the electrical signal. , up/down counting means (14) for increasing or decreasing a count value in a direction according to each bit logical value of the data, and data error detection means for detecting the occurrence of an error in the data by comparing the count value with a set value. (18) An error detection device for an optical transmission line, comprising: