JPH01248289A - Abnormality detector for ic card - Google Patents

Abstract

PURPOSE:To previously detect abnormality such as cracks, etc., in the external form of an IC chip by providing a warning means which warns occurrence of abnormality in an IC chip in accordance with a discriminated result that the power feeding state of a power line exceeds a previously specified limit. CONSTITUTION:By paying attention that, when a crack is produced in an IC chip, the electric current feeding state, for example, the power feeding quantity from a power source to the IC card 100 using the IC chip is increased, the increase in the power feeding state is detected by means of a detecting means 300 and a warning is issued from a warning means 500 in accordance with the detected result of the means 300. By receiving the warning, the user or issuing company of the IC card instructs the readout process of the storing content of the IC card 100 before the card 100 is damaged. Therefore, the storing content of the IC card 100 can be protected.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is an abnormality detection method for detecting an abnormality in the external shape of an IC chip such as a crack in an IC chip in an IC card that exchanges information with an electronic device such as a host computer. Regarding equipment.

[Conventional technology]

An example of the circuit configuration of a conventional IC card of this type is shown in FIG.

In FIG. 6, 51 is a connection connector, which is connected to a card reader/writer and transfers information between the TC card 5o and the card reader/writer. 52 is a central processing unit (CPU), which sends information received from the connector 51 via the data bus βl to EEFRO, which will be described later.
At the same time as writing to M53, information read from EEFROM 53 is transferred to connection connector 51.

Reference numeral 53 is a non-volatile memory called EEPROM whose storage contents can be electrically erased.
IAM) is sometimes used.

The EEPnOM 53 receives the address specified by the CPU 52 via the address bus 16, and the CI'U 52
Information is output to the data bus Ill in response to a write instruction or a read instruction issued by an IW line (not shown).

A control signal line for transmitting various signals for operating the CPU 52 is provided between the CPt 152 and the connection connector 51. Since these various signals are well known, a brief explanation will be provided. The chip select (C/S) signal line ft2 is a signal line that allows input/output of general information to/from the connector.

The ground line λ3 is a signal line for grounding the CPU 52. The reset signal line 14 is a signal line that transmits a reset signal for setting the CPt 152 to a reset state from the external device side. The clock signal 15 is a signal line that transmits a synchronization signal for operating the CPU 52 in synchronization.

The power line 16 is a signal line that supplies operating voltage to the CPU 52.

Such a signal or voltage is supplied from the card reader/writer side, and the IC circuit on the IC card 50 side becomes operational. -fi&: CPU52, and EEPROM5
3 and the connection signal line are integrally formed in the form of a chip as an integrated circuit (IC) and housed in a flat card case made of plastic or the like. IC card like this5
0 is widely used as a portable storage device,
When an IC card is deformed by external pressure, the IC chip may crack and, in extreme cases, the IC circuit may be damaged.

[Problem to be solved by the invention]

However, cracks in the IC chip cannot be detected from the appearance of the IC card, so in the past, cracks in the IC chip could not be detected by checking whether the information read from the IC card 50 is correct in the host computer connected to the card reader writer.
An abnormality detection device for detecting an abnormality in the C card 50 is provided. The parity method and CnC method are well known for checking read information.

However, since the conventional IC card abnormality detection device detects that the IC circuit has become damaged, at the time the abnormality detection device detects the above abnormality in the IC card, the memory contents of the EEPROM 53 of the IC card 50 cannot be read. There was an issue that needed to be resolved, namely that backups were not possible.

SUMMARY OF THE INVENTION An object of the present invention is to provide an abnormality detection device that can detect external abnormalities such as cracks in an IC chip before the IC circuit in the IC card becomes inoperable.

Another object of the present invention is to provide an abnormality detection device that can back up the contents of the internal memory of an IC card when an abnormality in the external shape of an IC chip is detected.

(Means for Solving the Problems) In order to achieve such an object, a first embodiment of the present invention is configured to be connected to a power line that supplies an operating voltage to an IC chip in an IC card, and to change the power supply state of the power line. means for detecting, means for determining whether the detected amount exceeds a predetermined magnitude, and warning means for issuing a warning that a crack has occurred in the IC chip in accordance with the determination result of the means. It is characterized by having the following.

A second aspect of the present invention is a means for detecting a power supply state in the power line, which is connected to a power line that supplies an operating voltage to an IC chip in an IC card, and whether the detected amount exceeds a predetermined magnitude. means for determining whether the IC chip is abnormal; warning means for issuing a warning that there is an abnormality in the IC chip according to the determination result of the means; and reading predetermined information stored in the IC card according to the detection result of the detection means. , an operation checking means for determining whether the read information is correct or not and checking whether the IC card is operating normally; and reading out all information on the IC card according to the confirmation result of the operation checking means. It is characterized by comprising a reading means and a storage means for storing all the read information.

(Function) In the first embodiment of the present invention, when a crack occurs in the IC chip, the power supply status of the supply current supplied from the power supply to the IC card, for example, the power supply amount increases, and the detection means detects the above-mentioned An increase in the amount of power supplied is detected, and the warning means issues a warning according to the detection result. Therefore, the IC card user or the IC card issuing company can protect the stored contents of the IC card by instructing read processing of the stored contents of the IC card before the IC card is damaged.

In the second embodiment of the present invention, in addition to the first embodiment, after the operation confirmation means confirms that the IC card operates normally, the stored contents of the IC card are automatically backed up to the 219 means. Therefore, there is no need for the person in charge of the host computer that receives and receives the IC card, the IC card, or the IC card issuing company that manages the host computer to check the contents of the cracked IC card.

〔Example〕

The present invention will be described in detail below with reference to the drawings.

FIG. 1 shows the basic configuration of an embodiment of the present invention.

In FIG. 1, numeral 300 is a means connected to the power line 200 for supplying operating voltage to the ICC tube in the IC card 100, and detecting the power supply state in the power line 200.

400 is means for determining whether the detected amount exceeds a predetermined value.

Reference numeral 500 denotes a warning means for issuing a warning that a crack has occurred in the IC chip in accordance with the judgment result of the judgment means 400.

600 reads out predetermined information stored in the IC card 100 according to the detection result of the detection means 300, determines whether the read information is correct or not, and outputs the IC card 100.
This is an operation confirmation means for confirming whether or not it is operating normally.

Reference numeral 700 denotes a reading unit that reads out all information on the IC card 100 according to the confirmation result of the operation confirmation unit 600.

800 is a storage means for storing all the information read out by the reading means 700.

, FIG. 2 shows a circuit configuration of an embodiment of the present invention.

In FIG. 2, the IC
An abnormality detection device 20 for detecting an abnormality in the card 50 is provided.

As the connection connector 10 and the card reader/writer 30, conventionally known ones may be used.

Next, the configuration of the abnormality detection device 20 will be explained below.

In the abnormality detection installation 20, an iM current detection circuit 21 is provided on the power supply line 1 that supplies voltage from the power supply of the card reader/writer 30 to the IC card 50. As shown in FIG. 3, the JIi current detection circuit 21 serving as the detection means 300 uses the switching function of the transistor 21-1 to turn on (level " There are known circuits that do this, and it is sufficient to use an overcurrent detection circuit that corresponds to the overcurrent detection level.

The first embodiment of the present invention focuses on the property that when the IC chip in the IC card 50 is cracked, the current supplied to the IC chip increases, and the current supplied to the IC card 50 is monitored, and the IC chip in the IC card 50 is This makes it possible to detect cracks in the depth and issue a warning.

In the first embodiment of the present invention, this energization detection circuit 21 is provided between the card reader/writer 30 and the IC card 5o, but the overcurrent detection circuit 21 and a buzzer that issues a warning depending on the detection result are connected to the IC. It may be provided within 5 degrees of the card.

Returning to FIG. 2, the overcurrent detection signal of the overcurrent detection circuit 21 is inputted to the interrupt terminal of the central processing unit (CPtl) 22. The CPt 122 corresponds to the warning means 500, the operation confirmation means 600, and the reading means 700. This A
In response to the interrupt input of the current detection signal, the CPt 122 executes the control procedure shown in FIG.
It performs processing such as backing up stored information and notifying the host computer of an abnormality in the IC card 50.

For this reason, the CPU 22 includes a card reader/writer 30.
A signal exchanged between the IC card 50 and the connector of the IC card 50 is input.

In addition, a program memory 24 and a backup memory 23 as a storage means 800 are used to store control procedures executed by the CPt 122 and information obtained by backing up (reading) the storage information of the IC card 50.
Connected to Pt122.

In the second embodiment of the present invention, the overcurrent detection circuit 21 detects a crack in the IC chip of the IC card 50; :cP1122 is an IC car) '50 (7)
The stored contents of the EEpH0M53 are confirmed, and if the stored contents are normal, the stored contents are transferred to the backup memory 23. Also, if the stored contents are abnormal, a warning message to that effect is sent to the host computer.

Next, the reason why the supplied current increases when a crack occurs in the IC chip will be explained with reference to FIG.

In FIG. 4, RIO indicates the internal resistance of the IC circuit when the IC chip is normal, and 120 indicates the external resistance of leakage current 120 caused by cracks in the IC chip.

V is the power supply for the IC chip. When the IC chip is normal, the leakage current 120 does not occur because the external resistance of the sealant sealing the IC chip is very large.

However, if a crack occurs in the IC chip, a portion of the supplied current will leak through the crack, and the IC circuit will become a kind of short-circuit ground. Since the value of the external resistance at this time is very small, under a constant voltage the leakage current 120 is
This is much larger than the current 110 flowing in the C circuit.

As a result, the supply current of the power supply increases.

Next, the operation of the abnormality detection device 20 will be explained with reference to the flowchart shown in FIG.

While the overcurrent detection circuit 21 confirms that the current supplied from the power supply 31 is in a normal state, the CPU 22 transmits and receives information between the card reader/writer 3o and the IC card 5° via the No. 48 bus. Forward.

When the overcurrent detection circuit 2I detects an overcurrent flowing through the power supply source 1, the detection signal causes the CPt 122 to execute the control procedure shown in FIG. In FIG. 5, the CPU 22 sends a read command to the IC card 50 and reads out predetermined information (step 51).
It is assumed that general information to which a parity code is added is stored in 0. In the case of an IC card that does not perform code checking, bit values may be determined in advance and stored in a specific area of the IC card.

The CPt 122 determines whether the read information sent by the IC card 50 is normal. Parity method I
In the C card 50, the pariday code is confirmed, and in the IC card 50 that stores specific information, by confirming that the specific information is in a predetermined code format, it is possible to confirm that the read information is normal. IC card 5
Confirm that 0 functions normally (Step S2)
.

When the CPU 22 determines that the IC card 50 is normal, the CPU 22 instructs the IC card 50 to read all general information from the IC card 50.
Send to 0. In addition, (:PU22 receives information read by IC card 50, and
(Step S3) After reading all the general information from the IC card 50, the CPU 22 finishes backing up the information on the IC card 50 and stores the information on the IC card 50.
A message indicating that there is an abnormality is sent to the host computer, and this control procedure ends.

Furthermore, since it is detected in the determination process of step S2 that the IC card 50 is in an inoperable state,
In this case, a message indicating that the IC card 50 is abnormal is sent to the host computer without executing the backup process of the information stored in the IC card 50, and this control procedure ends.

Next, as an application of the present invention, a method for improving the accuracy of detecting cracks in IC cards will be described.

When a CMO5 type IC is used as an IC chip, the IC chip is in an operating state and in a non-operating state although power is being supplied, for example, before a reset and a clock are applied. There is a difference of several tens to hundreds of times in current consumption. Focusing on this, the level of the reset signal that the card reader/writer 30 transmits to the CPt 152 of the IC card 50 to instruct activation is monitored at the (:Pt 122 of the abnormality detection device 20,
When this reset signal and clock (No. 3) are being generated, if you check whether overcurrent is flowing in the power supply line 1, the supplied current is small in normal conditions, and large in abnormal conditions. Improves the accuracy of detecting cracks in IC chips.

Further, the following may be considered as a usage form of this embodiment.

The warning message received by the host computer is displayed on the display device so that the IC card owner and the person in charge of the IC card issuing company are aware of it.
An abnormality detection device 2 that performs the collection process of the C card.
You can read the backup information from the backup memory 23 of 0, transfer it to a new IC card, issue a temporary IC card, and then issue a regular IC card at a later date, or if the customer has a cracked card. You may notify the IC card that it cannot be used and take other measures such as collecting the card. At this time, you can store the IC card to prevent further cracks and read out any data that does not cause any problems. . In other words, there is no need to read out the PIN number, etc., and it goes without saying that the information is backed up and set up using a publicly known confidential method to prevent it from leaking.Also, if the contents of the IC card cannot be read out, informs the IC card owner of this fact. At this time, if the system stores backup information for this IC card, the IC card using this backup information
You will have to go through the procedures to have your card reissued.

〔Effect of the invention〕

As explained above, according to the first embodiment of the present invention, I
It is possible to detect signs of abnormality in the IC card before the C card becomes inoperable, making it possible to back up the information stored in the IC card, and to prevent the transmission of erroneous information caused by damage to the IC card. This makes it possible to prevent problems such as host computer shutdown.

In the second embodiment of the present invention, in addition to the first embodiment, when a cracked chip of an IC card is detected, it is confirmed that the IC card functions normally, and the memory information of the IC card is temporarily stored. Therefore, it becomes possible to reliably back up the memory contents of an IC card where an abnormality has started to occur, and it is possible to obtain the effect that the inclination towards recording retention of the IC card can be increased.

In addition, in the above-mentioned embodiment, the current flowing through the power line is detected to detect the power supply state from the power source in the power line, but the present invention is not limited to this example. Of course, when a current of 1 is caused to flow, the voltage may be detected.

[Brief explanation of the drawing]

FIG. 1 is a plot diagram showing the basic configuration of an embodiment of the present invention, FIG. 2 is a circuit diagram showing a specific configuration of the embodiment of the present invention, and FIG. 3 is a diagram of the overcurrent detection circuit 21 shown in FIG. A circuit diagram showing a configuration example, FIG. 4 is a circuit diagram showing the operating principle of the embodiment of the present invention, FIG. 5 is a flowchart showing the control procedure executed by the CPt122 shown in FIG. 1, and FIG. 6 is a conventional IC card. FIG. 2 is a block diagram showing the configuration of FIG. lO...connection connector, 20...abnormality detection device, 21...overcurrent detection circuit, 22.CPU. 30...Card reader/writer, 50...IC card. , i-Invention 1a Iu 1'' flowchart, 51st page, 501C card, IC cart flow chart...77 Figure 6

Claims (2)

[Claims] (1) A means that is connected to a power line that supplies operating voltage to the IC chip in the IC card and detects the power supply state in the power line, and determines whether the detected amount exceeds a predetermined value. An abnormality detection device for an IC card, comprising: means for detecting an abnormality in the IC chip; and a warning means for issuing a warning that there is an abnormality in the IC chip in accordance with a determination result of the means. (2) means that is connected to a power line that supplies operating voltage to the IC chip in the IC card and detects the state of power supply in the power line; and determines whether the detected amount exceeds a predetermined value. a warning means for issuing a warning that there is an abnormality in the IC chip according to the determination result of the means; reading predetermined information stored in the IC card according to the detection result of the detection means; an operation confirmation means for determining whether the read information is correct or not and confirming whether or not the IC card is operating normally; An abnormality detection device for an IC card, comprising: reading means for reading out information; and storage means for storing all the read information.