JPH01246834A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To assure the stable specified dimensions for enhancing the reliability and the massproductivity by a method wherein a dummy pattern is arranged before performing an etching process on a processed surface even in a chip or between different type semiconductor devices. CONSTITUTION:When an isolated circuit pattern 1 and another circuit pattern 1 with rough and dense parts are formed by photoetching process using a photoresist, a dummy pattern is arranged on a processing surface. Thus, the difference in the roughness and denseness of the circuit pattern 1 is restricted to make the pattern dimension in the same chip almost equal causing no disconnection. Furthermore, when a memory IC with the difference in roughness and denseness and a logic array IC are dry-etched between different type semiconductor devices, if the dummy pattern is provided to equalize the density thereof with that of the circuit pattern of the memory IC, the dimensional conversion difference and the dispersion can be restrained. Through these procedures, the patterns can be assured of the stable specified dimension to enhance the reliability and the massproductivity.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Summary of the invention]

The present invention is a method for manufacturing a semiconductor device, in which a dummy pattern is placed on a processing surface to eliminate irregularities in pattern density and to obtain stable pattern dimensions.

[Prior Art] Conventionally, in the manufacturing method of semiconductor devices, only the circuit patterns necessary to obtain the desired electrical characteristics are placed on the processing surface, and the processing surface is placed within the chip and between different types of semiconductor devices. The circuit pattern densities of were different.

[Problems to be Solved by the Invention] However, the above-mentioned conventional technology has the problem that the pattern dimensions vary depending on the density of the circuit pattern due to the influence of the loading effect in the photolithography process and the dry etching process. As the dimensions of the pattern become thinner, wire breakage becomes more likely to occur. Furthermore, in the same manufacturing process for different types of semiconductor devices, it is necessary to set manufacturing conditions individually, resulting in poor mass productivity.

The present invention is an attempt to solve the problems of the conventional semiconductor device manufacturing method, and aims to achieve stable dimensional control within a chip and between different types of semiconductor devices, Since devices can be manufactured under the same manufacturing conditions, it is possible to provide a method for manufacturing semiconductor devices that is highly mass-producible and more stable and reliable.

[Means for Solving the Problems] A method for manufacturing a semiconductor device according to the present invention is characterized in that a dummy pattern is arranged on a processed surface.

[Examples] Hereinafter, the present invention will be described in detail based on Examples.

FIGS. 1 and 2 are Bakun plan views of processed surfaces of semiconductor devices, showing an example in which an isolated pattern is surrounded by a dummy pattern, and an example in which a dummy pattern is arranged between circuit patterns, respectively.

For the formation of isolated circuit patterns or aluminum wiring with dense and dense parts in circuit patterns within a chip, photolithography using a resist is used, followed by pattern formation using a parallel plate reactive ion etching device using chlorine-based gas. As a result, we found that the pattern dimensions in the isolated circuit patterns and areas with low pattern density were thinner than in dense areas, and there were cases where disconnections occurred, but as shown in Figures 1 and 2, When dummy patterns were placed to suppress differences in circuit pattern density, the pattern dimensions within the same chip became approximately the same, and no disconnections occurred.

Furthermore, regarding the formation of polycrystalline silicon gate wiring in a memory IC and a logic array IC with respect to different types of semiconductor devices, for example, the density of one circuit pattern was lower in the logic array IC. Pattern formation was performed by photolithography using a resist, followed by dry etching using a parallel plate type plasma etching apparatus using Freon gas. Assuming that the difference between the pattern dimensions of the resist and the pattern dimensions of the liquid evaporator after etching the processed layer and removing the resist is the dimensional conversion difference, when the pattern is formed by the above method under the same manufacturing conditions, the dimensional conversion difference is Logic array ICs were larger and had greater variation. When forming the gate wiring of the logic array IC, a dummy pattern as shown in FIGS. 1 and 2 is formed on the processed surface.
As a result of arranging the circuit pattern density to be equal to the circuit pattern density of the memory IC, the pattern could be formed under the same manufacturing conditions and the dimensional conversion difference and variation could be suppressed to the same level as in the case of the memory IC.

Note that the dry etching process is not limited to the plasma etching apparatus and reactive ion etching apparatus described above, but can also be applied to chemical dry etching apparatus and plasma and ion shower etching apparatuses that utilize electron cyclotron resonance.

[Effects of the Invention] As described above, according to the present invention, stable desired dimensions can be obtained both within a chip and between different types of semiconductor devices, and a highly reliable semiconductor device can be provided. It is highly suitable for mass production because it can be manufactured under the same manufacturing conditions even for different types of semiconductor devices.

Further, the dimensions of the process monitor pattern and the pattern inside the cell can be made to be approximately the same, and by managing the dimensions of the process monitor pattern, it is possible to manage the semiconductor device with high reliability.

[Brief explanation of the drawing]

1 and 2 are circuit pattern plan views showing one embodiment of the present invention, respectively. l...Circuit pattern 2...Dummy pattern or above Applicant: Seiko Epson Corporation

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device, characterized in that a dummy pattern is arranged on a processed surface of the substrate in a photo-etching step in which a photoresist is used to perform necessary processing on the substrate.